LLVM  8.0.0svn
Macros | Functions
AMDGPUISelLowering.cpp File Reference

This is the parent TargetLowering class for hardware code gen targets. More...

#include "AMDGPUISelLowering.h"
#include "AMDGPU.h"
#include "AMDGPUCallLowering.h"
#include "AMDGPUFrameLowering.h"
#include "AMDGPUIntrinsicInfo.h"
#include "AMDGPURegisterInfo.h"
#include "AMDGPUSubtarget.h"
#include "AMDGPUTargetMachine.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "R600MachineFunctionInfo.h"
#include "SIInstrInfo.h"
#include "SIMachineFunctionInfo.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "llvm/CodeGen/Analysis.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/Support/KnownBits.h"
#include "AMDGPUGenCallingConv.inc"
Include dependency graph for AMDGPUISelLowering.cpp:

Go to the source code of this file.

Macros

#define AMDGPU_LOG2E_F   1.44269504088896340735992468100189214f
 
#define AMDGPU_LN2_F   0.693147180559945309417232121458176568f
 
#define AMDGPU_LN10_F   2.30258509299404568401799145468436421f
 
#define NODE_NAME_CASE(node)   case AMDGPUISD::node: return #node;
 

Functions

static bool allocateCCRegs (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State, const TargetRegisterClass *RC, unsigned NumRegs)
 
static bool allocateSGPRTuple (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
 
static bool allocateVGPRTuple (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
 
static LLVM_READNONE bool fnegFoldsIntoOp (unsigned Opc)
 
static LLVM_READONLY bool opMustUseVOP3Encoding (const SDNode *N, MVT VT)
 returns true if the operation will definitely need to use a 64-bit encoding, and thus will use a VOP3 encoding regardless of the source modifiers. More...
 
static LLVM_READONLY bool hasSourceMods (const SDNode *N)
 
static bool hasDefinedInitializer (const GlobalValue *GV)
 
static SDValue extractF64Exponent (SDValue Hi, const SDLoc &SL, SelectionDAG &DAG)
 
static SDValue getLog2EVal (SelectionDAG &DAG, const SDLoc &SL, EVT VT)
 
static bool isCtlzOpc (unsigned Opc)
 
static bool isCttzOpc (unsigned Opc)
 
static bool isU24 (SDValue Op, SelectionDAG &DAG)
 
static bool isI24 (SDValue Op, SelectionDAG &DAG)
 
static bool simplifyI24 (SDNode *Node24, unsigned OpIdx, TargetLowering::DAGCombinerInfo &DCI)
 
template<typename IntTy >
static SDValue constantFoldBFE (SelectionDAG &DAG, IntTy Src0, uint32_t Offset, uint32_t Width, const SDLoc &DL)
 
static bool hasVolatileUser (SDNode *Val)
 
static SDValue getMul24 (SelectionDAG &DAG, const SDLoc &SL, SDValue N0, SDValue N1, unsigned Size, bool Signed)
 
static bool isNegativeOne (SDValue Val)
 
static SDValue distributeOpThroughSelect (TargetLowering::DAGCombinerInfo &DCI, unsigned Op, const SDLoc &SL, SDValue Cond, SDValue N1, SDValue N2)
 
static SDValue foldFreeOpFromSelect (TargetLowering::DAGCombinerInfo &DCI, SDValue N)
 
static bool isInv2Pi (const APFloat &APF)
 
static unsigned inverseMinMax (unsigned Opc)
 

Detailed Description

This is the parent TargetLowering class for hardware code gen targets.

Definition in file AMDGPUISelLowering.cpp.

Macro Definition Documentation

◆ AMDGPU_LN10_F

#define AMDGPU_LN10_F   2.30258509299404568401799145468436421f

Definition at line 18 of file AMDGPUISelLowering.cpp.

Referenced by llvm::AMDGPUTargetLowering::LowerOperation().

◆ AMDGPU_LN2_F

#define AMDGPU_LN2_F   0.693147180559945309417232121458176568f

Definition at line 17 of file AMDGPUISelLowering.cpp.

Referenced by llvm::AMDGPUTargetLowering::LowerOperation().

◆ AMDGPU_LOG2E_F

#define AMDGPU_LOG2E_F   1.44269504088896340735992468100189214f

Definition at line 16 of file AMDGPUISelLowering.cpp.

Referenced by llvm::AMDGPUTargetLowering::LowerOperation().

◆ NODE_NAME_CASE

#define NODE_NAME_CASE (   node)    case AMDGPUISD::node: return #node;

Function Documentation

◆ allocateCCRegs()

static bool allocateCCRegs ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
ISD::ArgFlagsTy  ArgFlags,
CCState State,
const TargetRegisterClass RC,
unsigned  NumRegs 
)
static

◆ allocateSGPRTuple()

static bool allocateSGPRTuple ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
ISD::ArgFlagsTy  ArgFlags,
CCState State 
)
static

◆ allocateVGPRTuple()

static bool allocateVGPRTuple ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
ISD::ArgFlagsTy  ArgFlags,
CCState State 
)
static

◆ constantFoldBFE()

template<typename IntTy >
static SDValue constantFoldBFE ( SelectionDAG DAG,
IntTy  Src0,
uint32_t  Offset,
uint32_t  Width,
const SDLoc DL 
)
static

◆ distributeOpThroughSelect()

static SDValue distributeOpThroughSelect ( TargetLowering::DAGCombinerInfo DCI,
unsigned  Op,
const SDLoc SL,
SDValue  Cond,
SDValue  N1,
SDValue  N2 
)
static

◆ extractF64Exponent()

static SDValue extractF64Exponent ( SDValue  Hi,
const SDLoc SL,
SelectionDAG DAG 
)
static

◆ fnegFoldsIntoOp()

static LLVM_READNONE bool fnegFoldsIntoOp ( unsigned  Opc)
static

◆ foldFreeOpFromSelect()

static SDValue foldFreeOpFromSelect ( TargetLowering::DAGCombinerInfo DCI,
SDValue  N 
)
static

◆ getLog2EVal()

static SDValue getLog2EVal ( SelectionDAG DAG,
const SDLoc SL,
EVT  VT 
)
static

◆ getMul24()

static SDValue getMul24 ( SelectionDAG DAG,
const SDLoc SL,
SDValue  N0,
SDValue  N1,
unsigned  Size,
bool  Signed 
)
static

◆ hasDefinedInitializer()

static bool hasDefinedInitializer ( const GlobalValue GV)
static

◆ hasSourceMods()

static LLVM_READONLY bool hasSourceMods ( const SDNode N)
static

◆ hasVolatileUser()

static bool hasVolatileUser ( SDNode Val)
static

◆ inverseMinMax()

static unsigned inverseMinMax ( unsigned  Opc)
static

◆ isCtlzOpc()

static bool isCtlzOpc ( unsigned  Opc)
static

◆ isCttzOpc()

static bool isCttzOpc ( unsigned  Opc)
static

◆ isI24()

static bool isI24 ( SDValue  Op,
SelectionDAG DAG 
)
static

◆ isInv2Pi()

static bool isInv2Pi ( const APFloat APF)
static

◆ isNegativeOne()

static bool isNegativeOne ( SDValue  Val)
static

◆ isU24()

static bool isU24 ( SDValue  Op,
SelectionDAG DAG 
)
static

◆ opMustUseVOP3Encoding()

static LLVM_READONLY bool opMustUseVOP3Encoding ( const SDNode N,
MVT  VT 
)
static

returns true if the operation will definitely need to use a 64-bit encoding, and thus will use a VOP3 encoding regardless of the source modifiers.

Definition at line 578 of file AMDGPUISelLowering.cpp.

References llvm::MVT::f64, llvm::SDNode::getNumOperands(), and LLVM_READONLY.

Referenced by llvm::AMDGPUTargetLowering::allUsesHaveSourceMods().

◆ simplifyI24()

static bool simplifyI24 ( SDNode Node24,
unsigned  OpIdx,
TargetLowering::DAGCombinerInfo DCI 
)
static