LLVM  7.0.0svn
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llvm::SDNode Class Reference

Represents one node in the SelectionDAG. More...

#include "llvm/CodeGen/SelectionDAGNodes.h"

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Classes

class  ConstantSDNodeBitfields
 
class  LoadSDNodeBitfields
 
class  LSBaseSDNodeBitfields
 
class  MemSDNodeBitfields
 
class  SDNodeBitfields
 
class  StoreSDNodeBitfields
 
class  use_iterator
 This class provides iterator support for SDUse operands that use a specific SDNode. More...
 
struct  value_op_iterator
 Iterator for directly iterating over the operand SDValue's. More...
 

Public Types

using op_iterator = SDUse *
 
using value_iterator = const EVT *
 

Public Member Functions

unsigned getOpcode () const
 Return the SelectionDAG opcode value for this node. More...
 
bool isTargetOpcode () const
 Test if this node has a target-specific opcode (in the <target>ISD namespace). More...
 
bool isTargetMemoryOpcode () const
 Test if this node has a target-specific memory-referencing opcode (in the <target>ISD namespace and greater than FIRST_TARGET_MEMORY_OPCODE). More...
 
bool isUndef () const
 Return true if the type of the node type undefined. More...
 
bool isMemIntrinsic () const
 Test if this node is a memory intrinsic (with valid pointer information). More...
 
bool isStrictFPOpcode ()
 Test if this node is a strict floating point pseudo-op. More...
 
bool isMachineOpcode () const
 Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode. More...
 
unsigned getMachineOpcode () const
 This may only be called if isMachineOpcode returns true. More...
 
bool getHasDebugValue () const
 
void setHasDebugValue (bool b)
 
bool isDivergent () const
 
bool use_empty () const
 Return true if there are no uses of this node. More...
 
bool hasOneUse () const
 Return true if there is exactly one use of this node. More...
 
size_t use_size () const
 Return the number of uses of this node. More...
 
int getNodeId () const
 Return the unique node id. More...
 
void setNodeId (int Id)
 Set unique node id. More...
 
unsigned getIROrder () const
 Return the node ordering. More...
 
void setIROrder (unsigned Order)
 Set the node ordering. More...
 
const DebugLocgetDebugLoc () const
 Return the source location info. More...
 
void setDebugLoc (DebugLoc dl)
 Set source location info. More...
 
use_iterator use_begin () const
 Provide iteration support to walk over all uses of an SDNode. More...
 
iterator_range< use_iteratoruses ()
 
iterator_range< use_iteratoruses () const
 
bool hasNUsesOfValue (unsigned NUses, unsigned Value) const
 Return true if there are exactly NUSES uses of the indicated value. More...
 
bool hasAnyUseOfValue (unsigned Value) const
 Return true if there are any use of the indicated value. More...
 
bool isOnlyUserOf (const SDNode *N) const
 Return true if this node is the only use of N. More...
 
bool isOperandOf (const SDNode *N) const
 Return true if this node is an operand of N. More...
 
bool isPredecessorOf (const SDNode *N) const
 Return true if this node is a predecessor of N. More...
 
bool hasPredecessor (const SDNode *N) const
 Return true if N is a predecessor of this node. More...
 
unsigned getNumOperands () const
 Return the number of values used by this operation. More...
 
uint64_t getConstantOperandVal (unsigned Num) const
 Helper method returns the integer value of a ConstantSDNode operand. More...
 
const SDValuegetOperand (unsigned Num) const
 
op_iterator op_begin () const
 
op_iterator op_end () const
 
ArrayRef< SDUseops () const
 
iterator_range< value_op_iteratorop_values () const
 
SDVTList getVTList () const
 
SDNodegetGluedNode () const
 If this node has a glue operand, return the node to which the glue operand points. More...
 
SDNodegetGluedUser () const
 If this node has a glue value with a user, return the user (there is at most one). More...
 
const SDNodeFlags getFlags () const
 
void setFlags (SDNodeFlags NewFlags)
 
bool isFast ()
 
void intersectFlagsWith (const SDNodeFlags Flags)
 Clear any flags in this node that aren't also set in Flags. More...
 
unsigned getNumValues () const
 Return the number of values defined/returned by this operator. More...
 
EVT getValueType (unsigned ResNo) const
 Return the type of a specified result. More...
 
MVT getSimpleValueType (unsigned ResNo) const
 Return the type of a specified result as a simple type. More...
 
unsigned getValueSizeInBits (unsigned ResNo) const
 Returns MVT::getSizeInBits(getValueType(ResNo)). More...
 
value_iterator value_begin () const
 
value_iterator value_end () const
 
std::string getOperationName (const SelectionDAG *G=nullptr) const
 Return the opcode of this operation for printing. More...
 
void print_types (raw_ostream &OS, const SelectionDAG *G) const
 
void print_details (raw_ostream &OS, const SelectionDAG *G) const
 
void print (raw_ostream &OS, const SelectionDAG *G=nullptr) const
 
void printr (raw_ostream &OS, const SelectionDAG *G=nullptr) const
 
void printrFull (raw_ostream &O, const SelectionDAG *G=nullptr) const
 Print a SelectionDAG node and all children down to the leaves. More...
 
void printrWithDepth (raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
 Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-specific nodes to be printed in human-readable form. More...
 
void dump () const
 Dump this node, for debugging. More...
 
void dumpr () const
 Dump (recursively) this node and its use-def subgraph. More...
 
void dump (const SelectionDAG *G) const
 Dump this node, for debugging. More...
 
void dumpr (const SelectionDAG *G) const
 Dump (recursively) this node and its use-def subgraph. More...
 
void dumprFull (const SelectionDAG *G=nullptr) const
 printrFull to dbgs(). More...
 
void dumprWithDepth (const SelectionDAG *G=nullptr, unsigned depth=100) const
 printrWithDepth to dbgs(). More...
 
void Profile (FoldingSetNodeID &ID) const
 Gather unique data for the node. More...
 
void addUse (SDUse &U)
 This method should only be used by the SDUse class. More...
 
- Public Member Functions inherited from llvm::FoldingSetBase::Node
 Node ()=default
 
void * getNextInBucket () const
 
void SetNextInBucket (void *N)
 
- Public Member Functions inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< SDNode, Options... >::type >
self_iterator getIterator ()
 
const_self_iterator getIterator () const
 
reverse_self_iterator getReverseIterator ()
 
const_reverse_self_iterator getReverseIterator () const
 
bool isSentinel () const
 Check whether this is the sentinel node. More...
 

Static Public Member Functions

static use_iterator use_end ()
 
static bool hasPredecessorHelper (const SDNode *N, SmallPtrSetImpl< const SDNode *> &Visited, SmallVectorImpl< const SDNode *> &Worklist, unsigned int MaxSteps=0, bool TopologicalPrune=false)
 Returns true if N is a predecessor of any node in Worklist. More...
 
static bool areOnlyUsersOf (ArrayRef< const SDNode *> Nodes, const SDNode *N)
 Return true if all the users of N are contained in Nodes. More...
 
static const chargetIndexedModeName (ISD::MemIndexedMode AM)
 

Public Attributes

uint16_t PersistentId
 Unique and persistent id per SDNode in the DAG. More...
 

Protected Types

enum  { NumSDNodeBits = 3 }
 
enum  { NumMemSDNodeBits = NumSDNodeBits + 4 }
 
enum  { NumLSBaseSDNodeBits = NumMemSDNodeBits + 3 }
 
- Protected Types inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< SDNode, Options... >::type >
using self_iterator = ilist_iterator< ilist_detail::compute_node_options< SDNode, Options... >::type, false, false >
 
using const_self_iterator = ilist_iterator< ilist_detail::compute_node_options< SDNode, Options... >::type, false, true >
 
using reverse_self_iterator = ilist_iterator< ilist_detail::compute_node_options< SDNode, Options... >::type, true, false >
 
using const_reverse_self_iterator = ilist_iterator< ilist_detail::compute_node_options< SDNode, Options... >::type, true, true >
 

Protected Member Functions

 SDNode (unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs)
 Create an SDNode. More...
 
void DropOperands ()
 Release the operands and set this node to have zero operands. More...
 
- Protected Member Functions inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< SDNode, Options... >::type >
 ilist_node_impl ()=default
 

Static Protected Member Functions

static SDVTList getSDVTList (EVT VT)
 

Protected Attributes

union {
   char   RawSDNodeBits [sizeof(uint16_t)]
 
   SDNodeBitfields   SDNodeBits
 
   ConstantSDNodeBitfields   ConstantSDNodeBits
 
   MemSDNodeBitfields   MemSDNodeBits
 
   LSBaseSDNodeBitfields   LSBaseSDNodeBits
 
   LoadSDNodeBitfields   LoadSDNodeBits
 
   StoreSDNodeBitfields   StoreSDNodeBits
 
}; 
 

Friends

class SelectionDAG
 
class HandleSDNode
 

Detailed Description

Represents one node in the SelectionDAG.

Definition at line 482 of file SelectionDAGNodes.h.

Member Typedef Documentation

◆ op_iterator

Definition at line 903 of file SelectionDAGNodes.h.

◆ value_iterator

Definition at line 976 of file SelectionDAGNodes.h.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum
protected
Enumerator
NumSDNodeBits 

Definition at line 502 of file SelectionDAGNodes.h.

◆ anonymous enum

anonymous enum
protected
Enumerator
NumMemSDNodeBits 

Definition at line 524 of file SelectionDAGNodes.h.

◆ anonymous enum

anonymous enum
protected
Enumerator
NumLSBaseSDNodeBits 

Definition at line 533 of file SelectionDAGNodes.h.

Constructor & Destructor Documentation

◆ SDNode()

llvm::SDNode::SDNode ( unsigned  Opc,
unsigned  Order,
DebugLoc  dl,
SDVTList  VTs 
)
inlineprotected

Create an SDNode.

SDNodes are created without any operands, and never own the operand storage. To add operands, see SelectionDAG::createOperands.

Definition at line 1052 of file SelectionDAGNodes.h.

References assert(), llvm::DebugLoc::hasTrivialDestructor(), and llvm::SDVTList::NumVTs.

Member Function Documentation

◆ addUse()

void llvm::SDNode::addUse ( SDUse U)
inline

This method should only be used by the SDUse class.

Definition at line 1040 of file SelectionDAGNodes.h.

Referenced by llvm::SDValue::dumpr().

◆ areOnlyUsersOf()

bool SDNode::areOnlyUsersOf ( ArrayRef< const SDNode *>  Nodes,
const SDNode N 
)
static

Return true if all the users of N are contained in Nodes.

Return true if the only users of N are contained in Nodes.

NOTE: Requires at least one match, but doesn't require them all.

Definition at line 8196 of file SelectionDAG.cpp.

References llvm::any_of(), E, I, llvm::FoldingSetBase::Node::Node(), use_begin(), and use_end().

Referenced by combineInsertSubvector(), and combineX86ShufflesRecursively().

◆ DropOperands()

void SDNode::DropOperands ( )
protected

Release the operands and set this node to have zero operands.

DropOperands - Release the operands and set this node to have zero operands.

Definition at line 6969 of file SelectionDAG.cpp.

References E, and I.

Referenced by llvm::SelectionDAG::DeleteNode().

◆ dump() [1/2]

LLVM_DUMP_METHOD void SDNode::dump ( ) const

◆ dump() [2/2]

LLVM_DUMP_METHOD void SDNode::dump ( const SelectionDAG G) const

Dump this node, for debugging.

The given SelectionDAG allows target-specific nodes to be printed in human-readable form.

Definition at line 456 of file SelectionDAGDumper.cpp.

References llvm::dbgs(), and print().

◆ dumpr() [1/2]

LLVM_DUMP_METHOD void SDNode::dumpr ( ) const

Dump (recursively) this node and its use-def subgraph.

Definition at line 780 of file SelectionDAGDumper.cpp.

References llvm::dbgs(), and DumpNodesr().

Referenced by llvm::SDValue::dumpr(), getIntOperandFromRegisterString(), isPermutation(), and llvm::HexagonTargetLowering::LowerOperation().

◆ dumpr() [2/2]

LLVM_DUMP_METHOD void SDNode::dumpr ( const SelectionDAG G) const

Dump (recursively) this node and its use-def subgraph.

The given SelectionDAG allows target-specific nodes to be printed in human-readable form.

Definition at line 785 of file SelectionDAGDumper.cpp.

References llvm::dbgs(), and DumpNodesr().

◆ dumprFull()

LLVM_DUMP_METHOD void SDNode::dumprFull ( const SelectionDAG G = nullptr) const

printrFull to dbgs().

The given SelectionDAG allows target-specific nodes to be printed in human-readable form. Unlike dumpr, this will print the whole DAG, including children that appear multiple times.

Definition at line 829 of file SelectionDAGDumper.cpp.

References dumprWithDepth().

Referenced by llvm::SelectionDAG::AssignTopologicalOrder(), checkForCyclesHelper(), and llvm::SelectionDAG::salvageDebugInfo().

◆ dumprWithDepth()

LLVM_DUMP_METHOD void SDNode::dumprWithDepth ( const SelectionDAG G = nullptr,
unsigned  depth = 100 
) const

printrWithDepth to dbgs().

The given SelectionDAG allows target-specific nodes to be printed in human-readable form. Unlike dumpr, this will print children that appear multiple times wherever they are used.

Definition at line 825 of file SelectionDAGDumper.cpp.

References llvm::dbgs(), and printrWithDepth().

Referenced by dumprFull().

◆ getConstantOperandVal()

uint64_t llvm::SDNode::getConstantOperandVal ( unsigned  Num) const
inline

◆ getDebugLoc()

const DebugLoc& llvm::SDNode::getDebugLoc ( ) const
inline

◆ getFlags()

const SDNodeFlags llvm::SDNode::getFlags ( ) const
inline

◆ getGluedNode()

SDNode* llvm::SDNode::getGluedNode ( ) const
inline

◆ getGluedUser()

SDNode* llvm::SDNode::getGluedUser ( ) const
inline

If this node has a glue value with a user, return the user (there is at most one).

Otherwise return NULL.

Definition at line 942 of file SelectionDAGNodes.h.

References llvm::MVT::Glue.

Referenced by llvm::InstrEmitter::EmitDbgLabel(), findGluedUser(), and getARClassRegisterMask().

◆ getHasDebugValue()

bool llvm::SDNode::getHasDebugValue ( ) const
inline

◆ getIndexedModeName()

const char * SDNode::getIndexedModeName ( ISD::MemIndexedMode  AM)
static

◆ getIROrder()

unsigned llvm::SDNode::getIROrder ( ) const
inline

◆ getMachineOpcode()

unsigned llvm::SDNode::getMachineOpcode ( ) const
inline

This may only be called if isMachineOpcode returns true.

It returns the MachineInstr opcode value that the node's opcode corresponds to.

Definition at line 686 of file SelectionDAGNodes.h.

References assert().

Referenced by llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::SIInstrInfo::areLoadsFromSameBasePtr(), llvm::ARMBaseInstrInfo::areLoadsFromSameBasePtr(), llvm::X86InstrInfo::areLoadsFromSameBasePtr(), llvm::ScheduleDAGSDNodes::BuildSchedGraph(), CalcNodeSethiUllmanNumber(), canClobberPhysRegDefs(), canClobberReachingPhysRegUse(), llvm::Thumb1InstrInfo::canCopyGluedNodeDuringSchedule(), canEnableCoalescing(), CheckForPhysRegDependency(), llvm::ScheduleDAG::clearDAG(), llvm::ScheduleDAGSDNodes::computeLatency(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), countOperands(), llvm::createR600ISelDag(), llvm::InstrEmitter::EmitDbgLabel(), FindCallSeqStart(), GetCostForDef(), llvm::TargetInstrInfo::getInstrLatency(), llvm::SDValue::getMachineOpcode(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::TargetInstrInfo::getOperandLatency(), getOperationName(), getPhysicalRegisterVT(), llvm::ARMTargetLowering::getSchedulingPreference(), getUsefulBitsForUse(), getVCmpInst(), isBitfieldExtractOp(), isCalleeLoad(), IsChainDependent(), isFusableLoadOpStorePattern(), isMemOPCandidate(), llvm::ResourcePriorityQueue::isResourceAvailable(), isScaledConstantInRange(), llvm::ScheduleDAGSDNodes::newSUnit(), nodesHaveSameOperandValue(), PeepholePPC64ZExtGather(), PerformANDCombine(), performBitcastCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PostISelFolding(), RemoveUnusedGlue(), llvm::ResourcePriorityQueue::reserveResources(), llvm::ARMBaseInstrInfo::shouldScheduleLoadsNear(), llvm::X86InstrInfo::shouldScheduleLoadsNear(), llvm::HexagonDAGToDAGISel::StoreInstrForLoadIntrinsic(), SubIdx2Lane(), and llvm::X86InstrInfo::unfoldMemoryOperand().

◆ getNodeId()

int llvm::SDNode::getNodeId ( ) const
inline

◆ getNumOperands()

unsigned llvm::SDNode::getNumOperands ( ) const
inline

Return the number of values used by this operation.

Definition at line 893 of file SelectionDAGNodes.h.

Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineTo64bitMLAL(), AddGlue(), addShuffleForVecExtend(), adjustLoadValueTypeImpl(), llvm::ISD::allOperandsUndef(), llvm::SelectionDAG::AssignTopologicalOrder(), canReduceVMulWidth(), CheckForLiveRegDef(), CombineBaseUpdate(), combineBVOfConsecutiveLoads(), combineBVOfVecSExt(), combineConcatVectorOfExtracts(), combineFMA(), combineFMADDSUB(), combineSelect(), computeZeroableShuffleElements(), ConvertSelectToConcatVector(), countOperands(), llvm::createR600ISelDag(), llvm::InstrEmitter::EmitDbgLabel(), llvm::SDNodeIterator::end(), ExpandBVWithShuffles(), foldBitcastedFPLogic(), llvm::SelectionDAG::FoldConstantArithmetic(), generateEquivalentSub(), llvm::PPC::get_VSPLTI_elt(), getARClassRegisterMask(), getConstantValue(), getDivRemArgList(), getExpandedMinMaxOps(), getExtendedControlRegister(), GetFPLibCall(), getInputChainForNode(), getIntOperandFromRegisterString(), llvm::SDValue::getNumOperands(), getNumOperandsNoGlue(), getPromotedVectorElementType(), getReadPerformanceCounter(), getReadTimeStampCounter(), llvm::BuildVectorSDNode::getSplatValue(), getStrictFPOpcodeAction(), getTargetShuffleMask(), getTargetVShiftByConstNode(), getTestBitOperand(), getVCmpInst(), haveEfficientBuildVectorPattern(), llvm::ISD::isBuildVectorAllOnes(), isConstantOrUndefBUILD_VECTOR(), llvm::BuildVectorSDNode::isConstantSplat(), isExtendedBUILD_VECTOR(), isMemOPCandidate(), isOpcWithIntImmediate(), isPermutation(), isScaledConstantInRange(), isSETCCorConvertedSETCC(), isSplatVector(), isSplatZeroExtended(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm::SelectionDAGBuilder::LowerAsSTATEPOINT(), llvm::NVPTXTargetLowering::LowerCall(), lowerDSPIntr(), llvm::SparcTargetLowering::LowerF128Op(), LowerInterruptReturn(), LowerMGATHER(), LowerMULH(), opMustUseVOP3Encoding(), Passv64i1ArgInRegs(), performANDCombine(), PerformANDCombine(), PerformBUILD_VECTORCombine(), performConcatVectorsCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::AArch64TargetLowering::PerformDAGCombine(), performNEONPostLDSTCombine(), performSRACombine(), pickOpcodeForVT(), llvm::SITargetLowering::PostISelFolding(), print(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), RemoveUnusedGlue(), replaceInChain(), replaceShuffleOfInsert(), llvm::ResourcePriorityQueue::ResourcePriorityQueue(), llvm::DAGTypeLegalizer::run(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::HexagonDAGToDAGISel::SelectNewCircIntrinsic(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifyDemandedBits(), simplifyDivRem(), SubIdx2Lane(), tryBuildVectorByteMask(), llvm::HexagonDAGToDAGISel::tryLoadOfLoadIntrinsic(), llvm::X86InstrInfo::unfoldMemoryOperand(), llvm::SelectionDAG::UnrollVectorOp(), llvm::SelectionDAG::updateDivergence(), llvm::SelectionDAG::UpdateNodeOperands(), and VerifySDNode().

◆ getNumValues()

unsigned llvm::SDNode::getNumValues ( ) const
inline

Return the number of values defined/returned by this operator.

Definition at line 958 of file SelectionDAGNodes.h.

Referenced by AddGlue(), llvm::ScheduleDAGSDNodes::BuildSchedGraph(), BURRSort(), CalcNodeSethiUllmanNumber(), CallingConvSupported(), canChangeToInt(), canClobberPhysRegDefs(), llvm::TargetLowering::DAGCombinerInfo::CommitTargetLoweringOpt(), llvm::InstrEmitter::CountResults(), doNotCSE(), emitCmp(), llvm::InstrEmitter::EmitDbgLabel(), emitIntrinsicWithCCAndChain(), findGluedUser(), findGlueUse(), findUser(), getCCResult(), getCmp(), getContiguousRangeOfSetBits(), getExpandedMinMaxOps(), getFPBinOp(), GetFPLibCall(), getFPTernOp(), llvm::ARMTargetLowering::getSchedulingPreference(), getStrictFPOpcodeAction(), getUnderlyingArgReg(), getUniformBase(), llvm::SelectionDAGBuilder::getValueImpl(), GetVBR(), HandleMergeInputChains(), hasAnyUseOfValue(), hasNUsesOfValue(), isAnyConstantBuildVector(), llvm::SelectionDAGISel::IsLegalToFold(), isMemOPCandidate(), isOperandOf(), isSETCCorConvertedSETCC(), llvm::SITargetLowering::legalizeTargetIndependentNode(), lowerCallResult(), LowerCallResult(), LowerInterruptReturn(), LowerLoad(), llvm::R600TargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), llvm::MipsTargetLowering::LowerOperationWrapper(), llvm::X86TargetLowering::LowerOperationWrapper(), llvm::SelectionDAGBuilder::lowerRangeToAssertZExt(), llvm::DAGTypeLegalizer::NoteDeletion(), Passv64i1ArgInRegs(), llvm::AArch64TargetLowering::PerformDAGCombine(), PrepareCall(), print_types(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), RemoveUnusedGlue(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::AVRTargetLowering::ReplaceNodeResults(), llvm::ResourcePriorityQueue::ResourcePriorityQueue(), llvm::DAGTypeLegalizer::run(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::TargetLowering::ShrinkDemandedOp(), simplifyDivRem(), SubIdx2Lane(), llvm::X86InstrInfo::unfoldMemoryOperand(), llvm::SelectionDAG::UnrollVectorOp(), useSinCos(), and VerifySDNode().

◆ getOpcode()

unsigned llvm::SDNode::getOpcode ( ) const
inline

Return the SelectionDAG opcode value for this node.

For pre-isel nodes (those for which isMachineOpcode returns false), these are the opcode values in the ISD and <target>ISD namespaces. For post-isel opcodes, see getMachineOpcode.

Definition at line 625 of file SelectionDAGNodes.h.

Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineTo64bitMLAL(), AddCombineTo64bitUMAAL(), AddNodeIDCustom(), AddNodeIDNode(), addStackMapLiveVars(), adjustForFNeg(), adjustForLTGFR(), adjustForSubtraction(), llvm::AVRDAGToDAGISel::select< ISD::BRIND >(), llvm::ScheduleDAGSDNodes::BuildSchedGraph(), CalcNodeSethiUllmanNumber(), calculateByteProvider(), canEnableCoalescing(), canFoldInAddressingMode(), CheckAndImm(), checkBoolTestAndOrSetCCCombine(), CheckForLiveRegDef(), CheckForMaskedLoad(), CheckForPhysRegDependency(), checkHighLaneIndex(), CheckOpcode(), CheckOrImm(), checkValueWidth(), llvm::AddrSpaceCastSDNode::classof(), llvm::MemSDNode::classof(), llvm::AtomicSDNode::classof(), llvm::X86StoreSDNode::classof(), llvm::X86MaskedStoreSDNode::classof(), llvm::MemIntrinsicSDNode::classof(), llvm::TruncSStoreSDNode::classof(), llvm::TruncUSStoreSDNode::classof(), llvm::MaskedTruncSStoreSDNode::classof(), llvm::MaskedTruncUSStoreSDNode::classof(), llvm::X86MaskedGatherScatterSDNode::classof(), llvm::ShuffleVectorSDNode::classof(), llvm::X86MaskedGatherSDNode::classof(), llvm::X86MaskedScatterSDNode::classof(), llvm::ConstantSDNode::classof(), llvm::ConstantFPSDNode::classof(), llvm::GlobalAddressSDNode::classof(), llvm::FrameIndexSDNode::classof(), llvm::JumpTableSDNode::classof(), llvm::ConstantPoolSDNode::classof(), llvm::TargetIndexSDNode::classof(), llvm::BasicBlockSDNode::classof(), llvm::BuildVectorSDNode::classof(), llvm::SrcValueSDNode::classof(), llvm::MDNodeSDNode::classof(), llvm::RegisterSDNode::classof(), llvm::RegisterMaskSDNode::classof(), llvm::BlockAddressSDNode::classof(), llvm::LabelSDNode::classof(), llvm::ExternalSymbolSDNode::classof(), llvm::MCSymbolSDNode::classof(), llvm::CondCodeSDNode::classof(), llvm::VTSDNode::classof(), llvm::LSBaseSDNode::classof(), llvm::LoadSDNode::classof(), llvm::StoreSDNode::classof(), llvm::MaskedLoadStoreSDNode::classof(), llvm::MaskedLoadSDNode::classof(), llvm::MaskedStoreSDNode::classof(), llvm::MaskedGatherScatterSDNode::classof(), llvm::MaskedGatherSDNode::classof(), llvm::MaskedScatterSDNode::classof(), CloneNodeWithValues(), closestSucc(), combineAddOrSubToADCOrSBB(), combineANDXORWithAllOnesIntoANDNP(), CombineBaseUpdate(), combineBitcastvxi1(), combineBVOfConsecutiveLoads(), combineBVOfVecSExt(), combineCastedMaskArithmetic(), combineCCMask(), combineConcatVectorOfExtracts(), combineExtractVectorElt(), combineExtSetcc(), combineFaddFsub(), combineFMA(), combineFMADDSUB(), combineFMinFMax(), combineFMinNumFMaxNum(), combineFOr(), combineIncDecVector(), combineLogicBlendIntoPBLENDV(), combineMinNumMaxNum(), combineMul(), combineOrCmpEqZeroToCtlzSrl(), combineSelect(), combineSelectAndUse(), combineShift(), combineShuffle(), combineToExtendBoolVectorInReg(), combineToExtendCMOV(), combineToExtendVectorInReg(), combineTruncatedArithmetic(), combineVectorCompare(), combineVectorCompareAndMaskUnaryOp(), combineVectorInsert(), combineVectorPack(), combineVectorShiftImm(), CombineVLDDUP(), combineVSelectWithAllOnesOrZeros(), combineVSZext(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), llvm::ScheduleDAGSDNodes::computeLatency(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), convertIntLogicToFPLogic(), ConvertSelectToConcatVector(), countOperands(), llvm::createARCISelDag(), llvm::createR600ISelDag(), llvm::createXCoreISelDag(), llvm::HexagonDAGToDAGISel::DetectUseSxtw(), doNotCSE(), emitConjunctionDisjunctionTreeRec(), llvm::InstrEmitter::EmitDbgLabel(), llvm::XCoreTargetLowering::EmitInstrWithCustomInserter(), Expand64BitShift(), ExpandBVWithShuffles(), expandDisp(), llvm::TargetLowering::expandMUL(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), ExtendUsesToFormExtLoad(), FindCallSeqStart(), findConsecutiveLoad(), findGluedUser(), findMUL_LOHI(), findUser(), foldBitcastedFPLogic(), foldFPToIntToFP(), FoldIntToFPToInt(), foldMaskAndShiftToScale(), foldShuffleOfHorizOp(), llvm::SelectionDAG::FoldSymbolOffset(), foldXor1SetCC(), generateEquivalentSub(), getARMIndexedAddressParts(), getAsNonOpaqueConstant(), getBuildPairElt(), getConstantValue(), getContiguousRangeOfSetBits(), GetCostForDef(), getDivRem8(), getDivRemArgList(), getDivRemLibcall(), getExpandedMinMaxOps(), GetFPLibCall(), getFPTernOp(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), getIntOperandFromRegisterString(), getIntrinsicID(), getIPMConversion(), getMad64_32(), getMOVL(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), getOperationName(), getPhysicalRegisterVT(), llvm::AVRTargetLowering::getPostIndexedAddressParts(), llvm::HexagonTargetLowering::getPostIndexedAddressParts(), llvm::ARMTargetLowering::getPostIndexedAddressParts(), llvm::AVRTargetLowering::getPreIndexedAddressParts(), getPromotedVectorElementType(), GetPromotionOpcode(), getPTXCmpMode(), llvm::AVRTargetLowering::getSetCCResultType(), getSplatConstantFP(), getStrictFPOpcodeAction(), getT2IndexedAddressParts(), getTargetConstantFromNode(), llvm::SystemZTargetLowering::getTargetNodeName(), getTargetShuffleMask(), getTestBitOperand(), GetVBR(), getVCmpInst(), hasNonFlagsUse(), hasOnlyLiveInOpers(), hasOnlyLiveOutUses(), hasPredecessorHelper(), hasSingleUsesFromRoot(), hasSourceMods(), hasVRegCycleUse(), isADDADDMUL(), isAddSubOrSubAdd(), isAddSubSExt(), isAddSubZExt(), isAnyConstantBuildVector(), isBitfieldExtractOp(), isBitfieldExtractOpFromAnd(), isBitfieldExtractOpFromSExtInReg(), isBitfieldExtractOpFromShr(), isBitwiseInverse(), isBoolSGPR(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), llvm::ISD::isBuildVectorOfConstantFPSDNodes(), llvm::ISD::isBuildVectorOfConstantSDNodes(), isCalleeLoad(), IsChainDependent(), isConditionalZeroOrAllOnes(), isConjunctionDisjunctionTree(), isConsecutiveLS(), isContractable(), llvm::AArch64TargetLowering::isDesirableToCommuteWithShift(), isDivRemLibcallAvailable(), isExtendedBUILD_VECTOR(), isFloatingPointZero(), isFNEG(), isFusableLoadOpStorePattern(), llvm::X86TargetLowering::isGAPlusOffset(), llvm::TargetLowering::isGAPlusOffset(), isHorizontalBinOp(), isInt32Immediate(), isInt64Immediate(), isLegalMaskCompare(), isMemOPCandidate(), isOpcodeHandled(), isOpcWithIntImmediate(), llvm::SelectionDAGISel::isOrEquivalentToAdd(), llvm::ScheduleDAGSDNodes::isPassiveNode(), isPerfectIncrement(), isPermutation(), isSaturatingConditional(), isScaledConstantInRange(), llvm::AMDGPUTargetLowering::isSDNodeAlwaysUniform(), llvm::AMDGPUTargetLowering::isSDNodeSourceOfDivergence(), isSETCCorConvertedSETCC(), isSeveralBitsExtractOpFromShr(), isSignExtended(), IsSingleInstrConstant(), isSlicingProfitable(), isStackPtrRelative(), isTargetConstant(), isTruncateOf(), isValidIndexedLoad(), isVectorAllOnes(), llvm::ARMTargetLowering::isVectorLoadExtDesirable(), IsVUZPShuffleNode(), isXor1OfSetCC(), isZeroExtended(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm::HexagonDAGToDAGISel::LoadInstrForLoadIntrinsic(), lowerAtomicArith(), lowerAtomicArithWithLOCK(), llvm::SparcTargetLowering::LowerCall_64(), lowerCallFromStatepointLoweringInfo(), llvm::TargetLowering::lowerCmpEqZeroToCtlzSrl(), LowerCTTZ(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerInterruptReturn(), llvm::MSP430TargetLowering::LowerJumpTable(), LowerMUL_LOHI(), LowerMULH(), llvm::SystemZTargetLowering::LowerOperationWrapper(), LowerShift(), LowerVECTOR_SHUFFLE(), lowerX86FPLogicOp(), maskMatters(), llvm::BaseIndexOffset::match(), matchANDXORWithAllOnesAsANDNP(), matchBinOpReduction(), matchLogicBlend(), matchPMADDWD(), MayFoldIntoZeroExtend(), llvm::SelectionDAG::mutateStrictFPToFP(), narrowExtractedVectorLoad(), llvm::TargetLowering::parametersInCSRMatch(), ParseBFI(), Passv64i1ArgInRegs(), PerformADDCombineWithOperands(), PerformAddcSubcCombine(), PerformAddeSubeCombine(), performAddSubLongCombine(), performANDCombine(), PerformANDCombine(), PerformARMBUILD_VECTORCombine(), llvm::AMDGPUTargetLowering::performAssertSZExtCombine(), performBitcastCombine(), llvm::ARMTargetLowering::PerformBRCONDCombine(), performCMovFPCombine(), llvm::ARMTargetLowering::PerformCMOVToBFICombine(), performConcatVectorsCombine(), performCONDCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::MipsSETargetLowering::PerformDAGCombine(), llvm::LanaiTargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::AArch64TargetLowering::PerformDAGCombine(), llvm::ARMTargetLowering::PerformDAGCombine(), llvm::MipsTargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::X86TargetLowering::PerformDAGCombine(), performDivRemCombine(), performExtendCombine(), PerformExtendCombine(), performFDivCombine(), performFpToIntCombine(), performGlobalAddressCombine(), performIntegerAbsCombine(), performIntToFpCombine(), performMADD_MSUBCombine(), performMulCombine(), llvm::AMDGPUTargetLowering::performMulLoHi24Combine(), performNEONPostLDSTCombine(), performORCombine(), performPostLD1Combine(), PerformREMCombine(), performSetccAddFolding(), PerformSETCCCombine(), PerformShiftCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), PerformSHLSimplify(), performSRACombine(), PerformSTORECombine(), performTBZCombine(), PerformUMLALCombine(), PerformVCVTCombine(), PerformVDIVCombine(), performVectorCompareAndMaskUnaryOpCombine(), performXORCombine(), pickOpcodeForVT(), PrepareCall(), promoteExtBeforeAdd(), llvm::SDValue::reachesChainWithoutSideEffects(), llvm::SelectionDAG::RemoveDeadNodes(), RemoveUnusedGlue(), ReplaceCMP_SWAP_128Results(), replaceInChain(), ReplaceINTRINSIC_W_CHAIN(), llvm::R600TargetLowering::ReplaceNodeResults(), llvm::AVRTargetLowering::ReplaceNodeResults(), llvm::XCoreTargetLowering::ReplaceNodeResults(), llvm::HexagonTargetLowering::ReplaceNodeResults(), llvm::AMDGPUTargetLowering::ReplaceNodeResults(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::SITargetLowering::ReplaceNodeResults(), llvm::ARMTargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), replaceShuffleOfInsert(), reportFastISelFailure(), resetVRegCycle(), llvm::ResourcePriorityQueue::ResourcePriorityQueue(), llvm::DAGTypeLegalizer::run(), llvm::NVPTXDAGToDAGISel::runOnMachineFunction(), llvm::SelectionDAG::salvageDebugInfo(), llvm::HexagonDAGToDAGISel::Select(), llvm::HexagonDAGToDAGISel::SelectBrevLdIntrinsic(), llvm::SelectionDAGISel::SelectCodeCommon(), selectI64Imm(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::HexagonDAGToDAGISel::SelectIntrinsicWOChain(), llvm::HexagonDAGToDAGISel::SelectNewCircIntrinsic(), llvm::HexagonDAGToDAGISel::SelectTypecast(), shouldUseLA(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifyDemandedBits(), simplifyDivRem(), llvm::TargetLowering::SimplifySetCC(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), SplitVSETCC(), stripExtractLoElt(), stripModuloOnShift(), tryBitfieldInsertOpFromOr(), tryBitfieldInsertOpFromOrAndImm(), tryCombineToEXTR(), tryExtendDUPToExtractHigh(), tryFoldToZero(), llvm::HexagonDAGToDAGISel::tryLoadOfLoadIntrinsic(), TryMULWIDECombine(), tryToFoldExtendOfConstant(), llvm::SelectionDAG::UnrollVectorOp(), llvm::X86TargetLowering::unwrapAddress(), useSinCos(), VerifySDNode(), WidenMaskArithmetic(), and llvm::SelectionDAG::~SelectionDAG().

◆ getOperand()

const SDValue& llvm::SDNode::getOperand ( unsigned  Num) const
inline

Definition at line 898 of file SelectionDAGNodes.h.

References assert().

Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineTo64bitMLAL(), AddCombineTo64BitSMLAL16(), AddCombineTo64bitUMAAL(), AddCombineToVPADD(), AddGlue(), llvm::MipsSETargetLowering::addMSAFloatType(), addStackMapLiveVars(), adjustForLTGFR(), adjustForSubtraction(), adjustLoadValueTypeImpl(), llvm::SIInstrInfo::areLoadsFromSameBasePtr(), llvm::ARMBaseInstrInfo::areLoadsFromSameBasePtr(), llvm::X86InstrInfo::areLoadsFromSameBasePtr(), llvm::AVRDAGToDAGISel::select< ISD::BRIND >(), llvm::TargetLowering::BuildSDIV(), llvm::PPCTargetLowering::BuildSDIVPow2(), llvm::TargetLowering::BuildUDIV(), buildVector(), calculateByteProvider(), canClobberPhysRegDefs(), CanCombineFCOPYSIGN_EXTEND_ROUND(), canEnableCoalescing(), canFoldInAddressingMode(), canLowerToLDG(), canReduceVMulWidth(), ChangeVSETULTtoVSETULE(), CheckAndImm(), checkBoolTestAndOrSetCCCombine(), CheckForLiveRegDef(), CheckForMaskedLoad(), CheckForPhysRegDependency(), checkHighLaneIndex(), CheckOrImm(), checkV64LaneV128(), checkValueWidth(), combineAcrossLanesIntrinsic(), combineADC(), combineAdd(), combineAddOrSubToADCOrSBB(), combineAnd(), combineAndLoadToBZHI(), combineAndMaskToShift(), combineAndnp(), CombineBaseUpdate(), combineBasicSADPattern(), combineBitcast(), combineBitcastvxi1(), combineBrCond(), combineBT(), combineBVOfConsecutiveLoads(), combineBVOfVecSExt(), combineCastedMaskArithmetic(), combineCCMask(), combineCMov(), combineCompareEqual(), combineConcatVectorOfExtracts(), combineConcatVectorOfScalars(), combineExtractSubvector(), combineExtractVectorElt(), combineExtractWithShuffle(), combineExtSetcc(), combineFaddFsub(), combineFAnd(), combineFAndFNotToFAndn(), combineFAndn(), combineFMA(), combineFMADDSUB(), combineFMinFMax(), combineFMinNumFMaxNum(), combineFOr(), combineGatherScatter(), combineIncDecVector(), combineInsertSubvector(), combineLogicBlendIntoPBLENDV(), combineLoopMAddPattern(), combineLoopSADPattern(), combineMaskedLoadConstantMask(), combineMinNumMaxNum(), combineMOVMSK(), combineMul(), combineMulSpecial(), combineMulToPMADDWD(), combineMulToPMULDQ(), combineOr(), combineOrCmpEqZeroToCtlzSrl(), combinePMULDQ(), combineSBB(), combineScalarToVector(), combineSelect(), combineSelectAndUseCommutative(), combineSelectOfTwoConstants(), combineSetCC(), combineSext(), combineSextInRegCmov(), combineShiftLeft(), combineShiftRightArithmetic(), combineShiftRightLogical(), combineShuffle(), combineShuffleOfConcatUndef(), combineShuffleOfScalars(), combineShuffleOfSplat(), combineShuffleToVectorExtend(), combineSignExtendInReg(), combineSIntToFP(), combineStore(), combineSub(), combineSubToSubus(), combineTargetShuffle(), combineToExtendBoolVectorInReg(), combineToExtendCMOV(), combineToExtendVectorInReg(), combineTruncate(), combineTruncatedArithmetic(), combineTruncationShuffle(), combineUIntToFP(), combineVectorCompare(), combineVectorCompareAndMaskUnaryOp(), combineVectorPack(), combineVectorShiftImm(), combineVectorSignBitsTruncation(), combineVectorSizedSetCCEquality(), combineVectorTruncation(), CombineVLDDUP(), CombineVMOVDRRCandidateWithVecOp(), combineVSelectWithAllOnesOrZeros(), combineVSZext(), combineX86SetCC(), combineXor(), combineZext(), llvm::LanaiTargetLowering::computeKnownBitsForTargetNode(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), ConstantBuildVector(), convertBuildVectorCastElt(), convertIntLogicToFPLogic(), ConvertSelectToConcatVector(), convertShiftLeftToScale(), countOperands(), llvm::createMSP430ISelDag(), llvm::createR600ISelDag(), llvm::createXCoreISelDag(), llvm::HexagonDAGToDAGISel::DetectUseSxtw(), detectZextAbsDiff(), emitConjunctionDisjunctionTreeRec(), llvm::InstrEmitter::EmitDbgLabel(), llvm::XCoreTargetLowering::EmitInstrWithCustomInserter(), llvm::MipsTargetLowering::EmitInstrWithCustomInserter(), emitRemovedIntrinsicError(), Expand64BitShift(), ExpandBITCAST(), ExpandBVWithShuffles(), llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandMUL(), ExpandREAD_REGISTER(), llvm::SelectionDAG::expandVAArg(), llvm::SelectionDAG::expandVACopy(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), ExtendUsesToFormExtLoad(), FindBFIToCombineWith(), findChainOperand(), findEXTRHalf(), findUser(), foldBitcastedFPLogic(), llvm::SelectionDAG::FoldConstantArithmetic(), llvm::SelectionDAG::FoldConstantVectorArithmetic(), foldFPToIntToFP(), FoldIntToFPToInt(), foldShuffleOfHorizOp(), foldVectorXorShiftIntoCmp(), foldXor1SetCC(), foldXorTruncShiftIntoCmp(), fp16SrcZerosHighBits(), generateEquivalentSub(), GeneratePerfectShuffle(), llvm::PPC::get_VSPLTI_elt(), getAbsolute(), getARClassRegisterMask(), getARMIndexedAddressParts(), getAsCarry(), getAsNonOpaqueConstant(), getBuildPairElt(), llvm::SelectionDAG::getCommutedVectorShuffle(), getConstantValue(), getContiguousRangeOfSetBits(), GetCostForDef(), getCTPOP16BitCounts(), getDivRem8(), getDivRemArgList(), llvm::DOTGraphTraits< SelectionDAG * >::getEdgeTarget(), getExpandedMinMaxOps(), getExtendedControlRegister(), GetFPLibCall(), getFPTernOp(), getInputChainForNode(), getIntOperandFromRegisterString(), getIntrinsicID(), getIPMConversion(), getMad64_32(), getNumOperandsNoGlue(), getOneTrueElt(), llvm::SDValue::getOperand(), llvm::ARMBaseInstrInfo::getOperandLatency(), getOperationName(), llvm::PPCTargetLowering::getPICJumpTableRelocBaseExpr(), llvm::AVRTargetLowering::getPostIndexedAddressParts(), llvm::HexagonTargetLowering::getPostIndexedAddressParts(), llvm::ARMTargetLowering::getPostIndexedAddressParts(), llvm::AVRTargetLowering::getPreIndexedAddressParts(), getPromotedVectorElementType(), GetPromotionOpcode(), getPTXCmpMode(), getReadPerformanceCounter(), getReadTimeStampCounter(), llvm::AVRTargetLowering::getSetCCResultType(), getShuffleScalarElt(), getSplatConstantFP(), llvm::BuildVectorSDNode::getSplatValue(), getStrictFPOpcodeAction(), getT2IndexedAddressParts(), getTargetConstantFromNode(), llvm::SystemZTargetLowering::getTargetNodeName(), getTargetShuffleMask(), getTargetVShiftByConstNode(), getTestBitOperand(), getUnderlyingExtractedFromVec(), getUsefulBitsForUse(), getVCmpInst(), getVectorCompareInfo(), llvm::SelectionDAG::getVectorShuffle(), HandleMergeInputChains(), hasNonFlagsUse(), hasNormalLoadOperand(), hasOnlyLiveInOpers(), hasOnlyLiveOutUses(), hasSingleUsesFromRoot(), haveEfficientBuildVectorPattern(), isADDADDMUL(), isAddSubOrSubAdd(), isAddSubSExt(), isAddSubZExt(), isAllConstantBuildVector(), isAnyConstantBuildVector(), isBitfieldExtractOp(), isBitfieldExtractOpFromAnd(), isBitfieldExtractOpFromSExtInReg(), isBitfieldExtractOpFromShr(), isBitwiseInverse(), isBoolSGPR(), isBSwapHWordElement(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), isCalleeLoad(), isCanonicalized(), isClampZeroToOne(), isConditionalZeroOrAllOnes(), isConjunctionDisjunctionTree(), isConsecutiveLS(), isConstantOrUndefBUILD_VECTOR(), llvm::BuildVectorSDNode::isConstantSplat(), isContractable(), llvm::AArch64TargetLowering::isDesirableToCommuteWithShift(), isDispSafeForFrameIndex(), isDivRemLibcallAvailable(), isExtendedBUILD_VECTOR(), isFloatingPointZero(), isFMulNegTwo(), isFNEG(), isFusableLoadOpStorePattern(), llvm::X86TargetLowering::isGAPlusOffset(), llvm::TargetLowering::isGAPlusOffset(), isHorizontalBinOp(), isLegalMaskCompare(), llvm::SelectionDAGISel::IsLegalToFold(), isMemOPCandidate(), isOpcodeHandled(), isOpcWithIntImmediate(), llvm::SelectionDAGISel::isOrEquivalentToAdd(), isPerfectIncrement(), isPermutation(), isPreferredADD(), isSaturatingConditional(), isScaledConstantInRange(), llvm::AMDGPUTargetLowering::isSDNodeAlwaysUniform(), llvm::AMDGPUTargetLowering::isSDNodeSourceOfDivergence(), isSETCCorConvertedSETCC(), isSetCCOrZExtSetCC(), isSeveralBitsExtractOpFromShr(), IsSingleInstrConstant(), isSlicingProfitable(), isSplatVector(), isSplatZeroExtended(), isStackPtrRelative(), isTargetConstant(), isTruncateOf(), isValidIndexedLoad(), isVectorAllOnes(), isWordAligned(), isXor1OfSetCC(), llvm::PPC::isXXINSERTWMask(), llvm::PPC::isXXPERMDIShuffleMask(), llvm::PPC::isXXSLDWIShuffleMask(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm::HexagonDAGToDAGISel::LoadInstrForLoadIntrinsic(), LowerANY_EXTEND(), llvm::SelectionDAGBuilder::LowerAsSTATEPOINT(), LowerATOMIC_STORE(), lowerAtomicArith(), lowerAtomicArithWithLOCK(), LowerAVXExtend(), LowerBUILD_VECTORAsVariablePermute(), lowerBuildVectorToBitOp(), LowerBuildVectorv4x32(), llvm::NVPTXTargetLowering::LowerCall(), lowerCallFromStatepointLoweringInfo(), lowerCTPOP32BitElements(), LowerCTTZ(), lowerDSPIntr(), LowerEXTEND_VECTOR_INREG(), LowerInterruptReturn(), LowerINTRINSIC_W_CHAIN(), llvm::MSP430TargetLowering::LowerJumpTable(), LowerMGATHER(), lowerMSABinaryBitImmIntr(), lowerMSABitClear(), lowerMSABitClearImm(), lowerMSACopyIntr(), lowerMSALoadIntr(), lowerMSASplatZExt(), lowerMSAStoreIntr(), llvm::LanaiTargetLowering::LowerMUL(), LowerMULH(), llvm::NVPTXTargetLowering::LowerOperation(), llvm::SystemZTargetLowering::LowerOperationWrapper(), LowerShift(), llvm::MSP430TargetLowering::LowerShifts(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_Mask(), LowerToHorizontalOp(), lowerUINT_TO_FP_vXi32(), LowerVAARG(), LowerVECTOR_SHUFFLE(), lowerVECTOR_SHUFFLE_ILVEV(), lowerVECTOR_SHUFFLE_ILVL(), lowerVECTOR_SHUFFLE_ILVOD(), lowerVECTOR_SHUFFLE_ILVR(), lowerVECTOR_SHUFFLE_PCKEV(), lowerVECTOR_SHUFFLE_PCKOD(), lowerVECTOR_SHUFFLE_SHF(), lowerVECTOR_SHUFFLE_VSHF(), LowerVectorAllZeroTest(), lowerVectorShuffleAsBroadcast(), lowerVSELECTtoVectorShuffle(), LowerWRITE_REGISTER(), lowerX86CmpEqZeroToCtlzSrl(), lowerX86FPLogicOp(), LowerXALUO(), LowerZERO_EXTEND_Mask(), maskMatters(), llvm::BaseIndexOffset::match(), matchANDXORWithAllOnesAsANDNP(), matchBinOpReduction(), matchLogicBlend(), matchPMADDWD(), mayTailCallThisCC(), minMaxOpcToMin3Max3Opc(), llvm::SelectionDAG::mutateStrictFPToFP(), narrowExtractedVectorBinOp(), narrowExtractedVectorLoad(), NarrowVector(), nodesHaveSameOperandValue(), llvm::SDNodeIterator::operator*(), llvm::TargetLowering::parametersInCSRMatch(), ParseBFI(), partitionShuffleOfConcats(), Passv64i1ArgInRegs(), PeepholePPC64ZExtGather(), performADDCombine(), PerformADDCombine(), PerformAddcSubcCombine(), PerformAddeSubeCombine(), performAddSubLongCombine(), performANDCombine(), PerformANDCombine(), PerformARMBUILD_VECTORCombine(), llvm::AMDGPUTargetLowering::performAssertSZExtCombine(), PerformBFICombine(), performBitcastCombine(), llvm::ARMTargetLowering::PerformBRCONDCombine(), performBRCONDCombine(), PerformBUILD_VECTORCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), performCMovFPCombine(), llvm::ARMTargetLowering::PerformCMOVToBFICombine(), performConcatVectorsCombine(), performCONDCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::AArch64TargetLowering::PerformDAGCombine(), llvm::ARMTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performDivRemCombine(), performDSPShiftCombine(), performExtendCombine(), PerformExtendCombine(), llvm::AMDGPUTargetLowering::performFAbsCombine(), performFDivCombine(), llvm::AMDGPUTargetLowering::performFNegCombine(), performFpToIntCombine(), performGlobalAddressCombine(), PerformInsertEltCombine(), performIntegerAbsCombine(), performIntrinsicCombine(), PerformIntrinsicCombine(), performIntToFpCombine(), performMADD_MSUBCombine(), llvm::AMDGPUTargetLowering::performMulCombine(), performMULCombine(), performMulCombine(), PerformMULCombine(), llvm::AMDGPUTargetLowering::performMulhsCombine(), llvm::AMDGPUTargetLowering::performMulhuCombine(), llvm::AMDGPUTargetLowering::performMulLoHi24Combine(), performNEONPostLDSTCombine(), performNVCASTCombine(), performORCombine(), PerformORCombine(), PerformORCombineToBFI(), PerformORCombineToSMULWBT(), performPostLD1Combine(), PerformREMCombine(), llvm::AMDGPUTargetLowering::performSelectCombine(), performSELECTCombine(), performSelectCombine(), performSetccAddFolding(), performSETCCCombine(), PerformSETCCCombine(), PerformShiftCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), performSHLCombine(), PerformSHLSimplify(), llvm::AMDGPUTargetLowering::performSraCombine(), performSRACombine(), llvm::AMDGPUTargetLowering::performSrlCombine(), performSRLCombine(), performSTORECombine(), PerformSTORECombine(), PerformSUBCombine(), performTBZCombine(), llvm::AMDGPUTargetLowering::performTruncateCombine(), PerformUMLALCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformVDUPCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), performVectorCompareAndMaskUnaryOpCombine(), PerformVMOVDRRCombine(), PerformVMOVRRDCombine(), PerformVMULCombine(), performVSELECTCombine(), performVSelectCombine(), performXORCombine(), performXorCombine(), pickOpcodeForVT(), llvm::SITargetLowering::PostISelFolding(), PrepareCall(), print(), promoteExtBeforeAdd(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), reduceVMULWidth(), RemoveUnusedGlue(), ReplaceBITCASTResults(), ReplaceCMP_SWAP_128Results(), ReplaceCMP_SWAP_64Results(), replaceInChain(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLongIntrinsic(), llvm::R600TargetLowering::ReplaceNodeResults(), llvm::AVRTargetLowering::ReplaceNodeResults(), llvm::HexagonTargetLowering::ReplaceNodeResults(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::SITargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), ReplaceREADCYCLECOUNTER(), replaceShuffleOfInsert(), reportFastISelFailure(), llvm::ResourcePriorityQueue::ResourcePriorityQueue(), llvm::DAGTypeLegalizer::run(), llvm::NVPTXDAGToDAGISel::runOnMachineFunction(), llvm::SelectionDAG::salvageDebugInfo(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::HexagonDAGToDAGISel::SelectBrevLdIntrinsic(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::HexagonDAGToDAGISel::SelectD2P(), llvm::HexagonDAGToDAGISel::SelectHVXDualOutput(), selectI64Imm(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::HexagonDAGToDAGISel::SelectIntrinsicWChain(), llvm::HexagonDAGToDAGISel::SelectIntrinsicWOChain(), llvm::HexagonDAGToDAGISel::SelectNewCircIntrinsic(), llvm::HexagonDAGToDAGISel::SelectP2D(), llvm::HexagonDAGToDAGISel::SelectQ2V(), llvm::HvxSelector::selectRor(), llvm::HexagonDAGToDAGISel::SelectSHL(), llvm::HvxSelector::selectShuffle(), llvm::HexagonDAGToDAGISel::SelectTypecast(), llvm::HexagonDAGToDAGISel::SelectV2Q(), llvm::HexagonDAGToDAGISel::SelectV65Gather(), llvm::HexagonDAGToDAGISel::SelectV65GatherPred(), llvm::HexagonDAGToDAGISel::SelectVAlign(), llvm::HvxSelector::selectVAlign(), llvm::HexagonDAGToDAGISel::SelectVAlignAddr(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifyDemandedBits(), simplifyDivRem(), simplifyI24(), llvm::TargetLowering::SimplifySetCC(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), llvm::SelectionDAG::SplitVectorOperand(), SplitVSETCC(), llvm::HexagonDAGToDAGISel::StoreInstrForLoadIntrinsic(), stripModuloOnShift(), truncateVecElts(), tryBitfieldInsertOpFromOr(), tryBitfieldInsertOpFromOrAndImm(), tryBuildVectorByteMask(), tryBuildVectorShuffle(), tryCombineCRC32(), tryCombineFixedPointConvert(), tryCombineLongOpWithDup(), tryCombineShiftImm(), tryCombineToBSL(), tryCombineToEXTR(), tryFoldToZero(), llvm::HexagonDAGToDAGISel::tryLoadOfLoadIntrinsic(), tryLowerToSLI(), TryMULWIDECombine(), tryToFoldExtendOfConstant(), tryToFoldExtOfLoad(), llvm::X86InstrInfo::unfoldMemoryOperand(), llvm::SelectionDAG::UnrollVectorOp(), llvm::X86TargetLowering::unwrapAddress(), llvm::SelectionDAG::UpdateNodeOperands(), useSinCos(), VerifySDNode(), WidenMaskArithmetic(), WinDBZCheckDenominator(), and XFormVExtractWithShuffleIntoLoad().

◆ getOperationName()

std::string SDNode::getOperationName ( const SelectionDAG G = nullptr) const

Return the opcode of this operation for printing.

Definition at line 59 of file SelectionDAGDumper.cpp.

References llvm::ISD::ABS, llvm::ISD::ADD, llvm::ISD::ADDC, llvm::ISD::ADDCARRY, llvm::ISD::ADDE, llvm::ISD::ADDROFRETURNADDR, llvm::ISD::ADDRSPACECAST, llvm::ISD::ADJUST_TRAMPOLINE, llvm::ISD::AND, llvm::ISD::ANY_EXTEND, llvm::ISD::ANY_EXTEND_VECTOR_INREG, llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::ATOMIC_CMP_SWAP, llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, llvm::ISD::ATOMIC_FENCE, llvm::ISD::ATOMIC_LOAD, llvm::ISD::ATOMIC_LOAD_ADD, llvm::ISD::ATOMIC_LOAD_AND, llvm::ISD::ATOMIC_LOAD_CLR, llvm::ISD::ATOMIC_LOAD_MAX, llvm::ISD::ATOMIC_LOAD_MIN, llvm::ISD::ATOMIC_LOAD_NAND, llvm::ISD::ATOMIC_LOAD_OR, llvm::ISD::ATOMIC_LOAD_SUB, llvm::ISD::ATOMIC_LOAD_UMAX, llvm::ISD::ATOMIC_LOAD_UMIN, llvm::ISD::ATOMIC_LOAD_XOR, llvm::ISD::ATOMIC_STORE, llvm::ISD::ATOMIC_SWAP, llvm::ISD::BasicBlock, llvm::ISD::BITCAST, llvm::ISD::BITREVERSE, llvm::ISD::BlockAddress, llvm::ISD::BR, llvm::ISD::BR_CC, llvm::ISD::BR_JT, llvm::ISD::BRCOND, llvm::ISD::BRIND, llvm::ISD::BSWAP, llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, llvm::ISD::BUILTIN_OP_END, llvm::ISD::CALLSEQ_END, llvm::ISD::CALLSEQ_START, llvm::ISD::CARRY_FALSE, llvm::ISD::CATCHRET, llvm::ISD::CLEANUPRET, llvm::ISD::CONCAT_VECTORS, llvm::ISD::CONDCODE, llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::ISD::ConstantPool, llvm::ISD::CopyFromReg, llvm::ISD::CopyToReg, llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_UNDEF, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_UNDEF, llvm::ISD::DEBUGTRAP, llvm::ISD::DELETED_NODE, llvm::ISD::DYNAMIC_STACKALLOC, llvm::ISD::EH_DWARF_CFA, llvm::ISD::EH_LABEL, llvm::ISD::EH_RETURN, llvm::ISD::EH_SJLJ_LONGJMP, llvm::ISD::EH_SJLJ_SETJMP, llvm::ISD::EH_SJLJ_SETUP_DISPATCH, llvm::ISD::EntryToken, llvm::ISD::ExternalSymbol, llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FABS, llvm::ISD::FADD, llvm::ISD::FCANONICALIZE, llvm::ISD::FCEIL, llvm::ISD::FCOPYSIGN, llvm::ISD::FCOS, llvm::ISD::FDIV, llvm::ISD::FEXP, llvm::ISD::FEXP2, llvm::ISD::FFLOOR, llvm::ISD::FGETSIGN, llvm::ISD::FLOG, llvm::ISD::FLOG10, llvm::ISD::FLOG2, llvm::ISD::FLT_ROUNDS_, llvm::ISD::FMA, llvm::ISD::FMAD, llvm::ISD::FMAXNAN, llvm::ISD::FMAXNUM, llvm::ISD::FMINNAN, llvm::ISD::FMINNUM, llvm::ISD::FMUL, llvm::ISD::FNEARBYINT, llvm::ISD::FNEG, llvm::ISD::FP16_TO_FP, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::ISD::FP_ROUND_INREG, llvm::ISD::FP_TO_FP16, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FPOW, llvm::ISD::FPOWI, llvm::ISD::FRAME_TO_ARGS_OFFSET, llvm::ISD::FRAMEADDR, llvm::ISD::FrameIndex, llvm::ISD::FREM, llvm::ISD::FRINT, llvm::ISD::FROUND, llvm::ISD::FSIN, llvm::ISD::FSINCOS, llvm::ISD::FSQRT, llvm::ISD::FSUB, llvm::ISD::FTRUNC, llvm::ISD::GC_TRANSITION_END, llvm::ISD::GC_TRANSITION_START, llvm::ISD::GET_DYNAMIC_AREA_OFFSET, llvm::TargetSubtargetInfo::getInstrInfo(), llvm::TargetMachine::getIntrinsicInfo(), getMachineOpcode(), llvm::Intrinsic::getName(), getOpcode(), getOperand(), llvm::SelectionDAG::getSubtarget(), llvm::SelectionDAG::getTarget(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::TargetLowering::getTargetNodeName(), llvm::ISD::GLOBAL_OFFSET_TABLE, llvm::ISD::GlobalAddress, llvm::ISD::GlobalTLSAddress, llvm::ISD::HANDLENODE, llvm::ISD::INIT_TRAMPOLINE, llvm::ISD::INLINEASM, llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, isMachineOpcode(), llvm::ISD::JumpTable, llvm::ISD::LIFETIME_END, llvm::ISD::LIFETIME_START, llvm_unreachable, llvm::ISD::LOAD, llvm::ISD::LOCAL_RECOVER, llvm::ISD::MCSymbol, llvm::ISD::MDNODE_SDNODE, llvm::ISD::MERGE_VALUES, llvm::ISD::MGATHER, llvm::ISD::MLOAD, llvm::ISD::MSCATTER, llvm::ISD::MSTORE, llvm::ISD::MUL, llvm::ISD::MULHS, llvm::ISD::MULHU, llvm::None, llvm::Intrinsic::num_intrinsics, llvm::ISD::OR, llvm::ISD::PCMARKER, llvm::ISD::PREFETCH, llvm::ISD::READ_REGISTER, llvm::ISD::READCYCLECOUNTER, llvm::ISD::Register, llvm::ISD::RegisterMask, llvm::ISD::RETURNADDR, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SADDO, llvm::ISD::SCALAR_TO_VECTOR, llvm::ISD::SDIV, llvm::ISD::SDIVREM, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::ISD::SETCCCARRY, llvm::ISD::SETCCE, llvm::ISD::SETEQ, llvm::ISD::SETFALSE, llvm::ISD::SETFALSE2, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETTRUE, llvm::ISD::SETTRUE2, llvm::ISD::SETUEQ, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, llvm::ISD::SETUO, llvm::ISD::SHL, llvm::ISD::SHL_PARTS, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SIGN_EXTEND_VECTOR_INREG, llvm::ISD::SINT_TO_FP, llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SMUL_LOHI, llvm::ISD::SMULO, llvm::ISD::SRA, llvm::ISD::SRA_PARTS, llvm::ISD::SRCVALUE, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::SRL_PARTS, llvm::ISD::SSUBO, llvm::ISD::STACKRESTORE, llvm::ISD::STACKSAVE, llvm::ISD::STORE, llvm::ISD::STRICT_FADD, llvm::ISD::STRICT_FCOS, llvm::ISD::STRICT_FDIV, llvm::ISD::STRICT_FEXP, llvm::ISD::STRICT_FEXP2, llvm::ISD::STRICT_FLOG, llvm::ISD::STRICT_FLOG10, llvm::ISD::STRICT_FLOG2, llvm::ISD::STRICT_FMA, llvm::ISD::STRICT_FMUL, llvm::ISD::STRICT_FNEARBYINT, llvm::ISD::STRICT_FPOW, llvm::ISD::STRICT_FPOWI, llvm::ISD::STRICT_FREM, llvm::ISD::STRICT_FRINT, llvm::ISD::STRICT_FSIN, llvm::ISD::STRICT_FSQRT, llvm::ISD::STRICT_FSUB, llvm::ISD::SUB, llvm::ISD::SUBC, llvm::ISD::SUBCARRY, llvm::ISD::SUBE, llvm::ISD::TargetBlockAddress, llvm::ISD::TargetConstant, llvm::ISD::TargetConstantFP, llvm::ISD::TargetConstantPool, llvm::ISD::TargetExternalSymbol, llvm::ISD::TargetFrameIndex, llvm::ISD::TargetGlobalAddress, llvm::ISD::TargetGlobalTLSAddress, llvm::ISD::TargetIndex, llvm::ISD::TargetJumpTable, TII, llvm::ISD::TokenFactor, llvm::ISD::TRAP, llvm::ISD::TRUNCATE, llvm::ISD::UADDO, llvm::ISD::UDIV, llvm::ISD::UDIVREM, llvm::ISD::UINT_TO_FP, llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UMUL_LOHI, llvm::ISD::UMULO, llvm::ISD::UNDEF, llvm::ISD::UREM, llvm::ISD::USUBO, llvm::utostr(), llvm::ISD::VAARG, llvm::ISD::VACOPY, llvm::ISD::VAEND, llvm::ISD::VALUETYPE, llvm::ISD::VASTART, llvm::ISD::VECREDUCE_ADD, llvm::ISD::VECREDUCE_AND, llvm::ISD::VECREDUCE_FADD, llvm::ISD::VECREDUCE_FMAX, llvm::ISD::VECREDUCE_FMIN, llvm::ISD::VECREDUCE_FMUL, llvm::ISD::VECREDUCE_MUL, llvm::ISD::VECREDUCE_OR, llvm::ISD::VECREDUCE_SMAX, llvm::ISD::VECREDUCE_SMIN, llvm::ISD::VECREDUCE_STRICT_FADD, llvm::ISD::VECREDUCE_STRICT_FMUL, llvm::ISD::VECREDUCE_UMAX, llvm::ISD::VECREDUCE_UMIN, llvm::ISD::VECREDUCE_XOR, llvm::ISD::VECTOR_SHUFFLE, llvm::ISD::VSELECT, llvm::ISD::WRITE_REGISTER, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, and llvm::ISD::ZERO_EXTEND_VECTOR_INREG.

Referenced by llvm::DOTGraphTraits< SelectionDAG * >::getSimpleNodeLabel().

◆ getSDVTList()

static SDVTList llvm::SDNode::getSDVTList ( EVT  VT)
inlinestaticprotected

Definition at line 1043 of file SelectionDAGNodes.h.

References llvm::MipsISD::Ret.

◆ getSimpleValueType()

MVT llvm::SDNode::getSimpleValueType ( unsigned  ResNo) const
inline

Return the type of a specified result as a simple type.

Definition at line 967 of file SelectionDAGNodes.h.

Referenced by llvm::ScheduleDAGSDNodes::RegDefIter::Advance(), llvm::AVRDAGToDAGISel::select< ISD::BRIND >(), CalcNodeSethiUllmanNumber(), canClobberPhysRegDefs(), ChangeVSETULTtoVSETULE(), CheckForPhysRegDependency(), checkV64LaneV128(), combineADC(), combineAndLoadToBZHI(), combineAndnp(), combineBasicSADPattern(), combineCompareEqual(), combineExtractSubvector(), combineInsertSubvector(), combineOrCmpEqZeroToCtlzSrl(), combineSBB(), combineShuffleToAddSubOrFMAddSub(), combineVectorCompare(), combineVSZext(), countOperands(), ExpandBVWithShuffles(), getAbsolute(), getDivRemArgList(), getIntOperandFromRegisterString(), getPhysicalRegisterVT(), getPromotedVectorElementType(), isAddSubOrSubAdd(), isCalleeLoad(), isFusableLoadOpStorePattern(), isOperandOf(), isSinCosLibcallAvailable(), isSplatZeroExtended(), isStackPtrRelative(), LowerADDSUBCARRY(), lowerAtomicArith(), lowerAtomicArithWithLOCK(), LowerAVXExtend(), lowerBuildVectorAsBroadcast(), lowerBuildVectorToBitOp(), LowerEXTEND_VECTOR_INREG(), LowerFPOWI(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_Mask(), lowerToAddSubOrFMAddSub(), LowerToHorizontalOp(), lowerUINT_TO_FP_vXi32(), lowerX86FPLogicOp(), LowerZERO_EXTEND_Mask(), materializeSBB(), performAddSubLongCombine(), performFDivCombine(), performFpToIntCombine(), PerformVCVTCombine(), PerformVDIVCombine(), pickOpcodeForVT(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), llvm::ResourcePriorityQueue::ResourcePriorityQueue(), llvm::ResourcePriorityQueue::scheduledNode(), ShrinkLoadReplaceStoreWithStore(), tryCombineShiftImm(), and useSinCos().

◆ getValueSizeInBits()

unsigned llvm::SDNode::getValueSizeInBits ( unsigned  ResNo) const
inline

Returns MVT::getSizeInBits(getValueType(ResNo)).

Definition at line 972 of file SelectionDAGNodes.h.

Referenced by BuildVectorFromScalar(), canFoldInAddressingMode(), generateEquivalentSub(), and isSlicingProfitable().

◆ getValueType()

EVT llvm::SDNode::getValueType ( unsigned  ResNo) const
inline

Return the type of a specified result.

Definition at line 961 of file SelectionDAGNodes.h.

References assert().

Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineToVPADD(), AddCombineVUZPToVPADDL(), AddGlue(), llvm::MipsSETargetLowering::addMSAFloatType(), AddNodeIDCustom(), addShuffleForVecExtend(), adjustForSubtraction(), adjustLoadValueTypeImpl(), llvm::AMDGPUTargetLowering::allUsesHaveSourceMods(), llvm::SelectionDAG::areNonVolatileConsecutiveLoads(), llvm::ScheduleDAGSDNodes::BuildSchedGraph(), llvm::TargetLowering::BuildSDIV(), llvm::PPCTargetLowering::BuildSDIVPow2(), llvm::TargetLowering::BuildSDIVPow2(), llvm::TargetLowering::BuildUDIV(), BuildVectorFromScalar(), calculateByteProvider(), CanCombineFCOPYSIGN_EXTEND_ROUND(), canFoldInAddressingMode(), canLowerToLDG(), checkV64LaneV128(), combineAcrossLanesIntrinsic(), combineADC(), combineAdd(), combineAddOrSubToADCOrSBB(), combineAnd(), combineAndMaskToShift(), combineAndnp(), combineANDXORWithAllOnesIntoANDNP(), CombineBaseUpdate(), combineBitcast(), combineBitcastvxi1(), combineBVOfConsecutiveLoads(), combineBVOfVecSExt(), combineCastedMaskArithmetic(), combineCCMask(), combineCMov(), combineConcatVectorOfExtracts(), combineConcatVectorOfScalars(), combineExtractVectorElt(), combineExtractWithShuffle(), combineExtSetcc(), combineFaddFsub(), combineFAndFNotToFAndn(), combineFMA(), combineFMADDSUB(), combineFMinFMax(), combineFMinNumFMaxNum(), combineFneg(), combineHorizontalMinMaxResult(), combineHorizontalPredicateResult(), combineIncDecVector(), combineLoad(), combineLogicBlendIntoPBLENDV(), combineLoopMAddPattern(), combineLoopSADPattern(), combineMaskedLoad(), combineMaskedLoadConstantMask(), combineMinNumMaxNum(), combineMOVMSK(), combineMul(), combineMulToPMADDWD(), combineMulToPMULDQ(), combineOr(), combineOrCmpEqZeroToCtlzSrl(), combineScalarToVector(), combineSelect(), combineSelectAndUse(), combineSelectOfTwoConstants(), combineSetCC(), combineSext(), combineSextInRegCmov(), combineShuffle(), combineShuffleOfConcatUndef(), combineShuffleOfScalars(), combineShuffleOfSplat(), combineShuffleToVectorExtend(), combineSignExtendInReg(), combineSIntToFP(), combineSub(), combineSubToSubus(), combineToExtendBoolVectorInReg(), combineToExtendCMOV(), combineToExtendVectorInReg(), combineTruncate(), combineTruncatedArithmetic(), combineTruncationShuffle(), combineUIntToFP(), combineVectorCompareAndMaskUnaryOp(), combineVectorInsert(), combineVectorPack(), combineVectorShiftImm(), combineVectorSignBitsTruncation(), combineVectorSizedSetCCEquality(), combineVectorTruncation(), combineVectorTruncationWithPACKSS(), combineVectorTruncationWithPACKUS(), CombineVLDDUP(), CombineVMOVDRRCandidateWithVecOp(), combineXor(), combineZext(), convertBuildVectorCastElt(), ConvertCarryFlagToBooleanCarry(), convertIntLogicToFPLogic(), ConvertSelectToConcatVector(), llvm::InstrEmitter::CountResults(), createLoadLR(), doNotCSE(), EltsFromConsecutiveLoads(), llvm::InstrEmitter::EmitDbgLabel(), llvm::XCoreTargetLowering::EmitInstrWithCustomInserter(), llvm::MipsTargetLowering::EmitInstrWithCustomInserter(), Expand64BitShift(), ExpandBITCAST(), ExpandBVWithShuffles(), expandf64Toi32(), llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandMUL(), ExpandREAD_REGISTER(), llvm::TargetLowering::expandUnalignedLoad(), llvm::SelectionDAG::expandVAArg(), llvm::PPCTargetLowering::expandVSXLoadForLE(), ExtendUsesToFormExtLoad(), findGluedUser(), findUser(), foldBitcastedFPLogic(), llvm::SelectionDAG::FoldConstantArithmetic(), foldFPToIntToFP(), FoldIntToFPToInt(), foldVectorXorShiftIntoCmp(), foldXorTruncShiftIntoCmp(), fp16SrcZerosHighBits(), generateEquivalentSub(), getAArch64XALUOOp(), getAbsolute(), getARMIndexedAddressParts(), getAsCarry(), llvm::SelectionDAG::getCommutedVectorShuffle(), getConstantValue(), getContiguousRangeOfSetBits(), getCTPOP16BitCounts(), getDivRem8(), getDivRemArgList(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), getExpandedMinMaxOps(), GetFPLibCall(), getFPTernOp(), getIntOperandFromRegisterString(), getIPMConversion(), getMad64_32(), llvm::SelectionDAG::getMaskedGather(), llvm::SelectionDAG::getMaskedScatter(), getMOVL(), getOneTrueElt(), llvm::PPCTargetLowering::getPICJumpTableRelocBaseExpr(), llvm::ARMTargetLowering::getPostIndexedAddressParts(), getPromotedVectorElementType(), GetPromotionOpcode(), getReductionSDNode(), llvm::ARMTargetLowering::getSchedulingPreference(), llvm::AVRTargetLowering::getSetCCResultType(), getSplatConstantFP(), getStrictFPOpcodeAction(), getT2IndexedAddressParts(), llvm::SystemZTargetLowering::getTargetNodeName(), getTestBitOperand(), GetTLSADDR(), llvm::SDValue::getValueType(), getVCmpInst(), getVPermMask(), HandleMergeInputChains(), hasNormalLoadOperand(), hasOnlySelectUsers(), haveEfficientBuildVectorPattern(), isADDADDMUL(), isAddSubOrSubAdd(), isAllConstantBuildVector(), isAnyConstantBuildVector(), isBitfieldExtractOp(), isBitfieldExtractOpFromAnd(), isBitfieldExtractOpFromSExtInReg(), isBitfieldExtractOpFromShr(), isBoolSGPR(), isBSwapHWordElement(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), isCalleeLoad(), isCanonicalized(), isClampZeroToOne(), isConditionalZeroOrAllOnes(), isConstantOrUndefBUILD_VECTOR(), llvm::BuildVectorSDNode::isConstantSplat(), llvm::ISD::isConstantSplatVector(), llvm::TargetLowering::isConstFalseVal(), llvm::isConstOrConstSplat(), isConstOrDemandedConstSplat(), llvm::TargetLowering::isConstTrueVal(), isContractable(), llvm::AArch64TargetLowering::isDesirableToCommuteWithShift(), isDivRemLibcallAvailable(), isExtendedBUILD_VECTOR(), llvm::TargetLowering::isExtendedTrueVal(), isFloatingPointZero(), isFMulNegTwo(), isFusableLoadOpStorePattern(), isHorizontalBinOp(), isInt32Immediate(), isInt64Immediate(), llvm::isIntS16Immediate(), llvm::SelectionDAGISel::IsLegalToFold(), isMemOPCandidate(), isOpcWithIntImmediate(), isPerfectIncrement(), isPreferredADD(), llvm::PPC::isQVALIGNIShuffleMask(), isSETCCorConvertedSETCC(), isSeveralBitsExtractOpFromShr(), isSlicingProfitable(), llvm::PPC::isSplatShuffleMask(), isSplatVector(), isTargetConstant(), isTruncateOf(), isValidIndexedLoad(), isVMerge(), llvm::PPC::isVSLDOIShuffleMask(), IsVUZPShuffleNode(), isWordAligned(), isXor1OfSetCC(), isXXBRShuffleMaskHelper(), llvm::PPC::isXXPERMDIShuffleMask(), llvm::PPC::isXXSLDWIShuffleMask(), LowerADDC_ADDE_SUBC_SUBE(), LowerADDSUBCARRY(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::NVPTXTargetLowering::LowerCall(), LowerCTPOP(), lowerCTPOP16BitElements(), lowerCTPOP32BitElements(), LowerCTTZ(), lowerDSPIntr(), LowerDYNAMIC_STACKALLOC(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerINTRINSIC_W_CHAIN(), lowerMSABinaryBitImmIntr(), lowerMSABitClear(), lowerMSABitClearImm(), lowerMSACopyIntr(), lowerMSALoadIntr(), lowerMSASplatImm(), lowerMSASplatZExt(), lowerMSAStoreIntr(), llvm::LanaiTargetLowering::LowerMUL(), llvm::NVPTXTargetLowering::LowerOperation(), llvm::SystemZTargetLowering::LowerOperationWrapper(), LowerShift(), llvm::MipsTargetLowering::lowerSTORE(), LowerToTLSExecModel(), LowerToTLSLocalDynamicModel(), LowerVAARG(), lowerVECTOR_SHUFFLE_VSHF(), LowerXALUO(), LowerXOR(), maskMatters(), mayTailCallThisCC(), minMaxOpcToMin3Max3Opc(), narrowExtractedVectorBinOp(), narrowExtractedVectorLoad(), narrowIfNeeded(), NarrowVector(), partitionShuffleOfConcats(), performADDCombine(), performANDCombine(), PerformANDCombine(), PerformARMBUILD_VECTORCombine(), llvm::AMDGPUTargetLowering::performAssertSZExtCombine(), PerformBFICombine(), performBitcastCombine(), llvm::ARMTargetLowering::PerformBRCONDCombine(), PerformBUILD_VECTORCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), performConcatVectorsCombine(), performCONDCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::ARMTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performDivRemCombine(), performExtendCombine(), PerformExtendCombine(), llvm::AMDGPUTargetLowering::performFAbsCombine(), llvm::AMDGPUTargetLowering::performFNegCombine(), performFpToIntCombine(), PerformInsertEltCombine(), performIntegerAbsCombine(), performIntrinsicCombine(), PerformIntrinsicCombine(), performIntToFpCombine(), PerformLOADCombine(), performMADD_MSUBCombine(), llvm::AMDGPUTargetLowering::performMulCombine(), performMULCombine(), performMulCombine(), PerformMULCombine(), llvm::AMDGPUTargetLowering::performMulhsCombine(), llvm::AMDGPUTargetLowering::performMulhuCombine(), performNEONPostLDSTCombine(), performNVCASTCombine(), performORCombine(), PerformORCombine(), PerformORCombineToBFI(), performPostLD1Combine(), PerformREMCombine(), llvm::AMDGPUTargetLowering::performSelectCombine(), performSelectCombine(), performSetccAddFolding(), performSETCCCombine(), PerformSETCCCombine(), PerformShiftCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), performSHLCombine(), llvm::AMDGPUTargetLowering::performSraCombine(), performSRACombine(), llvm::AMDGPUTargetLowering::performSrlCombine(), performSRLCombine(), performSUBCombine(), llvm::AMDGPUTargetLowering::performTruncateCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformVDUPCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), performVectorCompareAndMaskUnaryOpCombine(), PerformVMOVDRRCombine(), PerformVMOVRRDCombine(), PerformVMULCombine(), performVSELECTCombine(), performVSelectCombine(), performXORCombine(), performXorCombine(), PerformXORCombine(), pickOpcodeForVT(), print_types(), promoteExtBeforeAdd(), reduceMaskedLoadToScalarLoad(), RemoveUnusedGlue(), llvm::SelectionDAG::ReplaceAllUsesWith(), ReplaceBITCASTResults(), ReplaceCMP_SWAP_128Results(), ReplaceCMP_SWAP_64Results(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::R600TargetLowering::ReplaceNodeResults(), llvm::AVRTargetLowering::ReplaceNodeResults(), llvm::HexagonTargetLowering::ReplaceNodeResults(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::SITargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), ReplaceReductionResults(), replaceShuffleOfInsert(), resolveBuildVector(), llvm::DAGTypeLegalizer::run(), llvm::NVPTXDAGToDAGISel::runOnMachineFunction(), llvm::TargetLowering::scalarizeVectorLoad(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::HexagonDAGToDAGISel::SelectConstant(), llvm::HexagonDAGToDAGISel::SelectConstantFP(), llvm::HexagonDAGToDAGISel::SelectD2P(), selectI64Imm(), llvm::HexagonDAGToDAGISel::SelectIndexedLoad(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::HexagonDAGToDAGISel::SelectIntrinsicWOChain(), llvm::HexagonDAGToDAGISel::SelectP2D(), llvm::HexagonDAGToDAGISel::SelectQ2V(), llvm::HvxSelector::selectRor(), llvm::HexagonDAGToDAGISel::SelectSHL(), llvm::HvxSelector::selectShuffle(), llvm::HexagonDAGToDAGISel::SelectV2Q(), llvm::HexagonDAGToDAGISel::SelectVAlign(), llvm::HvxSelector::selectVAlign(), llvm::AMDGPUTargetLowering::shouldReduceLoadWidth(), llvm::X86InstrInfo::shouldScheduleLoadsNear(), ShrinkLoadReplaceStoreWithStore(), simplifyDivRem(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), SplitVSETCC(), stripExtractLoElt(), SubIdx2Lane(), truncateVecElts(), tryBitfieldInsertOpFromOr(), tryBitfieldInsertOpFromOrAndImm(), tryBuildVectorByteMask(), tryBuildVectorShuffle(), tryCombineFixedPointConvert(), tryCombineLongOpWithDup(), tryCombineShiftImm(), tryCombineToBSL(), tryCombineToEXTR(), tryFoldToZero(), tryLowerToSLI(), TryMULWIDECombine(), tryToFoldExtendOfConstant(), tryToFoldExtOfLoad(), llvm::X86InstrInfo::unfoldMemoryOperand(), llvm::SelectionDAG::UnrollVectorOp(), useSinCos(), VerifySDNode(), WidenMaskArithmetic(), WinDBZCheckDenominator(), and XFormVExtractWithShuffleIntoLoad().

◆ getVTList()

SDVTList llvm::SDNode::getVTList ( ) const
inline

◆ hasAnyUseOfValue()

bool SDNode::hasAnyUseOfValue ( unsigned  Value) const

◆ hasNUsesOfValue()

bool SDNode::hasNUsesOfValue ( unsigned  NUses,
unsigned  Value 
) const

◆ hasOneUse()

bool llvm::SDNode::hasOneUse ( ) const
inline

Return true if there is exactly one use of this node.

Definition at line 700 of file SelectionDAGNodes.h.

Referenced by bitOpWithConstantIsReducible(), calculateByteProvider(), canChangeToInt(), canFoldInAddressingMode(), combineMinNumMaxNum(), combineMul(), combineOrCmpEqZeroToCtlzSrl(), combineSelectAndUseCommutative(), combineShuffleOfScalars(), combineSub(), llvm::TargetLowering::DAGCombinerInfo::CommitTargetLoweringOpt(), ConvertSelectToConcatVector(), countOperands(), llvm::HexagonDAGToDAGISel::DetectUseSxtw(), emitConjunctionDisjunctionTreeRec(), foldBitcastedFPLogic(), FoldIntToFPToInt(), foldMaskAndShiftToScale(), getContiguousRangeOfSetBits(), llvm::SelectionDAG::GetDemandedBits(), getFPTernOp(), llvm::SystemZTargetLowering::getTargetNodeName(), getTestBitOperand(), getVCmpInst(), hasNonFlagsUse(), hasSingleUsesFromRoot(), isAddSubOrSubAdd(), isAddSubSExt(), isAddSubZExt(), isAnyConstantBuildVector(), isBSwapHWordElement(), isContractable(), isFMulNegTwo(), isFusableLoadOpStorePattern(), isHorizontalBinOp(), isMemOPCandidate(), isOpcWithIntImmediate(), isPermutation(), isScaledConstantInRange(), isSlicingProfitable(), isStackPtrRelative(), isTargetConstant(), isTruncateOf(), isTruncWithZeroHighBitsInput(), isValidIndexedLoad(), isXor1OfSetCC(), lowerBuildVectorAsBroadcast(), LowerInterruptReturn(), LowerVectorAllZeroTest(), PerformADDCombineWithOperands(), PerformARMBUILD_VECTORCombine(), llvm::ARMTargetLowering::PerformBRCONDCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performMulCombine(), PerformSTORECombine(), PerformSUBCombine(), PerformVMOVRRDCombine(), shouldUseLA(), llvm::TargetLowering::ShrinkDemandedOp(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedVectorElts(), simplifyDivRem(), llvm::TargetLowering::SimplifySetCC(), tryFoldToZero(), and zeroExtendToMatch().

◆ hasPredecessor()

bool SDNode::hasPredecessor ( const SDNode N) const

Return true if N is a predecessor of this node.

N is either an operand of this node, or can be reached by recursively traversing up the operands. NOTE: This is an expensive method. Use it carefully.

Definition at line 8273 of file SelectionDAG.cpp.

References hasPredecessorHelper(), and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().

Referenced by getStrictFPOpcodeAction(), isPredecessorOf(), and ShrinkLoadReplaceStoreWithStore().

◆ hasPredecessorHelper()

static bool llvm::SDNode::hasPredecessorHelper ( const SDNode N,
SmallPtrSetImpl< const SDNode *> &  Visited,
SmallVectorImpl< const SDNode *> &  Worklist,
unsigned int  MaxSteps = 0,
bool  TopologicalPrune = false 
)
inlinestatic

Returns true if N is a predecessor of any node in Worklist.

This helper keeps Visited and Worklist sets externally to allow unions searches to be performed in parallel, caching of results across queries and incremental addition to Worklist. Stops early if N is found but will resume. Remember to clear Visited and Worklists if DAG changes. MaxSteps gives a maximum number of nodes to visit before giving up. The TopologicalPrune flag signals that positive NodeIds are topologically ordered (Operands have strictly smaller node id) and search can be pruned leveraging this.

Definition at line 834 of file SelectionDAGNodes.h.

References llvm::SmallVectorImpl< T >::append(), llvm::SmallVectorTemplateCommon< T >::begin(), llvm::SmallPtrSetImpl< PtrType >::count(), llvm::SmallVectorBase::empty(), llvm::SmallVectorTemplateCommon< T >::end(), getNodeId(), getOpcode(), llvm::SmallPtrSetImpl< PtrType >::insert(), op_values(), llvm::SmallVectorImpl< T >::pop_back_val(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SmallPtrSetImplBase::size(), and llvm::ISD::TokenFactor.

Referenced by canFoldInAddressingMode(), findNonImmUse(), getStrictFPOpcodeAction(), HandleMergeInputChains(), hasPredecessor(), isFusableLoadOpStorePattern(), and ShrinkLoadReplaceStoreWithStore().

◆ intersectFlagsWith()

void SDNode::intersectFlagsWith ( const SDNodeFlags  Flags)

Clear any flags in this node that aren't also set in Flags.

If Flags is not in a defined state then this has no effect.

Definition at line 8280 of file SelectionDAG.cpp.

References llvm::SDNodeFlags::intersectWith().

Referenced by VerifySDNode().

◆ isDivergent()

bool llvm::SDNode::isDivergent ( ) const
inline

◆ isFast()

bool llvm::SDNode::isFast ( )
inline

Definition at line 951 of file SelectionDAGNodes.h.

References llvm::SDNodeFlags::isFast().

◆ isMachineOpcode()

bool llvm::SDNode::isMachineOpcode ( ) const
inline

Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.

Definition at line 681 of file SelectionDAGNodes.h.

Referenced by llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::SIInstrInfo::areLoadsFromSameBasePtr(), llvm::ARMBaseInstrInfo::areLoadsFromSameBasePtr(), llvm::X86InstrInfo::areLoadsFromSameBasePtr(), llvm::AVRDAGToDAGISel::select< ISD::BRIND >(), llvm::ScheduleDAGSDNodes::BuildSchedGraph(), CalcNodeSethiUllmanNumber(), canClobberPhysRegDefs(), CheckForLiveRegDef(), CheckForPhysRegDependency(), llvm::MachineSDNode::classof(), llvm::ScheduleDAG::clearDAG(), llvm::ScheduleDAGSDNodes::computeLatency(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), llvm::createR600ISelDag(), llvm::InstrEmitter::EmitNode(), FindCallSeqStart(), findGluedUser(), getConstantValue(), getContiguousRangeOfSetBits(), GetCostForDef(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), llvm::TargetInstrInfo::getInstrLatency(), getIntOperandFromRegisterString(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::TargetInstrInfo::getOperandLatency(), getOperationName(), llvm::ARMTargetLowering::getSchedulingPreference(), getUsefulBitsForUse(), getVCmpInst(), isBitfieldExtractOp(), isCalleeLoad(), IsChainDependent(), isFusableLoadOpStorePattern(), llvm::SDValue::isMachineOpcode(), isPermutation(), IsPredicateKnownToFail(), llvm::ResourcePriorityQueue::isResourceAvailable(), isScaledConstantInRange(), isValidIndexedLoad(), maskMatters(), llvm::ScheduleDAGSDNodes::newSUnit(), PeepholePPC64ZExtGather(), PerformANDCombine(), performBitcastCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), llvm::ResourcePriorityQueue::regPressureDelta(), RemoveUnusedGlue(), llvm::ResourcePriorityQueue::reserveResources(), llvm::ResourcePriorityQueue::ResourcePriorityQueue(), llvm::NVPTXDAGToDAGISel::runOnMachineFunction(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::HexagonDAGToDAGISel::Select(), llvm::SelectionDAGISel::SelectCodeCommon(), stripExtractLoElt(), llvm::X86InstrInfo::unfoldMemoryOperand(), and VerifySDNode().

◆ isMemIntrinsic()

bool llvm::SDNode::isMemIntrinsic ( ) const
inline

Test if this node is a memory intrinsic (with valid pointer information).

INTRINSIC_W_CHAIN and INTRINSIC_VOID nodes are sometimes created for non-memory intrinsics (with chains) that are not really instances of MemSDNode. For such nodes, we need some extra state to determine the proper classof relationship.

Definition at line 646 of file SelectionDAGNodes.h.

References llvm::ISD::INTRINSIC_VOID, and llvm::ISD::INTRINSIC_W_CHAIN.

Referenced by llvm::MemSDNode::classof(), and llvm::MemIntrinsicSDNode::classof().

◆ isOnlyUserOf()

bool SDNode::isOnlyUserOf ( const SDNode N) const

◆ isOperandOf()

bool SDNode::isOperandOf ( const SDNode N) const

Return true if this node is an operand of N.

Definition at line 8218 of file SelectionDAG.cpp.

References llvm::SDValue::getNode(), and op_values().

◆ isPredecessorOf()

bool llvm::SDNode::isPredecessorOf ( const SDNode N) const
inline

Return true if this node is a predecessor of N.

NOTE: Implemented on top of hasPredecessor and every bit as expensive. Use carefully.

Definition at line 815 of file SelectionDAGNodes.h.

References hasPredecessor().

Referenced by AddCombineTo64bitMLAL(), canFoldInAddressingMode(), CombineBaseUpdate(), llvm::PPCTargetLowering::getPreIndexedAddressParts(), isAnyConstantBuildVector(), isFusableLoadOpStorePattern(), performNEONPostLDSTCombine(), performPostLD1Combine(), and replaceShuffleOfInsert().

◆ isStrictFPOpcode()

bool llvm::SDNode::isStrictFPOpcode ( )
inline

◆ isTargetMemoryOpcode()

bool llvm::SDNode::isTargetMemoryOpcode ( ) const
inline

Test if this node has a target-specific memory-referencing opcode (in the <target>ISD namespace and greater than FIRST_TARGET_MEMORY_OPCODE).

Definition at line 634 of file SelectionDAGNodes.h.

References llvm::ISD::FIRST_TARGET_MEMORY_OPCODE.

Referenced by AddNodeIDCustom(), llvm::MemSDNode::classof(), llvm::MemIntrinsicSDNode::classof(), and llvm::SDValue::isTargetMemoryOpcode().

◆ isTargetOpcode()

bool llvm::SDNode::isTargetOpcode ( ) const
inline

Test if this node has a target-specific opcode (in the <target>ISD namespace).

Definition at line 629 of file SelectionDAGNodes.h.

References llvm::ISD::BUILTIN_OP_END.

Referenced by llvm::SDValue::isTargetOpcode().

◆ isUndef()

bool llvm::SDNode::isUndef ( ) const
inline

◆ op_begin()

op_iterator llvm::SDNode::op_begin ( ) const
inline

◆ op_end()

op_iterator llvm::SDNode::op_end ( ) const
inline

◆ op_values()

iterator_range<value_op_iterator> llvm::SDNode::op_values ( ) const
inline

◆ ops()

ArrayRef<SDUse> llvm::SDNode::ops ( ) const
inline

◆ print()

void SDNode::print ( raw_ostream OS,
const SelectionDAG G = nullptr 
) const

◆ print_details()

void SDNode::print_details ( raw_ostream OS,
const SelectionDAG G 
) const

◆ print_types()

void SDNode::print_types ( raw_ostream OS,
const SelectionDAG G 
) const

◆ printr()

void SDNode::printr ( raw_ostream OS,
const SelectionDAG G = nullptr 
) const

Definition at line 725 of file SelectionDAGDumper.cpp.

Referenced by print().

◆ printrFull()

void SDNode::printrFull ( raw_ostream O,
const SelectionDAG G = nullptr 
) const

Print a SelectionDAG node and all children down to the leaves.

The given SelectionDAG allows target-specific nodes to be printed in human-readable form. Unlike printr, this will print the whole DAG, including children that appear multiple times.

Definition at line 818 of file SelectionDAGDumper.cpp.

References LLVM_DUMP_METHOD, and printrWithDepth().

Referenced by llvm::SelectionDAGISel::isOrEquivalentToAdd().

◆ printrWithDepth()

void SDNode::printrWithDepth ( raw_ostream O,
const SelectionDAG G = nullptr,
unsigned  depth = 100 
) const

Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-specific nodes to be printed in human-readable form.

Unlike printr, this will print children that appear multiple times wherever they are used.

Definition at line 813 of file SelectionDAGDumper.cpp.

References printrWithDepthHelper().

Referenced by dumprWithDepth(), llvm::MipsSETargetLowering::PerformDAGCombine(), and printrFull().

◆ Profile()

void SDNode::Profile ( FoldingSetNodeID ID) const

Gather unique data for the node.

Profile - Gather unique data for the node.

Definition at line 8115 of file SelectionDAG.cpp.

References AddNodeIDNode(), and llvm::MVT::LAST_VALUETYPE.

◆ setDebugLoc()

void llvm::SDNode::setDebugLoc ( DebugLoc  dl)
inline

Set source location info.

Try to avoid this, putting it in the constructor is preferable.

Definition at line 725 of file SelectionDAGNodes.h.

Referenced by llvm::SelectionDAGBuilder::getNonRegisterValue(), llvm::SelectionDAG::SelectNodeTo(), and llvm::SelectionDAG::~SelectionDAG().

◆ setFlags()

void llvm::SDNode::setFlags ( SDNodeFlags  NewFlags)
inline

Definition at line 950 of file SelectionDAGNodes.h.

Referenced by llvm::SelectionDAG::getNode().

◆ setHasDebugValue()

void llvm::SDNode::setHasDebugValue ( bool  b)
inline

Definition at line 692 of file SelectionDAGNodes.h.

Referenced by llvm::SelectionDAG::AddDbgValue().

◆ setIROrder()

void llvm::SDNode::setIROrder ( unsigned  Order)
inline

Set the node ordering.

Definition at line 718 of file SelectionDAGNodes.h.

Referenced by llvm::NVPTXTargetLowering::LowerFormalArguments(), and llvm::SelectionDAG::SelectNodeTo().

◆ setNodeId()

void llvm::SDNode::setNodeId ( int  Id)
inline

◆ use_begin()

use_iterator llvm::SDNode::use_begin ( ) const
inline

Provide iteration support to walk over all uses of an SDNode.

Definition at line 785 of file SelectionDAGNodes.h.

Referenced by llvm::AMDGPUTargetLowering::addTokenForArgument(), adjustForLTGFR(), llvm::SITargetLowering::AdjustInstrPostInstrSelection(), allUsesTruncate(), areOnlyUsersOf(), llvm::SelectionDAG::AssignTopologicalOrder(), calculateByteProvider(), canFoldInAddressingMode(), CombineBaseUpdate(), combineCompareEqual(), combineMul(), combineSelect(), CombineVLDDUP(), ConvertSelectToConcatVector(), countOperands(), ExpandBITCAST(), ExtendUsesToFormExtLoad(), findConsecutiveLoad(), findGlueUse(), findUser(), FoldIntToFPToInt(), generateEquivalentSub(), getStrictFPOpcodeAction(), getVCmpInst(), hasAnyUseOfValue(), hasNoCarryFlagUses(), hasNonFlagsUse(), hasNoSignedComparisonUses(), hasNUsesOfValue(), hasSingleUsesFromRoot(), llvm::X86TargetLowering::IsDesirableToPromoteOp(), isDivRemLibcallAvailable(), isFusableLoadOpStorePattern(), isMemOPCandidate(), isOnlyUserOf(), isPermutation(), isScaledConstantInRange(), isSlicingProfitable(), isTargetConstant(), isTruncateOf(), llvm::ARMTargetLowering::isVectorLoadExtDesirable(), isXor1OfSetCC(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerInterruptReturn(), MayFoldIntoStore(), MayFoldIntoZeroExtend(), mayTailCallThisCC(), Passv64i1ArgInRegs(), PerformADDCombineWithOperands(), PerformARMBUILD_VECTORCombine(), llvm::AArch64TargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performMulCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), PrepareCall(), RemoveUnusedGlue(), llvm::SelectionDAG::ReplaceAllUsesOfValuesWith(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::DAGTypeLegalizer::run(), ShrinkLoadReplaceStoreWithStore(), SubIdx2Lane(), and useSinCos().

◆ use_empty()

bool llvm::SDNode::use_empty ( ) const
inline

◆ use_end()

static use_iterator llvm::SDNode::use_end ( )
inlinestatic

◆ use_size()

size_t llvm::SDNode::use_size ( ) const
inline

Return the number of uses of this node.

This method takes time proportional to the number of uses.

Definition at line 706 of file SelectionDAGNodes.h.

Referenced by ExpandBITCAST(), findGluedUser(), isContractable(), isFMulNegTwo(), and isTargetConstant().

◆ uses() [1/2]

iterator_range<use_iterator> llvm::SDNode::uses ( )
inline

◆ uses() [2/2]

iterator_range<use_iterator> llvm::SDNode::uses ( ) const
inline

Definition at line 794 of file SelectionDAGNodes.h.

References isOperandOf(), llvm::make_range(), and N.

◆ value_begin()

value_iterator llvm::SDNode::value_begin ( ) const
inline

Definition at line 978 of file SelectionDAGNodes.h.

Referenced by AddGlue(), findUser(), lowerDSPIntr(), and RemoveUnusedGlue().

◆ value_end()

value_iterator llvm::SDNode::value_end ( ) const
inline

Definition at line 979 of file SelectionDAGNodes.h.

References llvm::dump(), G, llvm::RISCVFenceField::O, and print().

Referenced by AddGlue(), findUser(), and lowerDSPIntr().

Friends And Related Function Documentation

◆ HandleSDNode

friend class HandleSDNode
friend

Definition at line 578 of file SelectionDAGNodes.h.

◆ SelectionDAG

friend class SelectionDAG
friend

Definition at line 568 of file SelectionDAGNodes.h.

Member Data Documentation

◆ @161

union { ... }

◆ ConstantSDNodeBits

ConstantSDNodeBitfields llvm::SDNode::ConstantSDNodeBits

Definition at line 558 of file SelectionDAGNodes.h.

◆ LoadSDNodeBits

LoadSDNodeBitfields llvm::SDNode::LoadSDNodeBits

Definition at line 561 of file SelectionDAGNodes.h.

◆ LSBaseSDNodeBits

LSBaseSDNodeBitfields llvm::SDNode::LSBaseSDNodeBits

Definition at line 560 of file SelectionDAGNodes.h.

◆ MemSDNodeBits

MemSDNodeBitfields llvm::SDNode::MemSDNodeBits

Definition at line 559 of file SelectionDAGNodes.h.

Referenced by llvm::MemSDNode::MemSDNode().

◆ PersistentId

uint16_t llvm::SDNode::PersistentId

Unique and persistent id per SDNode in the DAG.

Used for debug printing.

Definition at line 615 of file SelectionDAGNodes.h.

Referenced by llvm::DOTGraphTraits< SelectionDAG * >::getNodeIdentifierLabel(), PrintNodeId(), and VerifySDNode().

◆ RawSDNodeBits

char llvm::SDNode::RawSDNodeBits[sizeof(uint16_t)]

Definition at line 556 of file SelectionDAGNodes.h.

◆ SDNodeBits

SDNodeBitfields llvm::SDNode::SDNodeBits

◆ StoreSDNodeBits

StoreSDNodeBitfields llvm::SDNode::StoreSDNodeBits

Definition at line 562 of file SelectionDAGNodes.h.


The documentation for this class was generated from the following files: