LLVM 18.0.0git
LegalizeTypes.h
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1//===-- LegalizeTypes.h - DAG Type Legalizer class definition ---*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the DAGTypeLegalizer class. This is a private interface
10// shared between the code that implements the SelectionDAG::LegalizeTypes
11// method.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
16#define LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
17
18#include "llvm/ADT/DenseMap.h"
19#include "llvm/CodeGen/SelectionDAG.h"
20#include "llvm/CodeGen/TargetLowering.h"
21#include "llvm/Support/Compiler.h"
22
23namespace llvm {
24
25//===----------------------------------------------------------------------===//
26/// This takes an arbitrary SelectionDAG as input and hacks on it until only
27/// value types the target machine can handle are left. This involves promoting
28/// small sizes to large sizes or splitting up large values into small values.
29///
30class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
31 const TargetLowering &TLI;
32 SelectionDAG &DAG;
33public:
34 /// This pass uses the NodeId on the SDNodes to hold information about the
35 /// state of the node. The enum has all the values.
36 enum NodeIdFlags {
37 /// All operands have been processed, so this node is ready to be handled.
38 ReadyToProcess = 0,
39
40 /// This is a new node, not before seen, that was created in the process of
41 /// legalizing some other node.
42 NewNode = -1,
43
44 /// This node's ID needs to be set to the number of its unprocessed
45 /// operands.
46 Unanalyzed = -2,
47
48 /// This is a node that has already been processed.
49 Processed = -3
50
51 // 1+ - This is a node which has this many unprocessed operands.
52 };
53private:
54
55 /// This is a bitvector that contains two bits for each simple value type,
56 /// where the two bits correspond to the LegalizeAction enum from
57 /// TargetLowering. This can be queried with "getTypeAction(VT)".
58 TargetLowering::ValueTypeActionImpl ValueTypeActions;
59
60 /// Return how we should legalize values of this type.
61 TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const {
62 return TLI.getTypeAction(*DAG.getContext(), VT);
63 }
64
65 /// Return true if this type is legal on this target.
66 bool isTypeLegal(EVT VT) const {
67 return TLI.getTypeAction(*DAG.getContext(), VT) == TargetLowering::TypeLegal;
68 }
69
70 /// Return true if this is a simple legal type.
71 bool isSimpleLegalType(EVT VT) const {
72 return VT.isSimple() && TLI.isTypeLegal(VT);
73 }
74
75 EVT getSetCCResultType(EVT VT) const {
76 return TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
77 }
78
79 /// Pretend all of this node's results are legal.
80 bool IgnoreNodeResults(SDNode *N) const {
81 return N->getOpcode() == ISD::TargetConstant ||
82 N->getOpcode() == ISD::Register;
83 }
84
85 // Bijection from SDValue to unique id. As each created node gets a
86 // new id we do not need to worry about reuse expunging. Should we
87 // run out of ids, we can do a one time expensive compactifcation.
88 typedef unsigned TableId;
89
90 TableId NextValueId = 1;
91
92 SmallDenseMap<SDValue, TableId, 8> ValueToIdMap;
93 SmallDenseMap<TableId, SDValue, 8> IdToValueMap;
94
95 /// For integer nodes that are below legal width, this map indicates what
96 /// promoted value to use.
97 SmallDenseMap<TableId, TableId, 8> PromotedIntegers;
98
99 /// For integer nodes that need to be expanded this map indicates which
100 /// operands are the expanded version of the input.
101 SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> ExpandedIntegers;
102
103 /// For floating-point nodes converted to integers of the same size, this map
104 /// indicates the converted value to use.
105 SmallDenseMap<TableId, TableId, 8> SoftenedFloats;
106
107 /// For floating-point nodes that have a smaller precision than the smallest
108 /// supported precision, this map indicates what promoted value to use.
109 SmallDenseMap<TableId, TableId, 8> PromotedFloats;
110
111 /// For floating-point nodes that have a smaller precision than the smallest
112 /// supported precision, this map indicates the converted value to use.
113 SmallDenseMap<TableId, TableId, 8> SoftPromotedHalfs;
114
115 /// For float nodes that need to be expanded this map indicates which operands
116 /// are the expanded version of the input.
117 SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> ExpandedFloats;
118
119 /// For nodes that are <1 x ty>, this map indicates the scalar value of type
120 /// 'ty' to use.
121 SmallDenseMap<TableId, TableId, 8> ScalarizedVectors;
122
123 /// For nodes that need to be split this map indicates which operands are the
124 /// expanded version of the input.
125 SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> SplitVectors;
126
127 /// For vector nodes that need to be widened, indicates the widened value to
128 /// use.
129 SmallDenseMap<TableId, TableId, 8> WidenedVectors;
130
131 /// For values that have been replaced with another, indicates the replacement
132 /// value to use.
133 SmallDenseMap<TableId, TableId, 8> ReplacedValues;
134
135 /// This defines a worklist of nodes to process. In order to be pushed onto
136 /// this worklist, all operands of a node must have already been processed.
137 SmallVector<SDNode*, 128> Worklist;
138
139 TableId getTableId(SDValue V) {
140 assert(V.getNode() && "Getting TableId on SDValue()");
141
142 auto I = ValueToIdMap.find(V);
143 if (I != ValueToIdMap.end()) {
144 // replace if there's been a shift.
145 RemapId(I->second);
146 assert(I->second && "All Ids should be nonzero");
147 return I->second;
148 }
149 // Add if it's not there.
150 ValueToIdMap.insert(std::make_pair(V, NextValueId));
151 IdToValueMap.insert(std::make_pair(NextValueId, V));
152 ++NextValueId;
153 assert(NextValueId != 0 &&
154 "Ran out of Ids. Increase id type size or add compactification");
155 return NextValueId - 1;
156 }
157
158 const SDValue &getSDValue(TableId &Id) {
159 RemapId(Id);
160 assert(Id && "TableId should be non-zero");
161 auto I = IdToValueMap.find(Id);
162 assert(I != IdToValueMap.end() && "cannot find Id in map");
163 return I->second;
164 }
165
166public:
167 explicit DAGTypeLegalizer(SelectionDAG &dag)
168 : TLI(dag.getTargetLoweringInfo()), DAG(dag),
169 ValueTypeActions(TLI.getValueTypeActions()) {
170 static_assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE,
171 "Too many value types for ValueTypeActions to hold!");
172 }
173
174 /// This is the main entry point for the type legalizer. This does a
175 /// top-down traversal of the dag, legalizing types as it goes. Returns
176 /// "true" if it made any changes.
177 bool run();
178
179 void NoteDeletion(SDNode *Old, SDNode *New) {
180 assert(Old != New && "node replaced with self");
181 for (unsigned i = 0, e = Old->getNumValues(); i != e; ++i) {
182 TableId NewId = getTableId(SDValue(New, i));
183 TableId OldId = getTableId(SDValue(Old, i));
184
185 if (OldId != NewId) {
186 ReplacedValues[OldId] = NewId;
187
188 // Delete Node from tables. We cannot do this when OldId == NewId,
189 // because NewId can still have table references to it in
190 // ReplacedValues.
191 IdToValueMap.erase(OldId);
192 PromotedIntegers.erase(OldId);
193 ExpandedIntegers.erase(OldId);
194 SoftenedFloats.erase(OldId);
195 PromotedFloats.erase(OldId);
196 SoftPromotedHalfs.erase(OldId);
197 ExpandedFloats.erase(OldId);
198 ScalarizedVectors.erase(OldId);
199 SplitVectors.erase(OldId);
200 WidenedVectors.erase(OldId);
201 }
202
203 ValueToIdMap.erase(SDValue(Old, i));
204 }
205 }
206
207 SelectionDAG &getDAG() const { return DAG; }
208
209private:
210 SDNode *AnalyzeNewNode(SDNode *N);
211 void AnalyzeNewValue(SDValue &Val);
212 void PerformExpensiveChecks();
213 void RemapId(TableId &Id);
214 void RemapValue(SDValue &V);
215
216 // Common routines.
217 SDValue BitConvertToInteger(SDValue Op);
218 SDValue BitConvertVectorToIntegerVector(SDValue Op);
219 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT);
220 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult);
221 bool CustomWidenLowerNode(SDNode *N, EVT VT);
222
223 /// Replace each result of the given MERGE_VALUES node with the corresponding
224 /// input operand, except for the result 'ResNo', for which the corresponding
225 /// input operand is returned.
226 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo);
227
228 SDValue JoinIntegers(SDValue Lo, SDValue Hi);
229
230 std::pair<SDValue, SDValue> ExpandAtomic(SDNode *Node);
231
232 SDValue PromoteTargetBoolean(SDValue Bool, EVT ValVT);
233
234 void ReplaceValueWith(SDValue From, SDValue To);
235 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
236 void SplitInteger(SDValue Op, EVT LoVT, EVT HiVT,
237 SDValue &Lo, SDValue &Hi);
238
239 //===--------------------------------------------------------------------===//
240 // Integer Promotion Support: LegalizeIntegerTypes.cpp
241 //===--------------------------------------------------------------------===//
242
243 /// Given a processed operand Op which was promoted to a larger integer type,
244 /// this returns the promoted value. The low bits of the promoted value
245 /// corresponding to the original type are exactly equal to Op.
246 /// The extra bits contain rubbish, so the promoted value may need to be zero-
247 /// or sign-extended from the original type before it is usable (the helpers
248 /// SExtPromotedInteger and ZExtPromotedInteger can do this for you).
249 /// For example, if Op is an i16 and was promoted to an i32, then this method
250 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper
251 /// 16 bits of which contain rubbish.
252 SDValue GetPromotedInteger(SDValue Op) {
253 TableId &PromotedId = PromotedIntegers[getTableId(Op)];
254 SDValue PromotedOp = getSDValue(PromotedId);
255 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
256 return PromotedOp;
257 }
258 void SetPromotedInteger(SDValue Op, SDValue Result);
259
260 /// Get a promoted operand and sign extend it to the final size.
261 SDValue SExtPromotedInteger(SDValue Op) {
262 EVT OldVT = Op.getValueType();
263 SDLoc dl(Op);
264 Op = GetPromotedInteger(Op);
265 return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, Op.getValueType(), Op,
266 DAG.getValueType(OldVT));
267 }
268
269 /// Get a promoted operand and zero extend it to the final size.
270 SDValue ZExtPromotedInteger(SDValue Op) {
271 EVT OldVT = Op.getValueType();
272 SDLoc dl(Op);
273 Op = GetPromotedInteger(Op);
274 return DAG.getZeroExtendInReg(Op, dl, OldVT);
275 }
276
277 // Get a promoted operand and sign or zero extend it to the final size
278 // (depending on TargetLoweringInfo::isSExtCheaperThanZExt). For a given
279 // subtarget and type, the choice of sign or zero-extension will be
280 // consistent.
281 SDValue SExtOrZExtPromotedInteger(SDValue Op) {
282 EVT OldVT = Op.getValueType();
283 SDLoc DL(Op);
284 Op = GetPromotedInteger(Op);
285 if (TLI.isSExtCheaperThanZExt(OldVT, Op.getValueType()))
286 return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, Op.getValueType(), Op,
287 DAG.getValueType(OldVT));
288 return DAG.getZeroExtendInReg(Op, DL, OldVT);
289 }
290
291 // Promote the given operand V (vector or scalar) according to N's specific
292 // reduction kind. N must be an integer VECREDUCE_* or VP_REDUCE_*. Returns
293 // the nominal extension opcode (ISD::(ANY|ZERO|SIGN)_EXTEND) and the
294 // promoted value.
295 SDValue PromoteIntOpVectorReduction(SDNode *N, SDValue V);
296
297 // Integer Result Promotion.
298 void PromoteIntegerResult(SDNode *N, unsigned ResNo);
299 SDValue PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
300 SDValue PromoteIntRes_AssertSext(SDNode *N);
301 SDValue PromoteIntRes_AssertZext(SDNode *N);
302 SDValue PromoteIntRes_Atomic0(AtomicSDNode *N);
303 SDValue PromoteIntRes_Atomic1(AtomicSDNode *N);
304 SDValue PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, unsigned ResNo);
305 SDValue PromoteIntRes_EXTRACT_SUBVECTOR(SDNode *N);
306 SDValue PromoteIntRes_INSERT_SUBVECTOR(SDNode *N);
307 SDValue PromoteIntRes_VECTOR_REVERSE(SDNode *N);
308 SDValue PromoteIntRes_VECTOR_SHUFFLE(SDNode *N);
309 SDValue PromoteIntRes_VECTOR_SPLICE(SDNode *N);
310 SDValue PromoteIntRes_VECTOR_INTERLEAVE_DEINTERLEAVE(SDNode *N);
311 SDValue PromoteIntRes_BUILD_VECTOR(SDNode *N);
312 SDValue PromoteIntRes_ScalarOp(SDNode *N);
313 SDValue PromoteIntRes_STEP_VECTOR(SDNode *N);
314 SDValue PromoteIntRes_EXTEND_VECTOR_INREG(SDNode *N);
315 SDValue PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N);
316 SDValue PromoteIntRes_CONCAT_VECTORS(SDNode *N);
317 SDValue PromoteIntRes_BITCAST(SDNode *N);
318 SDValue PromoteIntRes_BSWAP(SDNode *N);
319 SDValue PromoteIntRes_BITREVERSE(SDNode *N);
320 SDValue PromoteIntRes_BUILD_PAIR(SDNode *N);
321 SDValue PromoteIntRes_Constant(SDNode *N);
322 SDValue PromoteIntRes_CTLZ(SDNode *N);
323 SDValue PromoteIntRes_CTPOP_PARITY(SDNode *N);
324 SDValue PromoteIntRes_CTTZ(SDNode *N);
325 SDValue PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N);
326 SDValue PromoteIntRes_FP_TO_XINT(SDNode *N);
327 SDValue PromoteIntRes_FP_TO_XINT_SAT(SDNode *N);
328 SDValue PromoteIntRes_FP_TO_FP16_BF16(SDNode *N);
329 SDValue PromoteIntRes_XRINT(SDNode *N);
330 SDValue PromoteIntRes_FREEZE(SDNode *N);
331 SDValue PromoteIntRes_INT_EXTEND(SDNode *N);
332 SDValue PromoteIntRes_LOAD(LoadSDNode *N);
333 SDValue PromoteIntRes_MLOAD(MaskedLoadSDNode *N);
334 SDValue PromoteIntRes_MGATHER(MaskedGatherSDNode *N);
335 SDValue PromoteIntRes_Overflow(SDNode *N);
336 SDValue PromoteIntRes_FFREXP(SDNode *N);
337 SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo);
338 SDValue PromoteIntRes_Select(SDNode *N);
339 SDValue PromoteIntRes_SELECT_CC(SDNode *N);
340 SDValue PromoteIntRes_SETCC(SDNode *N);
341 SDValue PromoteIntRes_SHL(SDNode *N);
342 SDValue PromoteIntRes_SimpleIntBinOp(SDNode *N);
343 SDValue PromoteIntRes_ZExtIntBinOp(SDNode *N);
344 SDValue PromoteIntRes_SExtIntBinOp(SDNode *N);
345 SDValue PromoteIntRes_UMINUMAX(SDNode *N);
346 SDValue PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N);
347 SDValue PromoteIntRes_SRA(SDNode *N);
348 SDValue PromoteIntRes_SRL(SDNode *N);
349 SDValue PromoteIntRes_TRUNCATE(SDNode *N);
350 SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo);
351 SDValue PromoteIntRes_UADDSUBO_CARRY(SDNode *N, unsigned ResNo);
352 SDValue PromoteIntRes_SADDSUBO_CARRY(SDNode *N, unsigned ResNo);
353 SDValue PromoteIntRes_UNDEF(SDNode *N);
354 SDValue PromoteIntRes_VAARG(SDNode *N);
355 SDValue PromoteIntRes_VSCALE(SDNode *N);
356 SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo);
357 SDValue PromoteIntRes_ADDSUBSHLSAT(SDNode *N);
358 SDValue PromoteIntRes_MULFIX(SDNode *N);
359 SDValue PromoteIntRes_DIVFIX(SDNode *N);
360 SDValue PromoteIntRes_GET_ROUNDING(SDNode *N);
361 SDValue PromoteIntRes_VECREDUCE(SDNode *N);
362 SDValue PromoteIntRes_VP_REDUCE(SDNode *N);
363 SDValue PromoteIntRes_ABS(SDNode *N);
364 SDValue PromoteIntRes_Rotate(SDNode *N);
365 SDValue PromoteIntRes_FunnelShift(SDNode *N);
366 SDValue PromoteIntRes_VPFunnelShift(SDNode *N);
367 SDValue PromoteIntRes_IS_FPCLASS(SDNode *N);
368
369 // Integer Operand Promotion.
370 bool PromoteIntegerOperand(SDNode *N, unsigned OpNo);
371 SDValue PromoteIntOp_ANY_EXTEND(SDNode *N);
372 SDValue PromoteIntOp_ATOMIC_STORE(AtomicSDNode *N);
373 SDValue PromoteIntOp_BITCAST(SDNode *N);
374 SDValue PromoteIntOp_BUILD_PAIR(SDNode *N);
375 SDValue PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo);
376 SDValue PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo);
377 SDValue PromoteIntOp_BUILD_VECTOR(SDNode *N);
378 SDValue PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo);
379 SDValue PromoteIntOp_EXTRACT_VECTOR_ELT(SDNode *N);
380 SDValue PromoteIntOp_EXTRACT_SUBVECTOR(SDNode *N);
381 SDValue PromoteIntOp_INSERT_SUBVECTOR(SDNode *N);
382 SDValue PromoteIntOp_CONCAT_VECTORS(SDNode *N);
383 SDValue PromoteIntOp_ScalarOp(SDNode *N);
384 SDValue PromoteIntOp_SELECT(SDNode *N, unsigned OpNo);
385 SDValue PromoteIntOp_SELECT_CC(SDNode *N, unsigned OpNo);
386 SDValue PromoteIntOp_SETCC(SDNode *N, unsigned OpNo);
387 SDValue PromoteIntOp_Shift(SDNode *N);
388 SDValue PromoteIntOp_FunnelShift(SDNode *N);
389 SDValue PromoteIntOp_SIGN_EXTEND(SDNode *N);
390 SDValue PromoteIntOp_VP_SIGN_EXTEND(SDNode *N);
391 SDValue PromoteIntOp_SINT_TO_FP(SDNode *N);
392 SDValue PromoteIntOp_STRICT_SINT_TO_FP(SDNode *N);
393 SDValue PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo);
394 SDValue PromoteIntOp_TRUNCATE(SDNode *N);
395 SDValue PromoteIntOp_UINT_TO_FP(SDNode *N);
396 SDValue PromoteIntOp_STRICT_UINT_TO_FP(SDNode *N);
397 SDValue PromoteIntOp_ZERO_EXTEND(SDNode *N);
398 SDValue PromoteIntOp_VP_ZERO_EXTEND(SDNode *N);
399 SDValue PromoteIntOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo);
400 SDValue PromoteIntOp_MLOAD(MaskedLoadSDNode *N, unsigned OpNo);
401 SDValue PromoteIntOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo);
402 SDValue PromoteIntOp_MGATHER(MaskedGatherSDNode *N, unsigned OpNo);
403 SDValue PromoteIntOp_ADDSUBO_CARRY(SDNode *N, unsigned OpNo);
404 SDValue PromoteIntOp_FRAMERETURNADDR(SDNode *N);
405 SDValue PromoteIntOp_FIX(SDNode *N);
406 SDValue PromoteIntOp_ExpOp(SDNode *N);
407 SDValue PromoteIntOp_VECREDUCE(SDNode *N);
408 SDValue PromoteIntOp_VP_REDUCE(SDNode *N, unsigned OpNo);
409 SDValue PromoteIntOp_SET_ROUNDING(SDNode *N);
410 SDValue PromoteIntOp_STACKMAP(SDNode *N, unsigned OpNo);
411 SDValue PromoteIntOp_PATCHPOINT(SDNode *N, unsigned OpNo);
412 SDValue PromoteIntOp_VP_STRIDED(SDNode *N, unsigned OpNo);
413
414 void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code);
415
416 //===--------------------------------------------------------------------===//
417 // Integer Expansion Support: LegalizeIntegerTypes.cpp
418 //===--------------------------------------------------------------------===//
419
420 /// Given a processed operand Op which was expanded into two integers of half
421 /// the size, this returns the two halves. The low bits of Op are exactly
422 /// equal to the bits of Lo; the high bits exactly equal Hi.
423 /// For example, if Op is an i64 which was expanded into two i32's, then this
424 /// method returns the two i32's, with Lo being equal to the lower 32 bits of
425 /// Op, and Hi being equal to the upper 32 bits.
426 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
427 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi);
428
429 // Integer Result Expansion.
430 void ExpandIntegerResult(SDNode *N, unsigned ResNo);
431 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
432 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi);
433 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi);
434 void ExpandIntRes_Constant (SDNode *N, SDValue &Lo, SDValue &Hi);
435 void ExpandIntRes_ABS (SDNode *N, SDValue &Lo, SDValue &Hi);
436 void ExpandIntRes_CTLZ (SDNode *N, SDValue &Lo, SDValue &Hi);
437 void ExpandIntRes_CTPOP (SDNode *N, SDValue &Lo, SDValue &Hi);
438 void ExpandIntRes_CTTZ (SDNode *N, SDValue &Lo, SDValue &Hi);
439 void ExpandIntRes_LOAD (LoadSDNode *N, SDValue &Lo, SDValue &Hi);
440 void ExpandIntRes_READCYCLECOUNTER (SDNode *N, SDValue &Lo, SDValue &Hi);
441 void ExpandIntRes_SIGN_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
442 void ExpandIntRes_SIGN_EXTEND_INREG (SDNode *N, SDValue &Lo, SDValue &Hi);
443 void ExpandIntRes_TRUNCATE (SDNode *N, SDValue &Lo, SDValue &Hi);
444 void ExpandIntRes_ZERO_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
445 void ExpandIntRes_GET_ROUNDING (SDNode *N, SDValue &Lo, SDValue &Hi);
446 void ExpandIntRes_FP_TO_XINT (SDNode *N, SDValue &Lo, SDValue &Hi);
447 void ExpandIntRes_FP_TO_XINT_SAT (SDNode *N, SDValue &Lo, SDValue &Hi);
448 void ExpandIntRes_XROUND_XRINT (SDNode *N, SDValue &Lo, SDValue &Hi);
449
450 void ExpandIntRes_Logical (SDNode *N, SDValue &Lo, SDValue &Hi);
451 void ExpandIntRes_ADDSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
452 void ExpandIntRes_ADDSUBC (SDNode *N, SDValue &Lo, SDValue &Hi);
453 void ExpandIntRes_ADDSUBE (SDNode *N, SDValue &Lo, SDValue &Hi);
454 void ExpandIntRes_UADDSUBO_CARRY (SDNode *N, SDValue &Lo, SDValue &Hi);
455 void ExpandIntRes_SADDSUBO_CARRY (SDNode *N, SDValue &Lo, SDValue &Hi);
456 void ExpandIntRes_BITREVERSE (SDNode *N, SDValue &Lo, SDValue &Hi);
457 void ExpandIntRes_BSWAP (SDNode *N, SDValue &Lo, SDValue &Hi);
458 void ExpandIntRes_PARITY (SDNode *N, SDValue &Lo, SDValue &Hi);
459 void ExpandIntRes_MUL (SDNode *N, SDValue &Lo, SDValue &Hi);
460 void ExpandIntRes_SDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
461 void ExpandIntRes_SREM (SDNode *N, SDValue &Lo, SDValue &Hi);
462 void ExpandIntRes_UDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
463 void ExpandIntRes_UREM (SDNode *N, SDValue &Lo, SDValue &Hi);
464 void ExpandIntRes_ShiftThroughStack (SDNode *N, SDValue &Lo, SDValue &Hi);
465 void ExpandIntRes_Shift (SDNode *N, SDValue &Lo, SDValue &Hi);
466
467 void ExpandIntRes_MINMAX (SDNode *N, SDValue &Lo, SDValue &Hi);
468
469 void ExpandIntRes_SADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
470 void ExpandIntRes_UADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
471 void ExpandIntRes_XMULO (SDNode *N, SDValue &Lo, SDValue &Hi);
472 void ExpandIntRes_ADDSUBSAT (SDNode *N, SDValue &Lo, SDValue &Hi);
473 void ExpandIntRes_SHLSAT (SDNode *N, SDValue &Lo, SDValue &Hi);
474 void ExpandIntRes_MULFIX (SDNode *N, SDValue &Lo, SDValue &Hi);
475 void ExpandIntRes_DIVFIX (SDNode *N, SDValue &Lo, SDValue &Hi);
476
477 void ExpandIntRes_ATOMIC_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
478 void ExpandIntRes_VECREDUCE (SDNode *N, SDValue &Lo, SDValue &Hi);
479
480 void ExpandIntRes_Rotate (SDNode *N, SDValue &Lo, SDValue &Hi);
481 void ExpandIntRes_FunnelShift (SDNode *N, SDValue &Lo, SDValue &Hi);
482
483 void ExpandIntRes_VSCALE (SDNode *N, SDValue &Lo, SDValue &Hi);
484
485 void ExpandShiftByConstant(SDNode *N, const APInt &Amt,
486 SDValue &Lo, SDValue &Hi);
487 bool ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
488 bool ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
489
490 // Integer Operand Expansion.
491 bool ExpandIntegerOperand(SDNode *N, unsigned OpNo);
492 SDValue ExpandIntOp_BR_CC(SDNode *N);
493 SDValue ExpandIntOp_SELECT_CC(SDNode *N);
494 SDValue ExpandIntOp_SETCC(SDNode *N);
495 SDValue ExpandIntOp_SETCCCARRY(SDNode *N);
496 SDValue ExpandIntOp_Shift(SDNode *N);
497 SDValue ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo);
498 SDValue ExpandIntOp_TRUNCATE(SDNode *N);
499 SDValue ExpandIntOp_XINT_TO_FP(SDNode *N);
500 SDValue ExpandIntOp_RETURNADDR(SDNode *N);
501 SDValue ExpandIntOp_ATOMIC_STORE(SDNode *N);
502 SDValue ExpandIntOp_SPLAT_VECTOR(SDNode *N);
503 SDValue ExpandIntOp_STACKMAP(SDNode *N, unsigned OpNo);
504 SDValue ExpandIntOp_PATCHPOINT(SDNode *N, unsigned OpNo);
505 SDValue ExpandIntOp_VP_STRIDED(SDNode *N, unsigned OpNo);
506
507 void IntegerExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
508 ISD::CondCode &CCCode, const SDLoc &dl);
509
510 //===--------------------------------------------------------------------===//
511 // Float to Integer Conversion Support: LegalizeFloatTypes.cpp
512 //===--------------------------------------------------------------------===//
513
514 /// GetSoftenedFloat - Given a processed operand Op which was converted to an
515 /// integer of the same size, this returns the integer. The integer contains
516 /// exactly the same bits as Op - only the type changed. For example, if Op
517 /// is an f32 which was softened to an i32, then this method returns an i32,
518 /// the bits of which coincide with those of Op
519 SDValue GetSoftenedFloat(SDValue Op) {
520 TableId Id = getTableId(Op);
521 auto Iter = SoftenedFloats.find(Id);
522 if (Iter == SoftenedFloats.end()) {
523 assert(isSimpleLegalType(Op.getValueType()) &&
524 "Operand wasn't converted to integer?");
525 return Op;
526 }
527 SDValue SoftenedOp = getSDValue(Iter->second);
528 assert(SoftenedOp.getNode() && "Unconverted op in SoftenedFloats?");
529 return SoftenedOp;
530 }
531 void SetSoftenedFloat(SDValue Op, SDValue Result);
532
533 // Convert Float Results to Integer.
534 void SoftenFloatResult(SDNode *N, unsigned ResNo);
535 SDValue SoftenFloatRes_Unary(SDNode *N, RTLIB::Libcall LC);
536 SDValue SoftenFloatRes_Binary(SDNode *N, RTLIB::Libcall LC);
537 SDValue SoftenFloatRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
538 SDValue SoftenFloatRes_ARITH_FENCE(SDNode *N);
539 SDValue SoftenFloatRes_BITCAST(SDNode *N);
540 SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N);
541 SDValue SoftenFloatRes_ConstantFP(SDNode *N);
542 SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo);
543 SDValue SoftenFloatRes_FABS(SDNode *N);
544 SDValue SoftenFloatRes_FMINNUM(SDNode *N);
545 SDValue SoftenFloatRes_FMAXNUM(SDNode *N);
546 SDValue SoftenFloatRes_FADD(SDNode *N);
547 SDValue SoftenFloatRes_FCBRT(SDNode *N);
548 SDValue SoftenFloatRes_FCEIL(SDNode *N);
549 SDValue SoftenFloatRes_FCOPYSIGN(SDNode *N);
550 SDValue SoftenFloatRes_FCOS(SDNode *N);
551 SDValue SoftenFloatRes_FDIV(SDNode *N);
552 SDValue SoftenFloatRes_FEXP(SDNode *N);
553 SDValue SoftenFloatRes_FEXP2(SDNode *N);
554 SDValue SoftenFloatRes_FEXP10(SDNode *N);
555 SDValue SoftenFloatRes_FFLOOR(SDNode *N);
556 SDValue SoftenFloatRes_FLOG(SDNode *N);
557 SDValue SoftenFloatRes_FLOG2(SDNode *N);
558 SDValue SoftenFloatRes_FLOG10(SDNode *N);
559 SDValue SoftenFloatRes_FMA(SDNode *N);
560 SDValue SoftenFloatRes_FMUL(SDNode *N);
561 SDValue SoftenFloatRes_FNEARBYINT(SDNode *N);
562 SDValue SoftenFloatRes_FNEG(SDNode *N);
563 SDValue SoftenFloatRes_FP_EXTEND(SDNode *N);
564 SDValue SoftenFloatRes_FP16_TO_FP(SDNode *N);
565 SDValue SoftenFloatRes_BF16_TO_FP(SDNode *N);
566 SDValue SoftenFloatRes_FP_ROUND(SDNode *N);
567 SDValue SoftenFloatRes_FPOW(SDNode *N);
568 SDValue SoftenFloatRes_ExpOp(SDNode *N);
569 SDValue SoftenFloatRes_FFREXP(SDNode *N);
570 SDValue SoftenFloatRes_FREEZE(SDNode *N);
571 SDValue SoftenFloatRes_FREM(SDNode *N);
572 SDValue SoftenFloatRes_FRINT(SDNode *N);
573 SDValue SoftenFloatRes_FROUND(SDNode *N);
574 SDValue SoftenFloatRes_FROUNDEVEN(SDNode *N);
575 SDValue SoftenFloatRes_FSIN(SDNode *N);
576 SDValue SoftenFloatRes_FSQRT(SDNode *N);
577 SDValue SoftenFloatRes_FSUB(SDNode *N);
578 SDValue SoftenFloatRes_FTRUNC(SDNode *N);
579 SDValue SoftenFloatRes_LOAD(SDNode *N);
580 SDValue SoftenFloatRes_SELECT(SDNode *N);
581 SDValue SoftenFloatRes_SELECT_CC(SDNode *N);
582 SDValue SoftenFloatRes_UNDEF(SDNode *N);
583 SDValue SoftenFloatRes_VAARG(SDNode *N);
584 SDValue SoftenFloatRes_XINT_TO_FP(SDNode *N);
585 SDValue SoftenFloatRes_VECREDUCE(SDNode *N);
586 SDValue SoftenFloatRes_VECREDUCE_SEQ(SDNode *N);
587
588 // Convert Float Operand to Integer.
589 bool SoftenFloatOperand(SDNode *N, unsigned OpNo);
590 SDValue SoftenFloatOp_Unary(SDNode *N, RTLIB::Libcall LC);
591 SDValue SoftenFloatOp_BITCAST(SDNode *N);
592 SDValue SoftenFloatOp_BR_CC(SDNode *N);
593 SDValue SoftenFloatOp_FP_ROUND(SDNode *N);
594 SDValue SoftenFloatOp_FP_TO_XINT(SDNode *N);
595 SDValue SoftenFloatOp_FP_TO_XINT_SAT(SDNode *N);
596 SDValue SoftenFloatOp_LROUND(SDNode *N);
597 SDValue SoftenFloatOp_LLROUND(SDNode *N);
598 SDValue SoftenFloatOp_LRINT(SDNode *N);
599 SDValue SoftenFloatOp_LLRINT(SDNode *N);
600 SDValue SoftenFloatOp_SELECT_CC(SDNode *N);
601 SDValue SoftenFloatOp_SETCC(SDNode *N);
602 SDValue SoftenFloatOp_STORE(SDNode *N, unsigned OpNo);
603 SDValue SoftenFloatOp_FCOPYSIGN(SDNode *N);
604
605 //===--------------------------------------------------------------------===//
606 // Float Expansion Support: LegalizeFloatTypes.cpp
607 //===--------------------------------------------------------------------===//
608
609 /// Given a processed operand Op which was expanded into two floating-point
610 /// values of half the size, this returns the two halves.
611 /// The low bits of Op are exactly equal to the bits of Lo; the high bits
612 /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded
613 /// into two f64's, then this method returns the two f64's, with Lo being
614 /// equal to the lower 64 bits of Op, and Hi to the upper 64 bits.
615 void GetExpandedFloat(SDValue Op, SDValue &Lo, SDValue &Hi);
616 void SetExpandedFloat(SDValue Op, SDValue Lo, SDValue Hi);
617
618 // Float Result Expansion.
619 void ExpandFloatResult(SDNode *N, unsigned ResNo);
620 void ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi);
621 void ExpandFloatRes_Unary(SDNode *N, RTLIB::Libcall LC,
622 SDValue &Lo, SDValue &Hi);
623 void ExpandFloatRes_Binary(SDNode *N, RTLIB::Libcall LC,
624 SDValue &Lo, SDValue &Hi);
625 void ExpandFloatRes_FABS (SDNode *N, SDValue &Lo, SDValue &Hi);
626 void ExpandFloatRes_FMINNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
627 void ExpandFloatRes_FMAXNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
628 void ExpandFloatRes_FADD (SDNode *N, SDValue &Lo, SDValue &Hi);
629 void ExpandFloatRes_FCBRT (SDNode *N, SDValue &Lo, SDValue &Hi);
630 void ExpandFloatRes_FCEIL (SDNode *N, SDValue &Lo, SDValue &Hi);
631 void ExpandFloatRes_FCOPYSIGN (SDNode *N, SDValue &Lo, SDValue &Hi);
632 void ExpandFloatRes_FCOS (SDNode *N, SDValue &Lo, SDValue &Hi);
633 void ExpandFloatRes_FDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
634 void ExpandFloatRes_FEXP (SDNode *N, SDValue &Lo, SDValue &Hi);
635 void ExpandFloatRes_FEXP2 (SDNode *N, SDValue &Lo, SDValue &Hi);
636 void ExpandFloatRes_FEXP10 (SDNode *N, SDValue &Lo, SDValue &Hi);
637 void ExpandFloatRes_FFLOOR (SDNode *N, SDValue &Lo, SDValue &Hi);
638 void ExpandFloatRes_FLOG (SDNode *N, SDValue &Lo, SDValue &Hi);
639 void ExpandFloatRes_FLOG2 (SDNode *N, SDValue &Lo, SDValue &Hi);
640 void ExpandFloatRes_FLOG10 (SDNode *N, SDValue &Lo, SDValue &Hi);
641 void ExpandFloatRes_FMA (SDNode *N, SDValue &Lo, SDValue &Hi);
642 void ExpandFloatRes_FMUL (SDNode *N, SDValue &Lo, SDValue &Hi);
643 void ExpandFloatRes_FNEARBYINT(SDNode *N, SDValue &Lo, SDValue &Hi);
644 void ExpandFloatRes_FNEG (SDNode *N, SDValue &Lo, SDValue &Hi);
645 void ExpandFloatRes_FP_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
646 void ExpandFloatRes_FPOW (SDNode *N, SDValue &Lo, SDValue &Hi);
647 void ExpandFloatRes_FPOWI (SDNode *N, SDValue &Lo, SDValue &Hi);
648 void ExpandFloatRes_FLDEXP (SDNode *N, SDValue &Lo, SDValue &Hi);
649 void ExpandFloatRes_FREEZE (SDNode *N, SDValue &Lo, SDValue &Hi);
650 void ExpandFloatRes_FREM (SDNode *N, SDValue &Lo, SDValue &Hi);
651 void ExpandFloatRes_FRINT (SDNode *N, SDValue &Lo, SDValue &Hi);
652 void ExpandFloatRes_FROUND (SDNode *N, SDValue &Lo, SDValue &Hi);
653 void ExpandFloatRes_FROUNDEVEN(SDNode *N, SDValue &Lo, SDValue &Hi);
654 void ExpandFloatRes_FSIN (SDNode *N, SDValue &Lo, SDValue &Hi);
655 void ExpandFloatRes_FSQRT (SDNode *N, SDValue &Lo, SDValue &Hi);
656 void ExpandFloatRes_FSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
657 void ExpandFloatRes_FTRUNC (SDNode *N, SDValue &Lo, SDValue &Hi);
658 void ExpandFloatRes_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
659 void ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, SDValue &Hi);
660
661 // Float Operand Expansion.
662 bool ExpandFloatOperand(SDNode *N, unsigned OpNo);
663 SDValue ExpandFloatOp_BR_CC(SDNode *N);
664 SDValue ExpandFloatOp_FCOPYSIGN(SDNode *N);
665 SDValue ExpandFloatOp_FP_ROUND(SDNode *N);
666 SDValue ExpandFloatOp_FP_TO_XINT(SDNode *N);
667 SDValue ExpandFloatOp_LROUND(SDNode *N);
668 SDValue ExpandFloatOp_LLROUND(SDNode *N);
669 SDValue ExpandFloatOp_LRINT(SDNode *N);
670 SDValue ExpandFloatOp_LLRINT(SDNode *N);
671 SDValue ExpandFloatOp_SELECT_CC(SDNode *N);
672 SDValue ExpandFloatOp_SETCC(SDNode *N);
673 SDValue ExpandFloatOp_STORE(SDNode *N, unsigned OpNo);
674
675 void FloatExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
676 ISD::CondCode &CCCode, const SDLoc &dl,
677 SDValue &Chain, bool IsSignaling = false);
678
679 //===--------------------------------------------------------------------===//
680 // Float promotion support: LegalizeFloatTypes.cpp
681 //===--------------------------------------------------------------------===//
682
683 SDValue GetPromotedFloat(SDValue Op) {
684 TableId &PromotedId = PromotedFloats[getTableId(Op)];
685 SDValue PromotedOp = getSDValue(PromotedId);
686 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
687 return PromotedOp;
688 }
689 void SetPromotedFloat(SDValue Op, SDValue Result);
690
691 void PromoteFloatResult(SDNode *N, unsigned ResNo);
692 SDValue PromoteFloatRes_BITCAST(SDNode *N);
693 SDValue PromoteFloatRes_BinOp(SDNode *N);
694 SDValue PromoteFloatRes_ConstantFP(SDNode *N);
695 SDValue PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N);
696 SDValue PromoteFloatRes_FCOPYSIGN(SDNode *N);
697 SDValue PromoteFloatRes_FMAD(SDNode *N);
698 SDValue PromoteFloatRes_ExpOp(SDNode *N);
699 SDValue PromoteFloatRes_FFREXP(SDNode *N);
700 SDValue PromoteFloatRes_FP_ROUND(SDNode *N);
701 SDValue PromoteFloatRes_LOAD(SDNode *N);
702 SDValue PromoteFloatRes_SELECT(SDNode *N);
703 SDValue PromoteFloatRes_SELECT_CC(SDNode *N);
704 SDValue PromoteFloatRes_UnaryOp(SDNode *N);
705 SDValue PromoteFloatRes_UNDEF(SDNode *N);
706 SDValue BitcastToInt_ATOMIC_SWAP(SDNode *N);
707 SDValue PromoteFloatRes_XINT_TO_FP(SDNode *N);
708 SDValue PromoteFloatRes_VECREDUCE(SDNode *N);
709 SDValue PromoteFloatRes_VECREDUCE_SEQ(SDNode *N);
710
711 bool PromoteFloatOperand(SDNode *N, unsigned OpNo);
712 SDValue PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo);
713 SDValue PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo);
714 SDValue PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo);
715 SDValue PromoteFloatOp_UnaryOp(SDNode *N, unsigned OpNo);
716 SDValue PromoteFloatOp_FP_TO_XINT_SAT(SDNode *N, unsigned OpNo);
717 SDValue PromoteFloatOp_STORE(SDNode *N, unsigned OpNo);
718 SDValue PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo);
719 SDValue PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo);
720
721 //===--------------------------------------------------------------------===//
722 // Half soft promotion support: LegalizeFloatTypes.cpp
723 //===--------------------------------------------------------------------===//
724
725 SDValue GetSoftPromotedHalf(SDValue Op) {
726 TableId &PromotedId = SoftPromotedHalfs[getTableId(Op)];
727 SDValue PromotedOp = getSDValue(PromotedId);
728 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
729 return PromotedOp;
730 }
731 void SetSoftPromotedHalf(SDValue Op, SDValue Result);
732
733 void SoftPromoteHalfResult(SDNode *N, unsigned ResNo);
734 SDValue SoftPromoteHalfRes_BinOp(SDNode *N);
735 SDValue SoftPromoteHalfRes_BITCAST(SDNode *N);
736 SDValue SoftPromoteHalfRes_ConstantFP(SDNode *N);
737 SDValue SoftPromoteHalfRes_EXTRACT_VECTOR_ELT(SDNode *N);
738 SDValue SoftPromoteHalfRes_FCOPYSIGN(SDNode *N);
739 SDValue SoftPromoteHalfRes_FMAD(SDNode *N);
740 SDValue SoftPromoteHalfRes_ExpOp(SDNode *N);
741 SDValue SoftPromoteHalfRes_FP_ROUND(SDNode *N);
742 SDValue SoftPromoteHalfRes_LOAD(SDNode *N);
743 SDValue SoftPromoteHalfRes_SELECT(SDNode *N);
744 SDValue SoftPromoteHalfRes_SELECT_CC(SDNode *N);
745 SDValue SoftPromoteHalfRes_UnaryOp(SDNode *N);
746 SDValue SoftPromoteHalfRes_XINT_TO_FP(SDNode *N);
747 SDValue SoftPromoteHalfRes_UNDEF(SDNode *N);
748 SDValue SoftPromoteHalfRes_VECREDUCE(SDNode *N);
749 SDValue SoftPromoteHalfRes_VECREDUCE_SEQ(SDNode *N);
750
751 bool SoftPromoteHalfOperand(SDNode *N, unsigned OpNo);
752 SDValue SoftPromoteHalfOp_BITCAST(SDNode *N);
753 SDValue SoftPromoteHalfOp_FCOPYSIGN(SDNode *N, unsigned OpNo);
754 SDValue SoftPromoteHalfOp_FP_EXTEND(SDNode *N);
755 SDValue SoftPromoteHalfOp_FP_TO_XINT(SDNode *N);
756 SDValue SoftPromoteHalfOp_FP_TO_XINT_SAT(SDNode *N);
757 SDValue SoftPromoteHalfOp_SETCC(SDNode *N);
758 SDValue SoftPromoteHalfOp_SELECT_CC(SDNode *N, unsigned OpNo);
759 SDValue SoftPromoteHalfOp_STORE(SDNode *N, unsigned OpNo);
760 SDValue SoftPromoteHalfOp_STACKMAP(SDNode *N, unsigned OpNo);
761 SDValue SoftPromoteHalfOp_PATCHPOINT(SDNode *N, unsigned OpNo);
762
763 //===--------------------------------------------------------------------===//
764 // Scalarization Support: LegalizeVectorTypes.cpp
765 //===--------------------------------------------------------------------===//
766
767 /// Given a processed one-element vector Op which was scalarized to its
768 /// element type, this returns the element. For example, if Op is a v1i32,
769 /// Op = < i32 val >, this method returns val, an i32.
770 SDValue GetScalarizedVector(SDValue Op) {
771 TableId &ScalarizedId = ScalarizedVectors[getTableId(Op)];
772 SDValue ScalarizedOp = getSDValue(ScalarizedId);
773 assert(ScalarizedOp.getNode() && "Operand wasn't scalarized?");
774 return ScalarizedOp;
775 }
776 void SetScalarizedVector(SDValue Op, SDValue Result);
777
778 // Vector Result Scalarization: <1 x ty> -> ty.
779 void ScalarizeVectorResult(SDNode *N, unsigned ResNo);
780 SDValue ScalarizeVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
781 SDValue ScalarizeVecRes_BinOp(SDNode *N);
782 SDValue ScalarizeVecRes_TernaryOp(SDNode *N);
783 SDValue ScalarizeVecRes_UnaryOp(SDNode *N);
784 SDValue ScalarizeVecRes_StrictFPOp(SDNode *N);
785 SDValue ScalarizeVecRes_OverflowOp(SDNode *N, unsigned ResNo);
786 SDValue ScalarizeVecRes_InregOp(SDNode *N);
787 SDValue ScalarizeVecRes_VecInregOp(SDNode *N);
788
789 SDValue ScalarizeVecRes_BITCAST(SDNode *N);
790 SDValue ScalarizeVecRes_BUILD_VECTOR(SDNode *N);
791 SDValue ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N);
792 SDValue ScalarizeVecRes_FP_ROUND(SDNode *N);
793 SDValue ScalarizeVecRes_ExpOp(SDNode *N);
794 SDValue ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N);
795 SDValue ScalarizeVecRes_LOAD(LoadSDNode *N);
796 SDValue ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N);
797 SDValue ScalarizeVecRes_VSELECT(SDNode *N);
798 SDValue ScalarizeVecRes_SELECT(SDNode *N);
799 SDValue ScalarizeVecRes_SELECT_CC(SDNode *N);
800 SDValue ScalarizeVecRes_SETCC(SDNode *N);
801 SDValue ScalarizeVecRes_UNDEF(SDNode *N);
802 SDValue ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N);
803 SDValue ScalarizeVecRes_FP_TO_XINT_SAT(SDNode *N);
804 SDValue ScalarizeVecRes_IS_FPCLASS(SDNode *N);
805
806 SDValue ScalarizeVecRes_FIX(SDNode *N);
807 SDValue ScalarizeVecRes_FFREXP(SDNode *N, unsigned ResNo);
808
809 // Vector Operand Scalarization: <1 x ty> -> ty.
810 bool ScalarizeVectorOperand(SDNode *N, unsigned OpNo);
811 SDValue ScalarizeVecOp_BITCAST(SDNode *N);
812 SDValue ScalarizeVecOp_UnaryOp(SDNode *N);
813 SDValue ScalarizeVecOp_UnaryOp_StrictFP(SDNode *N);
814 SDValue ScalarizeVecOp_CONCAT_VECTORS(SDNode *N);
815 SDValue ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
816 SDValue ScalarizeVecOp_VSELECT(SDNode *N);
817 SDValue ScalarizeVecOp_VSETCC(SDNode *N);
818 SDValue ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo);
819 SDValue ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo);
820 SDValue ScalarizeVecOp_STRICT_FP_ROUND(SDNode *N, unsigned OpNo);
821 SDValue ScalarizeVecOp_FP_EXTEND(SDNode *N);
822 SDValue ScalarizeVecOp_STRICT_FP_EXTEND(SDNode *N);
823 SDValue ScalarizeVecOp_VECREDUCE(SDNode *N);
824 SDValue ScalarizeVecOp_VECREDUCE_SEQ(SDNode *N);
825
826 //===--------------------------------------------------------------------===//
827 // Vector Splitting Support: LegalizeVectorTypes.cpp
828 //===--------------------------------------------------------------------===//
829
830 /// Given a processed vector Op which was split into vectors of half the size,
831 /// this method returns the halves. The first elements of Op coincide with the
832 /// elements of Lo; the remaining elements of Op coincide with the elements of
833 /// Hi: Op is what you would get by concatenating Lo and Hi.
834 /// For example, if Op is a v8i32 that was split into two v4i32's, then this
835 /// method returns the two v4i32's, with Lo corresponding to the first 4
836 /// elements of Op, and Hi to the last 4 elements.
837 void GetSplitVector(SDValue Op, SDValue &Lo, SDValue &Hi);
838 void SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi);
839
840 /// Split mask operator of a VP intrinsic.
841 std::pair<SDValue, SDValue> SplitMask(SDValue Mask);
842
843 /// Split mask operator of a VP intrinsic in a given location.
844 std::pair<SDValue, SDValue> SplitMask(SDValue Mask, const SDLoc &DL);
845
846 // Helper function for incrementing the pointer when splitting
847 // memory operations
848 void IncrementPointer(MemSDNode *N, EVT MemVT, MachinePointerInfo &MPI,
849 SDValue &Ptr, uint64_t *ScaledOffset = nullptr);
850
851 // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>.
852 void SplitVectorResult(SDNode *N, unsigned ResNo);
853 void SplitVecRes_BinOp(SDNode *N, SDValue &Lo, SDValue &Hi);
854 void SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
855 void SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
856 void SplitVecRes_FFREXP(SDNode *N, unsigned ResNo, SDValue &Lo, SDValue &Hi);
857 void SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo, SDValue &Hi);
858 void SplitVecRes_InregOp(SDNode *N, SDValue &Lo, SDValue &Hi);
859 void SplitVecRes_ExtVecInRegOp(SDNode *N, SDValue &Lo, SDValue &Hi);
860 void SplitVecRes_StrictFPOp(SDNode *N, SDValue &Lo, SDValue &Hi);
861 void SplitVecRes_OverflowOp(SDNode *N, unsigned ResNo,
862 SDValue &Lo, SDValue &Hi);
863
864 void SplitVecRes_FIX(SDNode *N, SDValue &Lo, SDValue &Hi);
865
866 void SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi);
867 void SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
868 void SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi);
869 void SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
870 void SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
871 void SplitVecRes_FPOp_MultiType(SDNode *N, SDValue &Lo, SDValue &Hi);
872 void SplitVecRes_IS_FPCLASS(SDNode *N, SDValue &Lo, SDValue &Hi);
873 void SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
874 void SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo, SDValue &Hi);
875 void SplitVecRes_VP_LOAD(VPLoadSDNode *LD, SDValue &Lo, SDValue &Hi);
876 void SplitVecRes_VP_STRIDED_LOAD(VPStridedLoadSDNode *SLD, SDValue &Lo,
877 SDValue &Hi);
878 void SplitVecRes_MLOAD(MaskedLoadSDNode *MLD, SDValue &Lo, SDValue &Hi);
879 void SplitVecRes_Gather(MemSDNode *VPGT, SDValue &Lo, SDValue &Hi,
880 bool SplitSETCC = false);
881 void SplitVecRes_ScalarOp(SDNode *N, SDValue &Lo, SDValue &Hi);
882 void SplitVecRes_STEP_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
883 void SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi);
884 void SplitVecRes_VECTOR_REVERSE(SDNode *N, SDValue &Lo, SDValue &Hi);
885 void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, SDValue &Lo,
886 SDValue &Hi);
887 void SplitVecRes_VECTOR_SPLICE(SDNode *N, SDValue &Lo, SDValue &Hi);
888 void SplitVecRes_VECTOR_DEINTERLEAVE(SDNode *N);
889 void SplitVecRes_VECTOR_INTERLEAVE(SDNode *N);
890 void SplitVecRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi);
891 void SplitVecRes_FP_TO_XINT_SAT(SDNode *N, SDValue &Lo, SDValue &Hi);
892 void SplitVecRes_VP_REVERSE(SDNode *N, SDValue &Lo, SDValue &Hi);
893
894 // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>.
895 bool SplitVectorOperand(SDNode *N, unsigned OpNo);
896 SDValue SplitVecOp_VSELECT(SDNode *N, unsigned OpNo);
897 SDValue SplitVecOp_VECREDUCE(SDNode *N, unsigned OpNo);
898 SDValue SplitVecOp_VECREDUCE_SEQ(SDNode *N);
899 SDValue SplitVecOp_VP_REDUCE(SDNode *N, unsigned OpNo);
900 SDValue SplitVecOp_UnaryOp(SDNode *N);
901 SDValue SplitVecOp_TruncateHelper(SDNode *N);
902
903 SDValue SplitVecOp_BITCAST(SDNode *N);
904 SDValue SplitVecOp_INSERT_SUBVECTOR(SDNode *N, unsigned OpNo);
905 SDValue SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N);
906 SDValue SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
907 SDValue SplitVecOp_ExtVecInRegOp(SDNode *N);
908 SDValue SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo);
909 SDValue SplitVecOp_VP_STORE(VPStoreSDNode *N, unsigned OpNo);
910 SDValue SplitVecOp_VP_STRIDED_STORE(VPStridedStoreSDNode *N, unsigned OpNo);
911 SDValue SplitVecOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo);
912 SDValue SplitVecOp_Scatter(MemSDNode *N, unsigned OpNo);
913 SDValue SplitVecOp_Gather(MemSDNode *MGT, unsigned OpNo);
914 SDValue SplitVecOp_CONCAT_VECTORS(SDNode *N);
915 SDValue SplitVecOp_VSETCC(SDNode *N);
916 SDValue SplitVecOp_FP_ROUND(SDNode *N);
917 SDValue SplitVecOp_FPOpDifferentTypes(SDNode *N);
918 SDValue SplitVecOp_FP_TO_XINT_SAT(SDNode *N);
919
920 //===--------------------------------------------------------------------===//
921 // Vector Widening Support: LegalizeVectorTypes.cpp
922 //===--------------------------------------------------------------------===//
923
924 /// Given a processed vector Op which was widened into a larger vector, this
925 /// method returns the larger vector. The elements of the returned vector
926 /// consist of the elements of Op followed by elements containing rubbish.
927 /// For example, if Op is a v2i32 that was widened to a v4i32, then this
928 /// method returns a v4i32 for which the first two elements are the same as
929 /// those of Op, while the last two elements contain rubbish.
930 SDValue GetWidenedVector(SDValue Op) {
931 TableId &WidenedId = WidenedVectors[getTableId(Op)];
932 SDValue WidenedOp = getSDValue(WidenedId);
933 assert(WidenedOp.getNode() && "Operand wasn't widened?");
934 return WidenedOp;
935 }
936 void SetWidenedVector(SDValue Op, SDValue Result);
937
938 /// Given a mask Mask, returns the larger vector into which Mask was widened.
939 SDValue GetWidenedMask(SDValue Mask, ElementCount EC) {
940 // For VP operations, we must also widen the mask. Note that the mask type
941 // may not actually need widening, leading it be split along with the VP
942 // operation.
943 // FIXME: This could lead to an infinite split/widen loop. We only handle
944 // the case where the mask needs widening to an identically-sized type as
945 // the vector inputs.
946 assert(getTypeAction(Mask.getValueType()) ==
947 TargetLowering::TypeWidenVector &&
948 "Unable to widen binary VP op");
949 Mask = GetWidenedVector(Mask);
950 assert(Mask.getValueType().getVectorElementCount() == EC &&
951 "Unable to widen binary VP op");
952 return Mask;
953 }
954
955 // Widen Vector Result Promotion.
956 void WidenVectorResult(SDNode *N, unsigned ResNo);
957 SDValue WidenVecRes_MERGE_VALUES(SDNode* N, unsigned ResNo);
958 SDValue WidenVecRes_AssertZext(SDNode* N);
959 SDValue WidenVecRes_BITCAST(SDNode* N);
960 SDValue WidenVecRes_BUILD_VECTOR(SDNode* N);
961 SDValue WidenVecRes_CONCAT_VECTORS(SDNode* N);
962 SDValue WidenVecRes_EXTEND_VECTOR_INREG(SDNode* N);
963 SDValue WidenVecRes_EXTRACT_SUBVECTOR(SDNode* N);
964 SDValue WidenVecRes_INSERT_SUBVECTOR(SDNode *N);
965 SDValue WidenVecRes_INSERT_VECTOR_ELT(SDNode* N);
966 SDValue WidenVecRes_LOAD(SDNode* N);
967 SDValue WidenVecRes_VP_LOAD(VPLoadSDNode *N);
968 SDValue WidenVecRes_VP_STRIDED_LOAD(VPStridedLoadSDNode *N);
969 SDValue WidenVecRes_MLOAD(MaskedLoadSDNode* N);
970 SDValue WidenVecRes_MGATHER(MaskedGatherSDNode* N);
971 SDValue WidenVecRes_VP_GATHER(VPGatherSDNode* N);
972 SDValue WidenVecRes_ScalarOp(SDNode* N);
973 SDValue WidenVecRes_Select(SDNode *N);
974 SDValue WidenVSELECTMask(SDNode *N);
975 SDValue WidenVecRes_SELECT_CC(SDNode* N);
976 SDValue WidenVecRes_SETCC(SDNode* N);
977 SDValue WidenVecRes_STRICT_FSETCC(SDNode* N);
978 SDValue WidenVecRes_UNDEF(SDNode *N);
979 SDValue WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N);
980 SDValue WidenVecRes_VECTOR_REVERSE(SDNode *N);
981
982 SDValue WidenVecRes_Ternary(SDNode *N);
983 SDValue WidenVecRes_Binary(SDNode *N);
984 SDValue WidenVecRes_BinaryCanTrap(SDNode *N);
985 SDValue WidenVecRes_BinaryWithExtraScalarOp(SDNode *N);
986 SDValue WidenVecRes_StrictFP(SDNode *N);
987 SDValue WidenVecRes_OverflowOp(SDNode *N, unsigned ResNo);
988 SDValue WidenVecRes_Convert(SDNode *N);
989 SDValue WidenVecRes_Convert_StrictFP(SDNode *N);
990 SDValue WidenVecRes_FP_TO_XINT_SAT(SDNode *N);
991 SDValue WidenVecRes_XRINT(SDNode *N);
992 SDValue WidenVecRes_FCOPYSIGN(SDNode *N);
993 SDValue WidenVecRes_IS_FPCLASS(SDNode *N);
994 SDValue WidenVecRes_ExpOp(SDNode *N);
995 SDValue WidenVecRes_Unary(SDNode *N);
996 SDValue WidenVecRes_InregOp(SDNode *N);
997
998 // Widen Vector Operand.
999 bool WidenVectorOperand(SDNode *N, unsigned OpNo);
1000 SDValue WidenVecOp_BITCAST(SDNode *N);
1001 SDValue WidenVecOp_CONCAT_VECTORS(SDNode *N);
1002 SDValue WidenVecOp_EXTEND(SDNode *N);
1003 SDValue WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
1004 SDValue WidenVecOp_INSERT_SUBVECTOR(SDNode *N);
1005 SDValue WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N);
1006 SDValue WidenVecOp_EXTEND_VECTOR_INREG(SDNode *N);
1007 SDValue WidenVecOp_STORE(SDNode* N);
1008 SDValue WidenVecOp_VP_STORE(SDNode *N, unsigned OpNo);
1009 SDValue WidenVecOp_VP_STRIDED_STORE(SDNode *N, unsigned OpNo);
1010 SDValue WidenVecOp_MSTORE(SDNode* N, unsigned OpNo);
1011 SDValue WidenVecOp_MGATHER(SDNode* N, unsigned OpNo);
1012 SDValue WidenVecOp_MSCATTER(SDNode* N, unsigned OpNo);
1013 SDValue WidenVecOp_VP_SCATTER(SDNode* N, unsigned OpNo);
1014 SDValue WidenVecOp_SETCC(SDNode* N);
1015 SDValue WidenVecOp_STRICT_FSETCC(SDNode* N);
1016 SDValue WidenVecOp_VSELECT(SDNode *N);
1017
1018 SDValue WidenVecOp_Convert(SDNode *N);
1019 SDValue WidenVecOp_FP_TO_XINT_SAT(SDNode *N);
1020 SDValue WidenVecOp_UnrollVectorOp(SDNode *N);
1021 SDValue WidenVecOp_IS_FPCLASS(SDNode *N);
1022 SDValue WidenVecOp_VECREDUCE(SDNode *N);
1023 SDValue WidenVecOp_VECREDUCE_SEQ(SDNode *N);
1024 SDValue WidenVecOp_VP_REDUCE(SDNode *N);
1025 SDValue WidenVecOp_ExpOp(SDNode *N);
1026
1027 /// Helper function to generate a set of operations to perform
1028 /// a vector operation for a wider type.
1029 ///
1030 SDValue UnrollVectorOp_StrictFP(SDNode *N, unsigned ResNE);
1031
1032 //===--------------------------------------------------------------------===//
1033 // Vector Widening Utilities Support: LegalizeVectorTypes.cpp
1034 //===--------------------------------------------------------------------===//
1035
1036 /// Helper function to generate a set of loads to load a vector with a
1037 /// resulting wider type. It takes:
1038 /// LdChain: list of chains for the load to be generated.
1039 /// Ld: load to widen
1040 SDValue GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain,
1041 LoadSDNode *LD);
1042
1043 /// Helper function to generate a set of extension loads to load a vector with
1044 /// a resulting wider type. It takes:
1045 /// LdChain: list of chains for the load to be generated.
1046 /// Ld: load to widen
1047 /// ExtType: extension element type
1048 SDValue GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain,
1049 LoadSDNode *LD, ISD::LoadExtType ExtType);
1050
1051 /// Helper function to generate a set of stores to store a widen vector into
1052 /// non-widen memory. Returns true if successful, false otherwise.
1053 /// StChain: list of chains for the stores we have generated
1054 /// ST: store of a widen value
1055 bool GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain, StoreSDNode *ST);
1056
1057 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
1058 /// input vector must have the same element type as NVT.
1059 /// When FillWithZeroes is "on" the vector will be widened with zeroes.
1060 /// By default, the vector will be widened with undefined values.
1061 SDValue ModifyToType(SDValue InOp, EVT NVT, bool FillWithZeroes = false);
1062
1063 /// Return a mask of vector type MaskVT to replace InMask. Also adjust
1064 /// MaskVT to ToMaskVT if needed with vector extension or truncation.
1065 SDValue convertMask(SDValue InMask, EVT MaskVT, EVT ToMaskVT);
1066
1067 //===--------------------------------------------------------------------===//
1068 // Generic Splitting: LegalizeTypesGeneric.cpp
1069 //===--------------------------------------------------------------------===//
1070
1071 // Legalization methods which only use that the illegal type is split into two
1072 // not necessarily identical types. As such they can be used for splitting
1073 // vectors and expanding integers and floats.
1074
1075 void GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
1076 if (Op.getValueType().isVector())
1077 GetSplitVector(Op, Lo, Hi);
1078 else if (Op.getValueType().isInteger())
1079 GetExpandedInteger(Op, Lo, Hi);
1080 else
1081 GetExpandedFloat(Op, Lo, Hi);
1082 }
1083
1084 /// Use ISD::EXTRACT_ELEMENT nodes to extract the low and high parts of the
1085 /// given value.
1086 void GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi);
1087
1088 // Generic Result Splitting.
1089 void SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
1090 SDValue &Lo, SDValue &Hi);
1091 void SplitVecRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi);
1092 void SplitRes_ARITH_FENCE (SDNode *N, SDValue &Lo, SDValue &Hi);
1093 void SplitRes_Select (SDNode *N, SDValue &Lo, SDValue &Hi);
1094 void SplitRes_SELECT_CC (SDNode *N, SDValue &Lo, SDValue &Hi);
1095 void SplitRes_UNDEF (SDNode *N, SDValue &Lo, SDValue &Hi);
1096 void SplitRes_FREEZE (SDNode *N, SDValue &Lo, SDValue &Hi);
1097
1098 //===--------------------------------------------------------------------===//
1099 // Generic Expansion: LegalizeTypesGeneric.cpp
1100 //===--------------------------------------------------------------------===//
1101
1102 // Legalization methods which only use that the illegal type is split into two
1103 // identical types of half the size, and that the Lo/Hi part is stored first
1104 // in memory on little/big-endian machines, followed by the Hi/Lo part. As
1105 // such they can be used for expanding integers and floats.
1106
1107 void GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
1108 if (Op.getValueType().isInteger())
1109 GetExpandedInteger(Op, Lo, Hi);
1110 else
1111 GetExpandedFloat(Op, Lo, Hi);
1112 }
1113
1114
1115 /// This function will split the integer \p Op into \p NumElements
1116 /// operations of type \p EltVT and store them in \p Ops.
1117 void IntegerToVector(SDValue Op, unsigned NumElements,
1118 SmallVectorImpl<SDValue> &Ops, EVT EltVT);
1119
1120 // Generic Result Expansion.
1121 void ExpandRes_MERGE_VALUES (SDNode *N, unsigned ResNo,
1122 SDValue &Lo, SDValue &Hi);
1123 void ExpandRes_BITCAST (SDNode *N, SDValue &Lo, SDValue &Hi);
1124 void ExpandRes_BUILD_PAIR (SDNode *N, SDValue &Lo, SDValue &Hi);
1125 void ExpandRes_EXTRACT_ELEMENT (SDNode *N, SDValue &Lo, SDValue &Hi);
1126 void ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
1127 void ExpandRes_NormalLoad (SDNode *N, SDValue &Lo, SDValue &Hi);
1128 void ExpandRes_VAARG (SDNode *N, SDValue &Lo, SDValue &Hi);
1129
1130 // Generic Operand Expansion.
1131 SDValue ExpandOp_BITCAST (SDNode *N);
1132 SDValue ExpandOp_BUILD_VECTOR (SDNode *N);
1133 SDValue ExpandOp_EXTRACT_ELEMENT (SDNode *N);
1134 SDValue ExpandOp_INSERT_VECTOR_ELT(SDNode *N);
1135 SDValue ExpandOp_SCALAR_TO_VECTOR (SDNode *N);
1136 SDValue ExpandOp_NormalStore (SDNode *N, unsigned OpNo);
1137};
1138
1139} // end namespace llvm.
1140
1141#endif
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:75
From
BlockVerifier::State From
Definition: BlockVerifier.cpp:55
LLVM_LIBRARY_VISIBILITY
#define LLVM_LIBRARY_VISIBILITY
Definition: Compiler.h:131
DenseMap.h
This file defines the DenseMap class.
I
#define I(x, y, z)
Definition: MD5.cpp:58
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
TargetLowering.h
This file describes how to lower LLVM code to machine code.
RHS
Value * RHS
Definition: X86PartialReduction.cpp:76
LHS
Value * LHS
Definition: X86PartialReduction.cpp:75
Lo
support::ulittle16_t & Lo
Definition: aarch32.cpp:205
Hi
support::ulittle16_t & Hi
Definition: aarch32.cpp:204
llvm::DAGTypeLegalizer
This takes an arbitrary SelectionDAG as input and hacks on it until only value types the target machi...
Definition: LegalizeTypes.h:30
llvm::DAGTypeLegalizer::DAGTypeLegalizer
DAGTypeLegalizer(SelectionDAG &dag)
Definition: LegalizeTypes.h:167
llvm::DAGTypeLegalizer::NoteDeletion
void NoteDeletion(SDNode *Old, SDNode *New)
Definition: LegalizeTypes.h:179
llvm::DAGTypeLegalizer::getDAG
SelectionDAG & getDAG() const
Definition: LegalizeTypes.h:207
llvm::DAGTypeLegalizer::NodeIdFlags
NodeIdFlags
This pass uses the NodeId on the SDNodes to hold information about the state of the node.
Definition: LegalizeTypes.h:36
llvm::DWARFExpression::Operation
This class represents an Operation in the Expression.
Definition: DWARFExpression.h:32
llvm::SDNode
Represents one node in the SelectionDAG.
Definition: SelectionDAGNodes.h:472
llvm::SDNode::getNumValues
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
Definition: SelectionDAGNodes.h:992
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:145
llvm::SDValue::getNode
SDNode * getNode() const
get the SDNode which holds the desired result
Definition: SelectionDAGNodes.h:159
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:225
llvm::SelectionDAG::getZeroExtendInReg
SDValue getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT)
Return the expression required to zero extend the Op value assuming it was the smaller SrcTy value.
Definition: SelectionDAG.cpp:1522
llvm::SelectionDAG::getDataLayout
const DataLayout & getDataLayout() const
Definition: SelectionDAG.h:472
llvm::SelectionDAG::getValueType
SDValue getValueType(EVT)
Definition: SelectionDAG.cpp:1940
llvm::SelectionDAG::getNode
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
Definition: SelectionDAG.cpp:9699
llvm::SelectionDAG::getContext
LLVMContext * getContext() const
Definition: SelectionDAG.h:485
llvm::TargetLoweringBase::ValueTypeActionImpl::getTypeAction
LegalizeTypeAction getTypeAction(MVT VT) const
Definition: TargetLowering.h:1048
llvm::TargetLoweringBase::LegalizeTypeAction
LegalizeTypeAction
This enum indicates whether a types are legal for a target, and if not, what action should be used to...
Definition: TargetLowering.h:207
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3653
uint64_t
llvm::BitmaskEnumDetail::Mask
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:121
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
N
#define N
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:34
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