LLVM  15.0.0git
MipsTargetStreamer.cpp
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1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides Mips specific target streamer methods.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "MipsTargetStreamer.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsInstPrinter.h"
17 #include "MipsMCExpr.h"
18 #include "MipsMCTargetDesc.h"
19 #include "MipsTargetObjectFile.h"
20 #include "llvm/BinaryFormat/ELF.h"
21 #include "llvm/MC/MCAssembler.h"
22 #include "llvm/MC/MCContext.h"
23 #include "llvm/MC/MCSectionELF.h"
25 #include "llvm/MC/MCSymbolELF.h"
26 #include "llvm/Support/Casting.h"
30 
31 using namespace llvm;
32 
33 namespace {
34 static cl::opt<bool> RoundSectionSizes(
35  "mips-round-section-sizes", cl::init(false),
36  cl::desc("Round section sizes up to the section alignment"), cl::Hidden);
37 } // end anonymous namespace
38 
39 static bool isMicroMips(const MCSubtargetInfo *STI) {
40  return STI->getFeatureBits()[Mips::FeatureMicroMips];
41 }
42 
43 static bool isMips32r6(const MCSubtargetInfo *STI) {
44  return STI->getFeatureBits()[Mips::FeatureMips32r6];
45 }
46 
48  : MCTargetStreamer(S), GPReg(Mips::GP), ModuleDirectiveAllowed(true) {
50 }
73 }
83 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
84  unsigned ReturnReg) {}
85 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
86 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
87 }
90 }
111 }
114 }
123  // .cplocal $reg
124  // This directive forces to use the alternate register for context pointer.
125  // For example
126  // .cplocal $4
127  // jal foo
128  // expands to
129  // ld $25, %call16(foo)($4)
130  // jalr $25
131 
132  if (!getABI().IsN32() && !getABI().IsN64())
133  return;
134 
135  GPReg = RegNo;
136 
138 }
140  int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc,
141  const MCSubtargetInfo *STI) {
143  return true;
144 }
145 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
146  const MCSymbol &Sym, bool IsReg) {
147 }
148 void MipsTargetStreamer::emitDirectiveCpreturn(unsigned SaveLocation,
149  bool SaveLocationIsRegister) {}
150 
152 
155  report_fatal_error("+nooddspreg is only valid for O32");
156 }
169 }
173 }
174 
175 void MipsTargetStreamer::emitR(unsigned Opcode, unsigned Reg0, SMLoc IDLoc,
176  const MCSubtargetInfo *STI) {
177  MCInst TmpInst;
178  TmpInst.setOpcode(Opcode);
179  TmpInst.addOperand(MCOperand::createReg(Reg0));
180  TmpInst.setLoc(IDLoc);
181  getStreamer().emitInstruction(TmpInst, *STI);
182 }
183 
184 void MipsTargetStreamer::emitRX(unsigned Opcode, unsigned Reg0, MCOperand Op1,
185  SMLoc IDLoc, const MCSubtargetInfo *STI) {
186  MCInst TmpInst;
187  TmpInst.setOpcode(Opcode);
188  TmpInst.addOperand(MCOperand::createReg(Reg0));
189  TmpInst.addOperand(Op1);
190  TmpInst.setLoc(IDLoc);
191  getStreamer().emitInstruction(TmpInst, *STI);
192 }
193 
194 void MipsTargetStreamer::emitRI(unsigned Opcode, unsigned Reg0, int32_t Imm,
195  SMLoc IDLoc, const MCSubtargetInfo *STI) {
196  emitRX(Opcode, Reg0, MCOperand::createImm(Imm), IDLoc, STI);
197 }
198 
199 void MipsTargetStreamer::emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1,
200  SMLoc IDLoc, const MCSubtargetInfo *STI) {
201  emitRX(Opcode, Reg0, MCOperand::createReg(Reg1), IDLoc, STI);
202 }
203 
204 void MipsTargetStreamer::emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2,
205  SMLoc IDLoc, const MCSubtargetInfo *STI) {
206  MCInst TmpInst;
207  TmpInst.setOpcode(Opcode);
208  TmpInst.addOperand(MCOperand::createImm(Imm1));
209  TmpInst.addOperand(MCOperand::createImm(Imm2));
210  TmpInst.setLoc(IDLoc);
211  getStreamer().emitInstruction(TmpInst, *STI);
212 }
213 
214 void MipsTargetStreamer::emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1,
215  MCOperand Op2, SMLoc IDLoc,
216  const MCSubtargetInfo *STI) {
217  MCInst TmpInst;
218  TmpInst.setOpcode(Opcode);
219  TmpInst.addOperand(MCOperand::createReg(Reg0));
220  TmpInst.addOperand(MCOperand::createReg(Reg1));
221  TmpInst.addOperand(Op2);
222  TmpInst.setLoc(IDLoc);
223  getStreamer().emitInstruction(TmpInst, *STI);
224 }
225 
226 void MipsTargetStreamer::emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1,
227  unsigned Reg2, SMLoc IDLoc,
228  const MCSubtargetInfo *STI) {
229  emitRRX(Opcode, Reg0, Reg1, MCOperand::createReg(Reg2), IDLoc, STI);
230 }
231 
232 void MipsTargetStreamer::emitRRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1,
233  unsigned Reg2, MCOperand Op3, SMLoc IDLoc,
234  const MCSubtargetInfo *STI) {
235  MCInst TmpInst;
236  TmpInst.setOpcode(Opcode);
237  TmpInst.addOperand(MCOperand::createReg(Reg0));
238  TmpInst.addOperand(MCOperand::createReg(Reg1));
239  TmpInst.addOperand(MCOperand::createReg(Reg2));
240  TmpInst.addOperand(Op3);
241  TmpInst.setLoc(IDLoc);
242  getStreamer().emitInstruction(TmpInst, *STI);
243 }
244 
245 void MipsTargetStreamer::emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1,
246  int16_t Imm, SMLoc IDLoc,
247  const MCSubtargetInfo *STI) {
248  emitRRX(Opcode, Reg0, Reg1, MCOperand::createImm(Imm), IDLoc, STI);
249 }
250 
251 void MipsTargetStreamer::emitRRIII(unsigned Opcode, unsigned Reg0,
252  unsigned Reg1, int16_t Imm0, int16_t Imm1,
253  int16_t Imm2, SMLoc IDLoc,
254  const MCSubtargetInfo *STI) {
255  MCInst TmpInst;
256  TmpInst.setOpcode(Opcode);
257  TmpInst.addOperand(MCOperand::createReg(Reg0));
258  TmpInst.addOperand(MCOperand::createReg(Reg1));
259  TmpInst.addOperand(MCOperand::createImm(Imm0));
260  TmpInst.addOperand(MCOperand::createImm(Imm1));
261  TmpInst.addOperand(MCOperand::createImm(Imm2));
262  TmpInst.setLoc(IDLoc);
263  getStreamer().emitInstruction(TmpInst, *STI);
264 }
265 
266 void MipsTargetStreamer::emitAddu(unsigned DstReg, unsigned SrcReg,
267  unsigned TrgReg, bool Is64Bit,
268  const MCSubtargetInfo *STI) {
269  emitRRR(Is64Bit ? Mips::DADDu : Mips::ADDu, DstReg, SrcReg, TrgReg, SMLoc(),
270  STI);
271 }
272 
273 void MipsTargetStreamer::emitDSLL(unsigned DstReg, unsigned SrcReg,
274  int16_t ShiftAmount, SMLoc IDLoc,
275  const MCSubtargetInfo *STI) {
276  if (ShiftAmount >= 32) {
277  emitRRI(Mips::DSLL32, DstReg, SrcReg, ShiftAmount - 32, IDLoc, STI);
278  return;
279  }
280 
281  emitRRI(Mips::DSLL, DstReg, SrcReg, ShiftAmount, IDLoc, STI);
282 }
283 
285  const MCSubtargetInfo *STI) {
286  // The default case of `nop` is `sll $zero, $zero, 0`.
287  unsigned Opc = Mips::SLL;
288  if (isMicroMips(STI) && hasShortDelaySlot) {
289  Opc = isMips32r6(STI) ? Mips::MOVE16_MMR6 : Mips::MOVE16_MM;
290  emitRR(Opc, Mips::ZERO, Mips::ZERO, IDLoc, STI);
291  return;
292  }
293 
294  if (isMicroMips(STI))
295  Opc = isMips32r6(STI) ? Mips::SLL_MMR6 : Mips::SLL_MM;
296 
297  emitRRI(Opc, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
298 }
299 
301  if (isMicroMips(STI))
302  emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI);
303  else
304  emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
305 }
306 
307 /// Emit the $gp restore operation for .cprestore.
309  const MCSubtargetInfo *STI) {
310  emitLoadWithImmOffset(Mips::LW, GPReg, Mips::SP, Offset, GPReg, IDLoc, STI);
311 }
312 
313 /// Emit a store instruction with an immediate offset.
315  unsigned Opcode, unsigned SrcReg, unsigned BaseReg, int64_t Offset,
316  function_ref<unsigned()> GetATReg, SMLoc IDLoc,
317  const MCSubtargetInfo *STI) {
318  if (isInt<16>(Offset)) {
319  emitRRI(Opcode, SrcReg, BaseReg, Offset, IDLoc, STI);
320  return;
321  }
322 
323  // sw $8, offset($8) => lui $at, %hi(offset)
324  // add $at, $at, $8
325  // sw $8, %lo(offset)($at)
326 
327  unsigned ATReg = GetATReg();
328  if (!ATReg)
329  return;
330 
331  unsigned LoOffset = Offset & 0x0000ffff;
332  unsigned HiOffset = (Offset & 0xffff0000) >> 16;
333 
334  // If msb of LoOffset is 1(negative number) we must increment HiOffset
335  // to account for the sign-extension of the low part.
336  if (LoOffset & 0x8000)
337  HiOffset++;
338 
339  // Generate the base address in ATReg.
340  emitRI(Mips::LUi, ATReg, HiOffset, IDLoc, STI);
341  if (BaseReg != Mips::ZERO)
342  emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI);
343  // Emit the store with the adjusted base and offset.
344  emitRRI(Opcode, SrcReg, ATReg, LoOffset, IDLoc, STI);
345 }
346 
347 /// Emit a load instruction with an immediate offset. DstReg and TmpReg are
348 /// permitted to be the same register iff DstReg is distinct from BaseReg and
349 /// DstReg is a GPR. It is the callers responsibility to identify such cases
350 /// and pass the appropriate register in TmpReg.
351 void MipsTargetStreamer::emitLoadWithImmOffset(unsigned Opcode, unsigned DstReg,
352  unsigned BaseReg, int64_t Offset,
353  unsigned TmpReg, SMLoc IDLoc,
354  const MCSubtargetInfo *STI) {
355  if (isInt<16>(Offset)) {
356  emitRRI(Opcode, DstReg, BaseReg, Offset, IDLoc, STI);
357  return;
358  }
359 
360  // 1) lw $8, offset($9) => lui $8, %hi(offset)
361  // add $8, $8, $9
362  // lw $8, %lo(offset)($9)
363  // 2) lw $8, offset($8) => lui $at, %hi(offset)
364  // add $at, $at, $8
365  // lw $8, %lo(offset)($at)
366 
367  unsigned LoOffset = Offset & 0x0000ffff;
368  unsigned HiOffset = (Offset & 0xffff0000) >> 16;
369 
370  // If msb of LoOffset is 1(negative number) we must increment HiOffset
371  // to account for the sign-extension of the low part.
372  if (LoOffset & 0x8000)
373  HiOffset++;
374 
375  // Generate the base address in TmpReg.
376  emitRI(Mips::LUi, TmpReg, HiOffset, IDLoc, STI);
377  if (BaseReg != Mips::ZERO)
378  emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);
379  // Emit the load with the adjusted base and offset.
380  emitRRI(Opcode, DstReg, TmpReg, LoOffset, IDLoc, STI);
381 }
382 
385  : MipsTargetStreamer(S), OS(OS) {}
386 
388  OS << "\t.set\tmicromips\n";
390 }
391 
393  OS << "\t.set\tnomicromips\n";
395 }
396 
398  OS << "\t.set\tmips16\n";
400 }
401 
403  OS << "\t.set\tnomips16\n";
405 }
406 
408  OS << "\t.set\treorder\n";
410 }
411 
413  OS << "\t.set\tnoreorder\n";
415 }
416 
418  OS << "\t.set\tmacro\n";
420 }
421 
423  OS << "\t.set\tnomacro\n";
425 }
426 
428  OS << "\t.set\tmsa\n";
430 }
431 
433  OS << "\t.set\tnomsa\n";
435 }
436 
438  OS << "\t.set\tmt\n";
440 }
441 
443  OS << "\t.set\tnomt\n";
445 }
446 
448  OS << "\t.set\tcrc\n";
450 }
451 
453  OS << "\t.set\tnocrc\n";
455 }
456 
458  OS << "\t.set\tvirt\n";
460 }
461 
463  OS << "\t.set\tnovirt\n";
465 }
466 
468  OS << "\t.set\tginv\n";
470 }
471 
473  OS << "\t.set\tnoginv\n";
475 }
476 
478  OS << "\t.set\tat\n";
480 }
481 
483  OS << "\t.set\tat=$" << Twine(RegNo) << "\n";
485 }
486 
488  OS << "\t.set\tnoat\n";
490 }
491 
493  OS << "\t.end\t" << Name << '\n';
494 }
495 
497  OS << "\t.ent\t" << Symbol.getName() << '\n';
498 }
499 
500 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
501 
502 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
503 
505  OS << "\t.nan\tlegacy\n";
506 }
507 
509  OS << "\t.option\tpic0\n";
510 }
511 
513  OS << "\t.option\tpic2\n";
514 }
515 
518  OS << "\t.insn\n";
519 }
520 
521 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
522  unsigned ReturnReg) {
523  OS << "\t.frame\t$"
524  << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
525  << StackSize << ",$"
527 }
528 
530  OS << "\t.set arch=" << Arch << "\n";
532 }
533 
535  OS << "\t.set\tmips0\n";
537 }
538 
540  OS << "\t.set\tmips1\n";
542 }
543 
545  OS << "\t.set\tmips2\n";
547 }
548 
550  OS << "\t.set\tmips3\n";
552 }
553 
555  OS << "\t.set\tmips4\n";
557 }
558 
560  OS << "\t.set\tmips5\n";
562 }
563 
565  OS << "\t.set\tmips32\n";
567 }
568 
570  OS << "\t.set\tmips32r2\n";
572 }
573 
575  OS << "\t.set\tmips32r3\n";
577 }
578 
580  OS << "\t.set\tmips32r5\n";
582 }
583 
585  OS << "\t.set\tmips32r6\n";
587 }
588 
590  OS << "\t.set\tmips64\n";
592 }
593 
595  OS << "\t.set\tmips64r2\n";
597 }
598 
600  OS << "\t.set\tmips64r3\n";
602 }
603 
605  OS << "\t.set\tmips64r5\n";
607 }
608 
610  OS << "\t.set\tmips64r6\n";
612 }
613 
615  OS << "\t.set\tdsp\n";
617 }
618 
620  OS << "\t.set\tdspr2\n";
622 }
623 
625  OS << "\t.set\tnodsp\n";
627 }
628 
630  OS << "\t.set\tmips3d\n";
632 }
633 
635  OS << "\t.set\tnomips3d\n";
637 }
638 
640  OS << "\t.set\tpop\n";
642 }
643 
645  OS << "\t.set\tpush\n";
647 }
648 
650  OS << "\t.set\tsoftfloat\n";
652 }
653 
655  OS << "\t.set\thardfloat\n";
657 }
658 
659 // Print a 32 bit hex number with all numbers.
660 static void printHex32(unsigned Value, raw_ostream &OS) {
661  OS << "0x";
662  for (int i = 7; i >= 0; i--)
663  OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
664 }
665 
666 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
667  int CPUTopSavedRegOff) {
668  OS << "\t.mask \t";
669  printHex32(CPUBitmask, OS);
670  OS << ',' << CPUTopSavedRegOff << '\n';
671 }
672 
673 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
674  int FPUTopSavedRegOff) {
675  OS << "\t.fmask\t";
676  printHex32(FPUBitmask, OS);
677  OS << "," << FPUTopSavedRegOff << '\n';
678 }
679 
681  OS << "\t.cpadd\t$"
682  << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
684 }
685 
687  OS << "\t.cpload\t$"
688  << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
690 }
691 
693  OS << "\t.cplocal\t$"
694  << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
696 }
697 
699  int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc,
700  const MCSubtargetInfo *STI) {
701  MipsTargetStreamer::emitDirectiveCpRestore(Offset, GetATReg, IDLoc, STI);
702  OS << "\t.cprestore\t" << Offset << "\n";
703  return true;
704 }
705 
707  int RegOrOffset,
708  const MCSymbol &Sym,
709  bool IsReg) {
710  OS << "\t.cpsetup\t$"
711  << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
712 
713  if (IsReg)
714  OS << "$"
716  else
717  OS << RegOrOffset;
718 
719  OS << ", ";
720 
721  OS << Sym.getName();
723 }
724 
726  bool SaveLocationIsRegister) {
727  OS << "\t.cpreturn";
729 }
730 
734  OS << "\t.module\tsoftfloat\n";
735  else
736  OS << "\t.module\tfp=" << ABIFlagsSection.getFpABIString(FpABI) << "\n";
737 }
738 
742 
743  OS << "\t.set\tfp=";
744  OS << ABIFlagsSection.getFpABIString(Value) << "\n";
745 }
746 
749 
750  OS << "\t.module\t" << (ABIFlagsSection.OddSPReg ? "" : "no") << "oddspreg\n";
751 }
752 
755  OS << "\t.set\toddspreg\n";
756 }
757 
760  OS << "\t.set\tnooddspreg\n";
761 }
762 
764  OS << "\t.module\tsoftfloat\n";
765 }
766 
768  OS << "\t.module\thardfloat\n";
769 }
770 
772  OS << "\t.module\tmt\n";
773 }
774 
776  OS << "\t.module\tcrc\n";
777 }
778 
780  OS << "\t.module\tnocrc\n";
781 }
782 
784  OS << "\t.module\tvirt\n";
785 }
786 
788  OS << "\t.module\tnovirt\n";
789 }
790 
792  OS << "\t.module\tginv\n";
793 }
794 
796  OS << "\t.module\tnoginv\n";
797 }
798 
799 // This part is for ELF object output.
801  const MCSubtargetInfo &STI)
802  : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
804 
805  // It's possible that MCObjectFileInfo isn't fully initialized at this point
806  // due to an initialization order problem where LLVMTargetMachine creates the
807  // target streamer before TargetLoweringObjectFile calls
808  // InitializeMCObjectFileInfo. There doesn't seem to be a single place that
809  // covers all cases so this statement covers most cases and direct object
810  // emission must call setPic() once MCObjectFileInfo has been initialized. The
811  // cases we don't handle here are covered by MipsAsmPrinter.
813 
814  const FeatureBitset &Features = STI.getFeatureBits();
815 
816  // Set the header flags that we can in the constructor.
817  // FIXME: This is a fairly terrible hack. We set the rest
818  // of these in the destructor. The problem here is two-fold:
819  //
820  // a: Some of the eflags can be set/reset by directives.
821  // b: There aren't any usage paths that initialize the ABI
822  // pointer until after we initialize either an assembler
823  // or the target machine.
824  // We can fix this by making the target streamer construct
825  // the ABI, but this is fraught with wide ranging dependency
826  // issues as well.
827  unsigned EFlags = MCA.getELFHeaderEFlags();
828 
829  // FIXME: Fix a dependency issue by instantiating the ABI object to some
830  // default based off the triple. The triple doesn't describe the target
831  // fully, but any external user of the API that uses the MCTargetStreamer
832  // would otherwise crash on assertion failure.
833 
834  ABI = MipsABIInfo(
835  STI.getTargetTriple().getArch() == Triple::ArchType::mipsel ||
836  STI.getTargetTriple().getArch() == Triple::ArchType::mips
837  ? MipsABIInfo::O32()
838  : MipsABIInfo::N64());
839 
840  // Architecture
841  if (Features[Mips::FeatureMips64r6])
842  EFlags |= ELF::EF_MIPS_ARCH_64R6;
843  else if (Features[Mips::FeatureMips64r2] ||
844  Features[Mips::FeatureMips64r3] ||
845  Features[Mips::FeatureMips64r5])
846  EFlags |= ELF::EF_MIPS_ARCH_64R2;
847  else if (Features[Mips::FeatureMips64])
848  EFlags |= ELF::EF_MIPS_ARCH_64;
849  else if (Features[Mips::FeatureMips5])
850  EFlags |= ELF::EF_MIPS_ARCH_5;
851  else if (Features[Mips::FeatureMips4])
852  EFlags |= ELF::EF_MIPS_ARCH_4;
853  else if (Features[Mips::FeatureMips3])
854  EFlags |= ELF::EF_MIPS_ARCH_3;
855  else if (Features[Mips::FeatureMips32r6])
856  EFlags |= ELF::EF_MIPS_ARCH_32R6;
857  else if (Features[Mips::FeatureMips32r2] ||
858  Features[Mips::FeatureMips32r3] ||
859  Features[Mips::FeatureMips32r5])
860  EFlags |= ELF::EF_MIPS_ARCH_32R2;
861  else if (Features[Mips::FeatureMips32])
862  EFlags |= ELF::EF_MIPS_ARCH_32;
863  else if (Features[Mips::FeatureMips2])
864  EFlags |= ELF::EF_MIPS_ARCH_2;
865  else
866  EFlags |= ELF::EF_MIPS_ARCH_1;
867 
868  // Machine
869  if (Features[Mips::FeatureCnMips])
870  EFlags |= ELF::EF_MIPS_MACH_OCTEON;
871 
872  // Other options.
873  if (Features[Mips::FeatureNaN2008])
874  EFlags |= ELF::EF_MIPS_NAN2008;
875 
876  MCA.setELFHeaderEFlags(EFlags);
877 }
878 
880  auto *Symbol = cast<MCSymbolELF>(S);
882  uint8_t Type = Symbol->getType();
883  if (Type != ELF::STT_FUNC)
884  return;
885 
886  if (isMicroMipsEnabled())
887  Symbol->setOther(ELF::STO_MIPS_MICROMIPS);
888 }
889 
892  const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
893 
894  // .bss, .text and .data are always at least 16-byte aligned.
895  MCSection &TextSection = *OFI.getTextSection();
896  MCA.registerSection(TextSection);
897  MCSection &DataSection = *OFI.getDataSection();
898  MCA.registerSection(DataSection);
899  MCSection &BSSSection = *OFI.getBSSSection();
900  MCA.registerSection(BSSSection);
901 
902  TextSection.setAlignment(Align(std::max(16u, TextSection.getAlignment())));
903  DataSection.setAlignment(Align(std::max(16u, DataSection.getAlignment())));
904  BSSSection.setAlignment(Align(std::max(16u, BSSSection.getAlignment())));
905 
906  if (RoundSectionSizes) {
907  // Make sections sizes a multiple of the alignment. This is useful for
908  // verifying the output of IAS against the output of other assemblers but
909  // it's not necessary to produce a correct object and increases section
910  // size.
911  MCStreamer &OS = getStreamer();
912  for (MCSection &S : MCA) {
913  MCSectionELF &Section = static_cast<MCSectionELF &>(S);
914 
915  unsigned Alignment = Section.getAlignment();
916  if (Alignment) {
917  OS.switchSection(&Section);
918  if (Section.useCodeAlign())
919  OS.emitCodeAlignment(Alignment, &STI, Alignment);
920  else
921  OS.emitValueToAlignment(Alignment, 0, 1, Alignment);
922  }
923  }
924  }
925 
926  const FeatureBitset &Features = STI.getFeatureBits();
927 
928  // Update e_header flags. See the FIXME and comment above in
929  // the constructor for a full rundown on this.
930  unsigned EFlags = MCA.getELFHeaderEFlags();
931 
932  // ABI
933  // N64 does not require any ABI bits.
934  if (getABI().IsO32())
935  EFlags |= ELF::EF_MIPS_ABI_O32;
936  else if (getABI().IsN32())
937  EFlags |= ELF::EF_MIPS_ABI2;
938 
939  if (Features[Mips::FeatureGP64Bit]) {
940  if (getABI().IsO32())
941  EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
942  } else if (Features[Mips::FeatureMips64r2] || Features[Mips::FeatureMips64])
943  EFlags |= ELF::EF_MIPS_32BITMODE;
944 
945  // -mplt is not implemented but we should act as if it was
946  // given.
947  if (!Features[Mips::FeatureNoABICalls])
948  EFlags |= ELF::EF_MIPS_CPIC;
949 
950  if (Pic)
952 
953  MCA.setELFHeaderEFlags(EFlags);
954 
955  // Emit all the option records.
956  // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
957  // .reginfo.
958  MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
959  MEF.EmitMipsOptionRecords();
960 
962 }
963 
965  auto *Symbol = cast<MCSymbolELF>(S);
966  // If on rhs is micromips symbol then mark Symbol as microMips.
967  if (Value->getKind() != MCExpr::SymbolRef)
968  return;
969  const auto &RhsSym = cast<MCSymbolELF>(
970  static_cast<const MCSymbolRefExpr *>(Value)->getSymbol());
971 
972  if (!(RhsSym.getOther() & ELF::STO_MIPS_MICROMIPS))
973  return;
974 
975  Symbol->setOther(ELF::STO_MIPS_MICROMIPS);
976 }
977 
979  return static_cast<MCELFStreamer &>(Streamer);
980 }
981 
983  MicroMipsEnabled = true;
985 }
986 
988  MicroMipsEnabled = false;
990 }
991 
994  unsigned Flags = MCA.getELFHeaderEFlags();
995  Flags |= ELF::EF_MIPS_MICROMIPS;
996  MCA.setELFHeaderEFlags(Flags);
997 }
998 
1001  unsigned Flags = MCA.getELFHeaderEFlags();
1002  Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
1003  MCA.setELFHeaderEFlags(Flags);
1005 }
1006 
1009  unsigned Flags = MCA.getELFHeaderEFlags();
1010  Flags |= ELF::EF_MIPS_NOREORDER;
1011  MCA.setELFHeaderEFlags(Flags);
1013 }
1014 
1017  MCContext &Context = MCA.getContext();
1018  MCStreamer &OS = getStreamer();
1019 
1020  MCSectionELF *Sec = Context.getELFSection(".pdr", ELF::SHT_PROGBITS, 0);
1021 
1022  MCSymbol *Sym = Context.getOrCreateSymbol(Name);
1023  const MCSymbolRefExpr *ExprRef =
1025 
1026  MCA.registerSection(*Sec);
1027  Sec->setAlignment(Align(4));
1028 
1029  OS.pushSection();
1030 
1031  OS.switchSection(Sec);
1032 
1033  OS.emitValueImpl(ExprRef, 4);
1034 
1035  OS.emitIntValue(GPRInfoSet ? GPRBitMask : 0, 4); // reg_mask
1036  OS.emitIntValue(GPRInfoSet ? GPROffset : 0, 4); // reg_offset
1037 
1038  OS.emitIntValue(FPRInfoSet ? FPRBitMask : 0, 4); // fpreg_mask
1039  OS.emitIntValue(FPRInfoSet ? FPROffset : 0, 4); // fpreg_offset
1040 
1041  OS.emitIntValue(FrameInfoSet ? FrameOffset : 0, 4); // frame_offset
1042  OS.emitIntValue(FrameInfoSet ? FrameReg : 0, 4); // frame_reg
1043  OS.emitIntValue(FrameInfoSet ? ReturnReg : 0, 4); // return_reg
1044 
1045  // The .end directive marks the end of a procedure. Invalidate
1046  // the information gathered up until this point.
1047  GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
1048 
1049  OS.popSection();
1050 
1051  // .end also implicitly sets the size.
1052  MCSymbol *CurPCSym = Context.createTempSymbol();
1053  OS.emitLabel(CurPCSym);
1054  const MCExpr *Size = MCBinaryExpr::createSub(
1056  ExprRef, Context);
1057 
1058  // The ELFObjectWriter can determine the absolute size as it has access to
1059  // the layout information of the assembly file, so a size expression rather
1060  // than an absolute value is ok here.
1061  static_cast<MCSymbolELF *>(Sym)->setSize(Size);
1062 }
1063 
1065  GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
1066 
1067  // .ent also acts like an implicit '.type symbol, STT_FUNC'
1068  static_cast<const MCSymbolELF &>(Symbol).setType(ELF::STT_FUNC);
1069 }
1070 
1073  unsigned Flags = MCA.getELFHeaderEFlags();
1075  MCA.setELFHeaderEFlags(Flags);
1076 }
1077 
1080  unsigned Flags = MCA.getELFHeaderEFlags();
1081  Flags |= ELF::EF_MIPS_NAN2008;
1082  MCA.setELFHeaderEFlags(Flags);
1083 }
1084 
1087  unsigned Flags = MCA.getELFHeaderEFlags();
1088  Flags &= ~ELF::EF_MIPS_NAN2008;
1089  MCA.setELFHeaderEFlags(Flags);
1090 }
1091 
1094  unsigned Flags = MCA.getELFHeaderEFlags();
1095  // This option overrides other PIC options like -KPIC.
1096  Pic = false;
1097  Flags &= ~ELF::EF_MIPS_PIC;
1098  MCA.setELFHeaderEFlags(Flags);
1099 }
1100 
1103  unsigned Flags = MCA.getELFHeaderEFlags();
1104  Pic = true;
1105  // NOTE: We are following the GAS behaviour here which means the directive
1106  // 'pic2' also sets the CPIC bit in the ELF header. This is different from
1107  // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
1108  // EF_MIPS_CPIC to be mutually exclusive.
1110  MCA.setELFHeaderEFlags(Flags);
1111 }
1112 
1115  MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
1117 }
1118 
1119 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
1120  unsigned ReturnReg_) {
1122  const MCRegisterInfo *RegInfo = Context.getRegisterInfo();
1123 
1124  FrameInfoSet = true;
1125  FrameReg = RegInfo->getEncodingValue(StackReg);
1126  FrameOffset = StackSize;
1127  ReturnReg = RegInfo->getEncodingValue(ReturnReg_);
1128 }
1129 
1130 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
1131  int CPUTopSavedRegOff) {
1132  GPRInfoSet = true;
1133  GPRBitMask = CPUBitmask;
1134  GPROffset = CPUTopSavedRegOff;
1135 }
1136 
1137 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
1138  int FPUTopSavedRegOff) {
1139  FPRInfoSet = true;
1140  FPRBitMask = FPUBitmask;
1141  FPROffset = FPUTopSavedRegOff;
1142 }
1143 
1145  // .cpadd $reg
1146  // This directive inserts code to add $gp to the argument's register
1147  // when support for position independent code is enabled.
1148  if (!Pic)
1149  return;
1150 
1151  emitAddu(RegNo, RegNo, GPReg, getABI().IsN64(), &STI);
1153 }
1154 
1156  // .cpload $reg
1157  // This directive expands to:
1158  // lui $gp, %hi(_gp_disp)
1159  // addui $gp, $gp, %lo(_gp_disp)
1160  // addu $gp, $gp, $reg
1161  // when support for position independent code is enabled.
1162  if (!Pic || (getABI().IsN32() || getABI().IsN64()))
1163  return;
1164 
1165  // There's a GNU extension controlled by -mno-shared that allows
1166  // locally-binding symbols to be accessed using absolute addresses.
1167  // This is currently not supported. When supported -mno-shared makes
1168  // .cpload expand to:
1169  // lui $gp, %hi(__gnu_local_gp)
1170  // addiu $gp, $gp, %lo(__gnu_local_gp)
1171 
1172  StringRef SymName("_gp_disp");
1174  MCSymbol *GP_Disp = MCA.getContext().getOrCreateSymbol(SymName);
1175  MCA.registerSymbol(*GP_Disp);
1176 
1177  MCInst TmpInst;
1178  TmpInst.setOpcode(Mips::LUi);
1180  const MCExpr *HiSym = MipsMCExpr::create(
1183  MCA.getContext()),
1184  MCA.getContext());
1185  TmpInst.addOperand(MCOperand::createExpr(HiSym));
1186  getStreamer().emitInstruction(TmpInst, STI);
1187 
1188  TmpInst.clear();
1189 
1190  TmpInst.setOpcode(Mips::ADDiu);
1193  const MCExpr *LoSym = MipsMCExpr::create(
1196  MCA.getContext()),
1197  MCA.getContext());
1198  TmpInst.addOperand(MCOperand::createExpr(LoSym));
1199  getStreamer().emitInstruction(TmpInst, STI);
1200 
1201  TmpInst.clear();
1202 
1203  TmpInst.setOpcode(Mips::ADDu);
1206  TmpInst.addOperand(MCOperand::createReg(RegNo));
1207  getStreamer().emitInstruction(TmpInst, STI);
1208 
1210 }
1211 
1213  if (Pic)
1215 }
1216 
1218  int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc,
1219  const MCSubtargetInfo *STI) {
1220  MipsTargetStreamer::emitDirectiveCpRestore(Offset, GetATReg, IDLoc, STI);
1221  // .cprestore offset
1222  // When PIC mode is enabled and the O32 ABI is used, this directive expands
1223  // to:
1224  // sw $gp, offset($sp)
1225  // and adds a corresponding LW after every JAL.
1226 
1227  // Note that .cprestore is ignored if used with the N32 and N64 ABIs or if it
1228  // is used in non-PIC mode.
1229  if (!Pic || (getABI().IsN32() || getABI().IsN64()))
1230  return true;
1231 
1232  // Store the $gp on the stack.
1233  emitStoreWithImmOffset(Mips::SW, GPReg, Mips::SP, Offset, GetATReg, IDLoc,
1234  STI);
1235  return true;
1236 }
1237 
1239  int RegOrOffset,
1240  const MCSymbol &Sym,
1241  bool IsReg) {
1242  // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
1243  if (!Pic || !(getABI().IsN32() || getABI().IsN64()))
1244  return;
1245 
1247 
1249  MCInst Inst;
1250 
1251  // Either store the old $gp in a register or on the stack
1252  if (IsReg) {
1253  // move $save, $gpreg
1254  emitRRR(Mips::OR64, RegOrOffset, GPReg, Mips::ZERO, SMLoc(), &STI);
1255  } else {
1256  // sd $gpreg, offset($sp)
1257  emitRRI(Mips::SD, GPReg, Mips::SP, RegOrOffset, SMLoc(), &STI);
1258  }
1259 
1260  if (getABI().IsN32()) {
1261  MCSymbol *GPSym = MCA.getContext().getOrCreateSymbol("__gnu_local_gp");
1262  const MipsMCExpr *HiExpr = MipsMCExpr::create(
1264  MCA.getContext());
1265  const MipsMCExpr *LoExpr = MipsMCExpr::create(
1267  MCA.getContext());
1268 
1269  // lui $gp, %hi(__gnu_local_gp)
1270  emitRX(Mips::LUi, GPReg, MCOperand::createExpr(HiExpr), SMLoc(), &STI);
1271 
1272  // addiu $gp, $gp, %lo(__gnu_local_gp)
1273  emitRRX(Mips::ADDiu, GPReg, GPReg, MCOperand::createExpr(LoExpr), SMLoc(),
1274  &STI);
1275 
1276  return;
1277  }
1278 
1279  const MipsMCExpr *HiExpr = MipsMCExpr::createGpOff(
1281  MCA.getContext());
1282  const MipsMCExpr *LoExpr = MipsMCExpr::createGpOff(
1284  MCA.getContext());
1285 
1286  // lui $gp, %hi(%neg(%gp_rel(funcSym)))
1287  emitRX(Mips::LUi, GPReg, MCOperand::createExpr(HiExpr), SMLoc(), &STI);
1288 
1289  // addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
1290  emitRRX(Mips::ADDiu, GPReg, GPReg, MCOperand::createExpr(LoExpr), SMLoc(),
1291  &STI);
1292 
1293  // daddu $gp, $gp, $funcreg
1294  emitRRR(Mips::DADDu, GPReg, GPReg, RegNo, SMLoc(), &STI);
1295 }
1296 
1298  bool SaveLocationIsRegister) {
1299  // Only N32 and N64 emit anything for .cpreturn iff PIC is set.
1300  if (!Pic || !(getABI().IsN32() || getABI().IsN64()))
1301  return;
1302 
1303  MCInst Inst;
1304  // Either restore the old $gp from a register or on the stack
1305  if (SaveLocationIsRegister) {
1306  Inst.setOpcode(Mips::OR);
1308  Inst.addOperand(MCOperand::createReg(SaveLocation));
1309  Inst.addOperand(MCOperand::createReg(Mips::ZERO));
1310  } else {
1311  Inst.setOpcode(Mips::LD);
1313  Inst.addOperand(MCOperand::createReg(Mips::SP));
1314  Inst.addOperand(MCOperand::createImm(SaveLocation));
1315  }
1316  getStreamer().emitInstruction(Inst, STI);
1317 
1319 }
1320 
1323  MCContext &Context = MCA.getContext();
1324  MCStreamer &OS = getStreamer();
1325  MCSectionELF *Sec = Context.getELFSection(
1326  ".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS, ELF::SHF_ALLOC, 24);
1327  MCA.registerSection(*Sec);
1328  Sec->setAlignment(Align(8));
1329  OS.switchSection(Sec);
1330 
1331  OS << ABIFlagsSection;
1332 }
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Definition: MCStreamer.h:101
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Definition: MipsTargetStreamer.cpp:351
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Definition: MipsTargetStreamer.cpp:731
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Definition: MipsTargetStreamer.cpp:99
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Definition: MipsTargetStreamer.cpp:204
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Definition: MipsTargetStreamer.cpp:80
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Emit the $gp restore operation for .cprestore.
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Definition: MipsABIFlagsSection.h:42
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Definition: BasicAliasAnalysis.cpp:1886
llvm::MipsTargetStreamer::emitDSLL
void emitDSLL(unsigned DstReg, unsigned SrcReg, int16_t ShiftAmount, SMLoc IDLoc, const MCSubtargetInfo *STI)
Definition: MipsTargetStreamer.cpp:273
llvm::ELF::EF_MIPS_32BITMODE
@ EF_MIPS_32BITMODE
Definition: ELF.h:511
llvm::MipsTargetStreamer::emitDirectiveModuleCRC
virtual void emitDirectiveModuleCRC()
Definition: MipsTargetStreamer.cpp:160
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
llvm::MipsABIFlagsSection::getFpABI
FpABIKind getFpABI()
Definition: MipsABIFlagsSection.h:74
llvm::MCStreamer::popSection
bool popSection()
Restore the current and previous section from the section stack.
Definition: MCStreamer.h:420
llvm::MipsTargetELFStreamer::emitDirectiveCpLoad
void emitDirectiveCpLoad(unsigned RegNo) override
Definition: MipsTargetStreamer.cpp:1155
llvm::MipsTargetStreamer::emitDirectiveModuleFP
virtual void emitDirectiveModuleFP()
Definition: MipsTargetStreamer.cpp:151
llvm::MipsTargetStreamer::emitDirectiveSetMips3D
virtual void emitDirectiveSetMips3D()
Definition: MipsTargetStreamer.cpp:118
llvm::MipsTargetStreamer::emitDirectiveSetMips32R5
virtual void emitDirectiveSetMips32R5()
Definition: MipsTargetStreamer.cpp:100
llvm::ELF::EF_MIPS_PIC
@ EF_MIPS_PIC
Definition: ELF.h:508
llvm::MipsTargetAsmStreamer::emitDirectiveOptionPic0
void emitDirectiveOptionPic0() override
Definition: MipsTargetStreamer.cpp:508
llvm::MipsTargetAsmStreamer::emitDirectiveSetNoMt
void emitDirectiveSetNoMt() override
Definition: MipsTargetStreamer.cpp:442
llvm::MipsTargetStreamer::emitDirectiveInsn
virtual void emitDirectiveInsn()
Definition: MipsTargetStreamer.cpp:82
llvm::FeatureBitset
Container class for subtarget features.
Definition: SubtargetFeature.h:40
llvm::ELF::SHF_ALLOC
@ SHF_ALLOC
Definition: ELF.h:1038
llvm::MipsTargetStreamer::emitDirectiveModuleNoVirt
virtual void emitDirectiveModuleNoVirt()
Definition: MipsTargetStreamer.cpp:163
llvm::max
Expected< ExpressionValue > max(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:337
llvm::MipsTargetStreamer::emitDirectiveSetNoAt
virtual void emitDirectiveSetNoAt()
Definition: MipsTargetStreamer.cpp:74
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::MipsTargetELFStreamer::emitDirectiveSetMicroMips
void emitDirectiveSetMicroMips() override
Definition: MipsTargetStreamer.cpp:982
llvm::MCSectionELF
This represents a section on linux, lots of unix variants and some bare metal systems.
Definition: MCSectionELF.h:26
llvm::MipsTargetAsmStreamer::emitDirectiveSetNoGINV
void emitDirectiveSetNoGINV() override
Definition: MipsTargetStreamer.cpp:472
llvm::MipsTargetELFStreamer::isMicroMipsEnabled
bool isMicroMipsEnabled() const
Definition: MipsTargetStreamer.h:319
llvm::MipsTargetStreamer::emitDirectiveSetAt
virtual void emitDirectiveSetAt()
Definition: MipsTargetStreamer.cpp:70
llvm::MipsTargetStreamer::emitDirectiveSetNoMacro
virtual void emitDirectiveSetNoMacro()
Definition: MipsTargetStreamer.cpp:59
llvm::MipsABIFlagsSection::FpABIKind::SOFT
@ SOFT
llvm::MipsTargetStreamer::MipsTargetStreamer
MipsTargetStreamer(MCStreamer &S)
Definition: MipsTargetStreamer.cpp:47
llvm::MipsTargetAsmStreamer::emitDirectiveSetDsp
void emitDirectiveSetDsp() override
Definition: MipsTargetStreamer.cpp:614
llvm::ELF::EF_MIPS_ABI_O32
@ EF_MIPS_ABI_O32
Definition: ELF.h:518
llvm::MipsTargetStreamer::emitRRRX
void emitRRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2, MCOperand Op3, SMLoc IDLoc, const MCSubtargetInfo *STI)
Definition: MipsTargetStreamer.cpp:232
llvm::MipsTargetStreamer::emitDirectiveCpLoad
virtual void emitDirectiveCpLoad(unsigned RegNo)
Definition: MipsTargetStreamer.cpp:121
llvm::MipsTargetELFStreamer::finish
void finish() override
Definition: MipsTargetStreamer.cpp:890
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips16
void emitDirectiveSetMips16() override
Definition: MipsTargetStreamer.cpp:397
llvm::MipsTargetAsmStreamer::emitDirectiveSetPop
void emitDirectiveSetPop() override
Definition: MipsTargetStreamer.cpp:639
llvm::MipsInstPrinter::getRegisterName
static const char * getRegisterName(unsigned RegNo)
llvm::MipsTargetStreamer::emitDirectiveSetNoMips16
virtual void emitDirectiveSetNoMips16()
Definition: MipsTargetStreamer.cpp:55
llvm::MipsTargetStreamer::emitDirectiveSetNoOddSPReg
virtual void emitDirectiveSetNoOddSPReg()
Definition: MipsTargetStreamer.cpp:171
llvm::MCInst::setOpcode
void setOpcode(unsigned Op)
Definition: MCInst.h:197
llvm::MCSymbolELF
Definition: MCSymbolELF.h:14
llvm::MipsTargetStreamer::FrameReg
unsigned FrameReg
Definition: MipsTargetStreamer.h:199
llvm::MipsTargetStreamer::emitDirectiveSetMacro
virtual void emitDirectiveSetMacro()
Definition: MipsTargetStreamer.cpp:58
Context
LLVMContext & Context
Definition: NVVMIntrRange.cpp:66
llvm::MipsTargetStreamer::FrameInfoSet
bool FrameInfoSet
Definition: MipsTargetStreamer.h:197
CommandLine.h
FormattedStream.h
llvm::MCStreamer
Streaming machine code generation interface.
Definition: MCStreamer.h:212
llvm::MipsTargetELFStreamer::emitDirectiveCpAdd
void emitDirectiveCpAdd(unsigned RegNo) override
Definition: MipsTargetStreamer.cpp:1144
llvm::MipsTargetELFStreamer::emitDirectiveNaN2008
void emitDirectiveNaN2008() override
Definition: MipsTargetStreamer.cpp:1078
llvm::MCContext::getOrCreateSymbol
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Definition: MCContext.cpp:207
llvm::MipsTargetAsmStreamer::emitDirectiveSetArch
void emitDirectiveSetArch(StringRef Arch) override
Definition: MipsTargetStreamer.cpp:529
llvm::MCObjectFileInfo::getDataSection
MCSection * getDataSection() const
Definition: MCObjectFileInfo.h:268
ELF.h
llvm::MCELFStreamer
Definition: MCELFStreamer.h:31
llvm::MipsTargetAsmStreamer::emitDirectiveSetAt
void emitDirectiveSetAt() override
Definition: MipsTargetStreamer.cpp:477
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips0
void emitDirectiveSetMips0() override
Definition: MipsTargetStreamer.cpp:534
llvm::SMLoc
Represents a location in source code.
Definition: SMLoc.h:23
llvm::MipsTargetStreamer::emitDirectiveCpsetup
virtual void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg)
Definition: MipsTargetStreamer.cpp:145
llvm::MipsTargetStreamer::emitMask
virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff)
Definition: MipsTargetStreamer.cpp:85
MipsTargetStreamer.h
llvm::MipsTargetStreamer::GPRInfoSet
bool GPRInfoSet
Definition: MipsTargetStreamer.h:189
llvm::MCAssembler::getContext
MCContext & getContext() const
Definition: MCAssembler.h:321
llvm::MipsTargetELFStreamer::emitDirectiveSetMips16
void emitDirectiveSetMips16() override
Definition: MipsTargetStreamer.cpp:999
llvm::MCSubtargetInfo::getTargetTriple
const Triple & getTargetTriple() const
Definition: MCSubtargetInfo.h:108
MCSymbolELF.h
llvm::MipsTargetStreamer::emitDirectiveSetGINV
virtual void emitDirectiveSetGINV()
Definition: MipsTargetStreamer.cpp:68
MCContext.h
llvm::MipsTargetAsmStreamer::emitDirectiveCpLocal
void emitDirectiveCpLocal(unsigned RegNo) override
Definition: MipsTargetStreamer.cpp:692
llvm::MipsTargetAsmStreamer::emitDirectiveModuleVirt
void emitDirectiveModuleVirt() override
Definition: MipsTargetStreamer.cpp:783
llvm::MipsTargetAsmStreamer::emitDirectiveModuleHardFloat
void emitDirectiveModuleHardFloat() override
Definition: MipsTargetStreamer.cpp:767
llvm::MCObjectStreamer::emitInstruction
void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override
Emit the given Instruction into the current section.
Definition: MCObjectStreamer.cpp:409
llvm::MCStreamer::emitLabel
virtual void emitLabel(MCSymbol *Symbol, SMLoc Loc=SMLoc())
Emit a label for Symbol into the current section.
Definition: MCStreamer.cpp:423
llvm::MCStreamer::switchSection
virtual void switchSection(MCSection *Section, const MCExpr *Subsection=nullptr)
Set the current section where code is being emitted to Section.
Definition: MCStreamer.cpp:1225
llvm::MCObjectFileInfo::isPositionIndependent
bool isPositionIndependent() const
Definition: MCObjectFileInfo.h:437
llvm::MipsTargetStreamer::emitDirectiveSetMips64R3
virtual void emitDirectiveSetMips64R3()
Definition: MipsTargetStreamer.cpp:104
llvm::MipsTargetStreamer::emitDirectiveModuleGINV
virtual void emitDirectiveModuleGINV()
Definition: MipsTargetStreamer.cpp:164
false
Definition: StackSlotColoring.cpp:141
MCSubtargetInfo.h
llvm::MCSubtargetInfo::getFeatureBits
const FeatureBitset & getFeatureBits() const
Definition: MCSubtargetInfo.h:112
llvm::MipsTargetAsmStreamer::emitDirectiveAbiCalls
void emitDirectiveAbiCalls() override
Definition: MipsTargetStreamer.cpp:500
llvm::ELF::EF_MIPS_ARCH_64R6
@ EF_MIPS_ARCH_64R6
Definition: ELF.h:563
llvm::report_fatal_error
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:143
llvm::MipsTargetStreamer::emitDirectiveSetOddSPReg
virtual void emitDirectiveSetOddSPReg()
Definition: MipsTargetStreamer.cpp:170
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:54
llvm::MipsTargetStreamer::emitDirectiveSetNoDsp
virtual void emitDirectiveSetNoDsp()
Definition: MipsTargetStreamer.cpp:117
llvm::MipsTargetStreamer::emitDirectiveSetNoReorder
virtual void emitDirectiveSetNoReorder()
Definition: MipsTargetStreamer.cpp:57
llvm::MipsTargetELFStreamer::emitDirectiveEnd
void emitDirectiveEnd(StringRef Name) override
Definition: MipsTargetStreamer.cpp:1015
llvm::MCTargetStreamer
Target specific streamer interface.
Definition: MCStreamer.h:93
llvm::MCSymbol::getName
StringRef getName() const
getName - Get the symbol name.
Definition: MCSymbol.h:198
llvm::MipsTargetAsmStreamer::emitFMask
void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override
Definition: MipsTargetStreamer.cpp:673
llvm::MipsTargetStreamer::emitDirectiveSetMips3
virtual void emitDirectiveSetMips3()
Definition: MipsTargetStreamer.cpp:94
Align
uint64_t Align
Definition: ELFObjHandler.cpp:81
llvm::Triple::getArch
ArchType getArch() const
Get the parsed architecture type of this triple.
Definition: Triple.h:345
llvm::MipsTargetAsmStreamer::emitDirectiveSetMsa
void emitDirectiveSetMsa() override
Definition: MipsTargetStreamer.cpp:427
llvm::MCObjectFileInfo::getTextSection
MCSection * getTextSection() const
Definition: MCObjectFileInfo.h:267
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips32R5
void emitDirectiveSetMips32R5() override
Definition: MipsTargetStreamer.cpp:579
llvm::MipsTargetStreamer::emitDirectiveModuleSoftFloat
virtual void emitDirectiveModuleSoftFloat()
Definition: MipsTargetStreamer.cpp:157
llvm::MipsTargetStreamer::emitDirectiveSetDspr2
virtual void emitDirectiveSetDspr2()
Definition: MipsTargetStreamer.cpp:116
MipsMCExpr.h
llvm::MipsTargetStreamer::emitDirectiveOptionPic2
virtual void emitDirectiveOptionPic2()
Definition: MipsTargetStreamer.cpp:81
llvm::ELF::EF_MIPS_ARCH_3
@ EF_MIPS_ARCH_3
Definition: ELF.h:555
llvm::MipsTargetStreamer::emitEmptyDelaySlot
void emitEmptyDelaySlot(bool hasShortDelaySlot, SMLoc IDLoc, const MCSubtargetInfo *STI)
Definition: MipsTargetStreamer.cpp:284
llvm::MipsTargetStreamer::emitDirectiveCpRestore
virtual bool emitDirectiveCpRestore(int Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI)
Definition: MipsTargetStreamer.cpp:139
llvm::MipsTargetStreamer::emitDirectiveSetMt
virtual void emitDirectiveSetMt()
Definition: MipsTargetStreamer.cpp:62
llvm::MipsTargetELFStreamer::emitDirectiveSetNoMicroMips
void emitDirectiveSetNoMicroMips() override
Definition: MipsTargetStreamer.cpp:987
llvm::ELF::SHT_MIPS_ABIFLAGS
@ SHT_MIPS_ABIFLAGS
Definition: ELF.h:1019
llvm::MCInst::addOperand
void addOperand(const MCOperand Op)
Definition: MCInst.h:210
llvm::MipsTargetAsmStreamer::emitDirectiveSetMt
void emitDirectiveSetMt() override
Definition: MipsTargetStreamer.cpp:437
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips64R3
void emitDirectiveSetMips64R3() override
Definition: MipsTargetStreamer.cpp:599
printHex32
static void printHex32(unsigned Value, raw_ostream &OS)
Definition: MipsTargetStreamer.cpp:660
llvm::MipsTargetStreamer::emitDirectiveSetMips64
virtual void emitDirectiveSetMips64()
Definition: MipsTargetStreamer.cpp:102
llvm::function_ref
An efficient, type-erasing, non-owning reference to a callable.
Definition: STLFunctionalExtras.h:36
llvm::ELF::EF_MIPS_ARCH_32R2
@ EF_MIPS_ARCH_32R2
Definition: ELF.h:560
llvm::MipsTargetStreamer::emitStoreWithImmOffset
void emitStoreWithImmOffset(unsigned Opcode, unsigned SrcReg, unsigned BaseReg, int64_t Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI)
Emit a store instruction with an offset.
Definition: MipsTargetStreamer.cpp:314
llvm::ELF::EF_MIPS_ARCH_64
@ EF_MIPS_ARCH_64
Definition: ELF.h:559
llvm::cl::opt< bool >
llvm::MipsTargetStreamer::emitDirectiveSetMips64R6
virtual void emitDirectiveSetMips64R6()
Definition: MipsTargetStreamer.cpp:106
llvm::MipsTargetAsmStreamer::emitDirectiveModuleNoCRC
void emitDirectiveModuleNoCRC() override
Definition: MipsTargetStreamer.cpp:779
llvm::MipsTargetStreamer::emitDirectiveSetNoCRC
virtual void emitDirectiveSetNoCRC()
Definition: MipsTargetStreamer.cpp:65
llvm::MCAssembler
Definition: MCAssembler.h:73
llvm::MipsTargetStreamer::GPRBitMask
unsigned GPRBitMask
Definition: MipsTargetStreamer.h:190
llvm::MipsABIInfo::N64
static MipsABIInfo N64()
Definition: MipsABIInfo.h:35
llvm::MipsTargetELFStreamer::emitMask
void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override
Definition: MipsTargetStreamer.cpp:1130
llvm::MipsTargetStreamer::emitAddu
void emitAddu(unsigned DstReg, unsigned SrcReg, unsigned TrgReg, bool Is64Bit, const MCSubtargetInfo *STI)
Definition: MipsTargetStreamer.cpp:266
llvm::MCTargetStreamer::Streamer
MCStreamer & Streamer
Definition: MCStreamer.h:95
llvm::MipsELFStreamer::createPendingLabelRelocs
void createPendingLabelRelocs()
Mark labels as microMIPS, if necessary for the subtarget.
Definition: MipsELFStreamer.cpp:72
llvm::MipsTargetAsmStreamer::emitDirectiveSetNoMsa
void emitDirectiveSetNoMsa() override
Definition: MipsTargetStreamer.cpp:432
llvm::MipsTargetAsmStreamer::emitDirectiveSetCRC
void emitDirectiveSetCRC() override
Definition: MipsTargetStreamer.cpp:447
llvm::MipsTargetStreamer::FPRBitMask
unsigned FPRBitMask
Definition: MipsTargetStreamer.h:194
MipsInstPrinter.h
llvm::MipsTargetELFStreamer::emitFrame
void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg) override
Definition: MipsTargetStreamer.cpp:1119
llvm::MCStreamer::emitInstruction
virtual void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI)
Emit the given Instruction into the current section.
Definition: MCStreamer.cpp:1096
llvm::MipsTargetStreamer::FPRInfoSet
bool FPRInfoSet
Definition: MipsTargetStreamer.h:193
llvm::MipsTargetAsmStreamer::emitDirectiveModuleGINV
void emitDirectiveModuleGINV() override
Definition: MipsTargetStreamer.cpp:791
llvm::cl::init
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:432
llvm::StringRef::lower
LLVM_NODISCARD std::string lower() const
Definition: StringRef.cpp:112
llvm::MipsTargetStreamer::emitDirectiveNaN2008
virtual void emitDirectiveNaN2008()
Definition: MipsTargetStreamer.cpp:78
llvm::MipsTargetELFStreamer::emitDirectiveCpreturn
void emitDirectiveCpreturn(unsigned SaveLocation, bool SaveLocationIsRegister) override
Definition: MipsTargetStreamer.cpp:1297
llvm::MipsTargetAsmStreamer::emitDirectiveSetVirt
void emitDirectiveSetVirt() override
Definition: MipsTargetStreamer.cpp:457
llvm::MCAssembler::setELFHeaderEFlags
void setELFHeaderEFlags(unsigned Flags)
Definition: MCAssembler.h:277
llvm::ELF::EF_MIPS_MICROMIPS
@ EF_MIPS_MICROMIPS
Definition: ELF.h:547
llvm::MipsTargetStreamer::emitDirectiveSetMips64R5
virtual void emitDirectiveSetMips64R5()
Definition: MipsTargetStreamer.cpp:105
llvm::ELF::EF_MIPS_ARCH_32R6
@ EF_MIPS_ARCH_32R6
Definition: ELF.h:562
llvm::MipsTargetAsmStreamer::emitDirectiveCpAdd
void emitDirectiveCpAdd(unsigned RegNo) override
Definition: MipsTargetStreamer.cpp:680
llvm::formatted_raw_ostream
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
Definition: FormattedStream.h:30
llvm::MCStreamer::pushSection
void pushSection()
Save the current and previous section on the section stack.
Definition: MCStreamer.h:411
llvm::MipsTargetELFStreamer::emitFMask
void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override
Definition: MipsTargetStreamer.cpp:1137
llvm::MCStreamer::emitIntValue
virtual void emitIntValue(uint64_t Value, unsigned Size)
Special case of EmitValue that avoids the client having to pass in a MCExpr for constant integers.
Definition: MCStreamer.cpp:134
llvm::MCBinaryExpr::createSub
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:610
llvm::MipsABIInfo::O32
static MipsABIInfo O32()
Definition: MipsABIInfo.h:33
llvm::MipsTargetStreamer::emitRRX
void emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, MCOperand Op2, SMLoc IDLoc, const MCSubtargetInfo *STI)
Definition: MipsTargetStreamer.cpp:214
llvm::ELF::EF_MIPS_NOREORDER
@ EF_MIPS_NOREORDER
Definition: ELF.h:507
MipsMCTargetDesc.h
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips64
void emitDirectiveSetMips64() override
Definition: MipsTargetStreamer.cpp:589
llvm::MipsTargetAsmStreamer::emitDirectiveSetNoCRC
void emitDirectiveSetNoCRC() override
Definition: MipsTargetStreamer.cpp:452
llvm::MipsTargetAsmStreamer::emitDirectiveModuleSoftFloat
void emitDirectiveModuleSoftFloat() override
Definition: MipsTargetStreamer.cpp:763
llvm::MipsTargetStreamer::emitDirectiveSetFp
virtual void emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value)
Definition: MipsTargetStreamer.cpp:166
llvm::MipsTargetStreamer::emitDirectiveSetMips0
virtual void emitDirectiveSetMips0()
Definition: MipsTargetStreamer.cpp:91
llvm::MipsTargetStreamer::emitDirectiveAbiCalls
virtual void emitDirectiveAbiCalls()
Definition: MipsTargetStreamer.cpp:77
llvm::MipsTargetStreamer::emitDirectiveNaNLegacy
virtual void emitDirectiveNaNLegacy()
Definition: MipsTargetStreamer.cpp:79
llvm::MipsTargetStreamer::emitRI
void emitRI(unsigned Opcode, unsigned Reg0, int32_t Imm, SMLoc IDLoc, const MCSubtargetInfo *STI)
Definition: MipsTargetStreamer.cpp:194
llvm::MipsTargetAsmStreamer::emitDirectiveSetAtWithArg
void emitDirectiveSetAtWithArg(unsigned RegNo) override
Definition: MipsTargetStreamer.cpp:482
llvm::MCSymbolRefExpr
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:192
llvm::MipsTargetAsmStreamer::emitDirectiveModuleNoVirt
void emitDirectiveModuleNoVirt() override
Definition: MipsTargetStreamer.cpp:787
llvm::ELF::EF_MIPS_MACH_OCTEON
@ EF_MIPS_MACH_OCTEON
Definition: ELF.h:533
hasShortDelaySlot
static bool hasShortDelaySlot(MCInst &Inst)
Definition: MipsAsmParser.cpp:1758
llvm::MipsTargetStreamer::FPROffset
int FPROffset
Definition: MipsTargetStreamer.h:195
llvm::MCObjectStreamer::getAssembler
MCAssembler & getAssembler()
Definition: MCObjectStreamer.h:128
llvm::MipsTargetAsmStreamer::emitDirectiveSetGINV
void emitDirectiveSetGINV() override
Definition: MipsTargetStreamer.cpp:467
llvm::MipsTargetELFStreamer::emitDirectiveOptionPic2
void emitDirectiveOptionPic2() override
Definition: MipsTargetStreamer.cpp:1101
llvm::MCSection::getAlignment
unsigned getAlignment() const
Definition: MCSection.h:140
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips32R6
void emitDirectiveSetMips32R6() override
Definition: MipsTargetStreamer.cpp:584
llvm::ELF::EF_MIPS_ARCH_32
@ EF_MIPS_ARCH_32
Definition: ELF.h:558
llvm::MipsTargetELFStreamer::setUsesMicroMips
void setUsesMicroMips() override
Definition: MipsTargetStreamer.cpp:992
llvm::MCOperand::createReg
static MCOperand createReg(unsigned Reg)
Definition: MCInst.h:134
llvm::MipsTargetAsmStreamer::emitDirectiveOptionPic2
void emitDirectiveOptionPic2() override
Definition: MipsTargetStreamer.cpp:512
isMips32r6
static bool isMips32r6(const MCSubtargetInfo *STI)
Definition: MipsTargetStreamer.cpp:43
llvm::MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg
void emitDirectiveModuleOddSPReg() override
Definition: MipsTargetStreamer.cpp:747
llvm::MipsTargetELFStreamer::emitDirectiveAbiCalls
void emitDirectiveAbiCalls() override
Definition: MipsTargetStreamer.cpp:1071
llvm::MCSection
Instances of this class represent a uniqued identifier for a section in the current translation unit.
Definition: MCSection.h:39
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::MipsTargetStreamer::GPROffset
int GPROffset
Definition: MipsTargetStreamer.h:191
llvm::MipsTargetStreamer::emitDirectiveSetMips2
virtual void emitDirectiveSetMips2()
Definition: MipsTargetStreamer.cpp:93
llvm::MipsTargetStreamer::emitDirectiveModuleOddSPReg
virtual void emitDirectiveModuleOddSPReg()
Definition: MipsTargetStreamer.cpp:153
llvm::MipsTargetStreamer::emitDirectiveCpAdd
virtual void emitDirectiveCpAdd(unsigned RegNo)
Definition: MipsTargetStreamer.cpp:120
llvm::MipsTargetStreamer::emitDirectiveSetNoMsa
virtual void emitDirectiveSetNoMsa()
Definition: MipsTargetStreamer.cpp:61
llvm::MipsTargetStreamer::emitDirectiveSetNoGINV
virtual void emitDirectiveSetNoGINV()
Definition: MipsTargetStreamer.cpp:69
llvm::MipsTargetAsmStreamer::emitDirectiveSetOddSPReg
void emitDirectiveSetOddSPReg() override
Definition: MipsTargetStreamer.cpp:753
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition: MCRegisterInfo.h:135
llvm::MipsTargetAsmStreamer::emitDirectiveEnd
void emitDirectiveEnd(StringRef Name) override
Definition: MipsTargetStreamer.cpp:492
llvm::ELF::EF_MIPS_ARCH_64R2
@ EF_MIPS_ARCH_64R2
Definition: ELF.h:561
llvm::MipsMCExpr::create
static const MipsMCExpr * create(MipsExprKind Kind, const MCExpr *Expr, MCContext &Ctx)
Definition: MipsMCExpr.cpp:27
llvm::MipsABIFlagsSection::Is32BitABI
bool Is32BitABI
Definition: MipsABIFlagsSection.h:44
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips32R2
void emitDirectiveSetMips32R2() override
Definition: MipsTargetStreamer.cpp:569
llvm::MipsTargetStreamer::emitFMask
virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff)
Definition: MipsTargetStreamer.cpp:86
llvm::MCSection::setAlignment
void setAlignment(Align Value)
Definition: MCSection.h:141
llvm::isInt< 16 >
constexpr bool isInt< 16 >(int64_t x)
Definition: MathExtras.h:370
llvm::MipsTargetStreamer::emitDirectiveSetCRC
virtual void emitDirectiveSetCRC()
Definition: MipsTargetStreamer.cpp:64
llvm::MipsTargetAsmStreamer::emitDirectiveSetNoMips3D
void emitDirectiveSetNoMips3D() override
Definition: MipsTargetStreamer.cpp:634
llvm::MipsTargetAsmStreamer::emitDirectiveSetMacro
void emitDirectiveSetMacro() override
Definition: MipsTargetStreamer.cpp:417
llvm::MipsTargetAsmStreamer::emitDirectiveSetNoAt
void emitDirectiveSetNoAt() override
Definition: MipsTargetStreamer.cpp:487
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:83
llvm::MipsTargetELFStreamer::emitDirectiveCpLocal
void emitDirectiveCpLocal(unsigned RegNo) override
Definition: MipsTargetStreamer.cpp:1212
llvm::MipsTargetStreamer::emitDirectiveSetMicroMips
virtual void emitDirectiveSetMicroMips()
Definition: MipsTargetStreamer.cpp:51
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:50
llvm::MCInst::setLoc
void setLoc(SMLoc loc)
Definition: MCInst.h:203
llvm::ELF::EF_MIPS_NAN2008
@ EF_MIPS_NAN2008
Definition: ELF.h:515
llvm::MipsTargetStreamer::emitRRR
void emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2, SMLoc IDLoc, const MCSubtargetInfo *STI)
Definition: MipsTargetStreamer.cpp:226
llvm::ELF::STO_MIPS_MICROMIPS
@ STO_MIPS_MICROMIPS
Definition: ELF.h:586
llvm::MipsMCExpr::MEK_LO
@ MEK_LO
Definition: MipsMCExpr.h:39
llvm::MipsTargetELFStreamer::emitAssignment
void emitAssignment(MCSymbol *Symbol, const MCExpr *Value) override
Definition: MipsTargetStreamer.cpp:964
llvm::MipsTargetStreamer::forbidModuleDirective
void forbidModuleDirective()
Definition: MipsTargetStreamer.h:167
llvm::MipsTargetStreamer::emitDirectiveCpLocal
virtual void emitDirectiveCpLocal(unsigned RegNo)
Definition: MipsTargetStreamer.cpp:122
llvm::MipsTargetAsmStreamer::emitDirectiveSetPush
void emitDirectiveSetPush() override
Definition: MipsTargetStreamer.cpp:644
llvm::MipsELFStreamer
Definition: MipsELFStreamer.h:30
llvm::MipsTargetStreamer::emitDirectiveSetMips1
virtual void emitDirectiveSetMips1()
Definition: MipsTargetStreamer.cpp:92
MipsABIInfo.h
llvm::MipsTargetStreamer::emitRRIII
void emitRRIII(unsigned Opcode, unsigned Reg0, unsigned Reg1, int16_t Imm0, int16_t Imm1, int16_t Imm2, SMLoc IDLoc, const MCSubtargetInfo *STI)
Definition: MipsTargetStreamer.cpp:251
Casting.h
llvm::MipsTargetStreamer
Definition: MipsTargetStreamer.h:24
llvm::MipsTargetStreamer::emitDirectiveSetHardFloat
virtual void emitDirectiveSetHardFloat()
Definition: MipsTargetStreamer.cpp:112
llvm::MipsMCExpr
Definition: MipsMCExpr.h:18
llvm::MipsABIInfo::IsN32
bool IsN32() const
Definition: MipsABIInfo.h:41
llvm::MipsTargetStreamer::emitDirectiveSetMips32R6
virtual void emitDirectiveSetMips32R6()
Definition: MipsTargetStreamer.cpp:101
llvm::MipsTargetStreamer::emitDirectiveCpreturn
virtual void emitDirectiveCpreturn(unsigned SaveLocation, bool SaveLocationIsRegister)
Definition: MipsTargetStreamer.cpp:148
llvm::MipsTargetStreamer::setUsesMicroMips
virtual void setUsesMicroMips()
Definition: MipsTargetStreamer.cpp:53
llvm::MipsTargetAsmStreamer::emitDirectiveSetSoftFloat
void emitDirectiveSetSoftFloat() override
Definition: MipsTargetStreamer.cpp:649
llvm::MipsABIFlagsSection::FpABIKind
FpABIKind
Definition: MipsABIFlagsSection.h:23
llvm::MCObjectFileInfo::getBSSSection
MCSection * getBSSSection() const
Definition: MCObjectFileInfo.h:269
llvm::MipsELFStreamer::EmitMipsOptionRecords
void EmitMipsOptionRecords()
Emits all the option records stored up until the point it's called.
Definition: MipsELFStreamer.cpp:110
llvm::MipsTargetStreamer::emitDirectiveSetMips4
virtual void emitDirectiveSetMips4()
Definition: MipsTargetStreamer.cpp:95
llvm::MCSymbolRefExpr::create
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
Definition: MCExpr.h:386
llvm::MipsTargetAsmStreamer::emitDirectiveEnt
void emitDirectiveEnt(const MCSymbol &Symbol) override
Definition: MipsTargetStreamer.cpp:496
llvm::MipsTargetStreamer::emitNop
void emitNop(SMLoc IDLoc, const MCSubtargetInfo *STI)
Definition: MipsTargetStreamer.cpp:300
llvm::MipsTargetAsmStreamer::emitDirectiveCpLoad
void emitDirectiveCpLoad(unsigned RegNo) override
Definition: MipsTargetStreamer.cpp:686
llvm::MipsTargetELFStreamer::emitDirectiveSetNoReorder
void emitDirectiveSetNoReorder() override
Definition: MipsTargetStreamer.cpp:1007
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips64R2
void emitDirectiveSetMips64R2() override
Definition: MipsTargetStreamer.cpp:594
llvm::ELF::EF_MIPS_ARCH_ASE_M16
@ EF_MIPS_ARCH_ASE_M16
Definition: ELF.h:548
llvm::MCAssembler::registerSection
bool registerSection(MCSection &Section)
Definition: MCAssembler.cpp:127
llvm::ARMBuildAttrs::Symbol
@ Symbol
Definition: ARMBuildAttributes.h:83
llvm::RISCVMatInt::Imm
@ Imm
Definition: RISCVMatInt.h:23
llvm::MipsTargetAsmStreamer::emitDirectiveCpreturn
void emitDirectiveCpreturn(unsigned SaveLocation, bool SaveLocationIsRegister) override
Definition: MipsTargetStreamer.cpp:725
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips32
void emitDirectiveSetMips32() override
Definition: MipsTargetStreamer.cpp:564
llvm::MipsMCExpr::MEK_HI
@ MEK_HI
Definition: MipsMCExpr.h:36
llvm::MipsTargetStreamer::ABI
llvm::Optional< MipsABIInfo > ABI
Definition: MipsTargetStreamer.h:186
llvm::MipsTargetStreamer::emitR
void emitR(unsigned Opcode, unsigned Reg0, SMLoc IDLoc, const MCSubtargetInfo *STI)
Definition: MipsTargetStreamer.cpp:175
llvm::MipsTargetAsmStreamer::emitDirectiveInsn
void emitDirectiveInsn() override
Definition: MipsTargetStreamer.cpp:516
llvm::MipsTargetAsmStreamer::emitDirectiveSetNoMips16
void emitDirectiveSetNoMips16() override
Definition: MipsTargetStreamer.cpp:402
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips3D
void emitDirectiveSetMips3D() override
Definition: MipsTargetStreamer.cpp:629
llvm::MipsTargetAsmStreamer::emitDirectiveSetNoMacro
void emitDirectiveSetNoMacro() override
Definition: MipsTargetStreamer.cpp:422
llvm::MCStreamer::emitCodeAlignment
virtual void emitCodeAlignment(unsigned ByteAlignment, const MCSubtargetInfo *STI, unsigned MaxBytesToEmit=0)
Emit nops until the byte alignment ByteAlignment is reached.
Definition: MCStreamer.cpp:1215
llvm::MipsTargetAsmStreamer::emitDirectiveSetDspr2
void emitDirectiveSetDspr2() override
Definition: MipsTargetStreamer.cpp:619
llvm::MipsTargetELFStreamer::emitDirectiveCpsetup
void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg) override
Definition: MipsTargetStreamer.cpp:1238
llvm::MipsTargetAsmStreamer::emitMask
void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override
Definition: MipsTargetStreamer.cpp:666
llvm::MCExpr::SymbolRef
@ SymbolRef
References to labels and assigned expressions.
Definition: MCExpr.h:40
llvm::ELF::SHT_PROGBITS
@ SHT_PROGBITS
Definition: ELF.h:955
llvm::MipsTargetStreamer::emitDirectiveSetPop
virtual void emitDirectiveSetPop()
Definition: MipsTargetStreamer.cpp:107
llvm::MipsTargetStreamer::emitDirectiveEnd
virtual void emitDirectiveEnd(StringRef Name)
Definition: MipsTargetStreamer.cpp:75
llvm::MipsTargetAsmStreamer::emitDirectiveSetHardFloat
void emitDirectiveSetHardFloat() override
Definition: MipsTargetStreamer.cpp:654
llvm::MipsTargetStreamer::emitDirectiveModuleHardFloat
virtual void emitDirectiveModuleHardFloat()
Definition: MipsTargetStreamer.cpp:158
llvm::MipsTargetStreamer::ABIFlagsSection
MipsABIFlagsSection ABIFlagsSection
Definition: MipsTargetStreamer.h:187
llvm::MipsTargetELFStreamer::emitDirectiveOptionPic0
void emitDirectiveOptionPic0() override
Definition: MipsTargetStreamer.cpp:1092
llvm::MipsABIInfo::IsO32
bool IsO32() const
Definition: MipsABIInfo.h:40
llvm::ELF::EF_MIPS_CPIC
@ EF_MIPS_CPIC
Definition: ELF.h:509
llvm::MipsMCExpr::createGpOff
static const MipsMCExpr * createGpOff(MipsExprKind Kind, const MCExpr *Expr, MCContext &Ctx)
Definition: MipsMCExpr.cpp:32
llvm::ELF::EF_MIPS_ABI2
@ EF_MIPS_ABI2
Definition: ELF.h:510
llvm::MCStreamer::emitValueToAlignment
virtual void emitValueToAlignment(unsigned ByteAlignment, int64_t Value=0, unsigned ValueSize=1, unsigned MaxBytesToEmit=0)
Emit some number of copies of Value until the byte alignment ByteAlignment is reached.
Definition: MCStreamer.cpp:1212
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips4
void emitDirectiveSetMips4() override
Definition: MipsTargetStreamer.cpp:554
llvm::MipsTargetStreamer::emitDirectiveSetDsp
virtual void emitDirectiveSetDsp()
Definition: MipsTargetStreamer.cpp:115
llvm::MipsTargetAsmStreamer::emitDirectiveSetNoOddSPReg
void emitDirectiveSetNoOddSPReg() override
Definition: MipsTargetStreamer.cpp:758
llvm::MipsTargetAsmStreamer::emitDirectiveModuleCRC
void emitDirectiveModuleCRC() override
Definition: MipsTargetStreamer.cpp:775
llvm::MipsTargetStreamer::emitDirectiveSetMsa
virtual void emitDirectiveSetMsa()
Definition: MipsTargetStreamer.cpp:60
llvm::MipsTargetStreamer::getABI
const MipsABIInfo & getABI() const
Definition: MipsTargetStreamer.h:180
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips64R6
void emitDirectiveSetMips64R6() override
Definition: MipsTargetStreamer.cpp:609
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips3
void emitDirectiveSetMips3() override
Definition: MipsTargetStreamer.cpp:549
llvm::MipsTargetAsmStreamer::emitDirectiveSetMicroMips
void emitDirectiveSetMicroMips() override
Definition: MipsTargetStreamer.cpp:387
llvm::MCOperand
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
llvm::MipsTargetELFStreamer::emitDirectiveInsn
void emitDirectiveInsn() override
Definition: MipsTargetStreamer.cpp:1113
llvm::MCSymbolRefExpr::VK_None
@ VK_None
Definition: MCExpr.h:195
llvm::MipsTargetStreamer::emitDirectiveSetReorder
virtual void emitDirectiveSetReorder()
Definition: MipsTargetStreamer.cpp:56
llvm::MipsTargetELFStreamer::getStreamer
MCELFStreamer & getStreamer()
Definition: MipsTargetStreamer.cpp:978
llvm::MipsTargetStreamer::emitDirectiveSetSoftFloat
virtual void emitDirectiveSetSoftFloat()
Definition: MipsTargetStreamer.cpp:109
llvm::cl::desc
Definition: CommandLine.h:405
llvm::MipsTargetStreamer::emitDirectiveSetMips32R2
virtual void emitDirectiveSetMips32R2()
Definition: MipsTargetStreamer.cpp:98
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips1
void emitDirectiveSetMips1() override
Definition: MipsTargetStreamer.cpp:539
llvm::MipsTargetStreamer::emitDirectiveSetMips32
virtual void emitDirectiveSetMips32()
Definition: MipsTargetStreamer.cpp:97
llvm::MipsTargetAsmStreamer::emitDirectiveModuleMT
void emitDirectiveModuleMT() override
Definition: MipsTargetStreamer.cpp:771
llvm::MipsTargetStreamer::emitDirectiveSetNoMicroMips
virtual void emitDirectiveSetNoMicroMips()
Definition: MipsTargetStreamer.cpp:52
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:76
llvm::MipsTargetStreamer::GPReg
unsigned GPReg
Definition: MipsTargetStreamer.h:200
llvm::MipsTargetStreamer::emitDirectiveSetPush
virtual void emitDirectiveSetPush()
Definition: MipsTargetStreamer.cpp:108
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::MCExpr
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
llvm::MipsTargetAsmStreamer::emitDirectiveSetMips2
void emitDirectiveSetMips2() override
Definition: MipsTargetStreamer.cpp:544
llvm::MCInst::clear
void clear()
Definition: MCInst.h:215
llvm::MCObjectFileInfo
Definition: MCObjectFileInfo.h:27
llvm::MipsTargetStreamer::emitDirectiveSetMips64R2
virtual void emitDirectiveSetMips64R2()
Definition: MipsTargetStreamer.cpp:103
llvm::MipsTargetAsmStreamer::emitDirectiveNaN2008
void emitDirectiveNaN2008() override
Definition: MipsTargetStreamer.cpp:502
llvm::MipsTargetStreamer::FrameOffset
int FrameOffset
Definition: MipsTargetStreamer.h:198
llvm::MipsTargetAsmStreamer::emitDirectiveSetNoDsp
void emitDirectiveSetNoDsp() override
Definition: MipsTargetStreamer.cpp:624
llvm::MipsTargetStreamer::ReturnReg
unsigned ReturnReg
Definition: MipsTargetStreamer.h:201
llvm::MipsTargetELFStreamer::emitDirectiveNaNLegacy
void emitDirectiveNaNLegacy() override
Definition: MipsTargetStreamer.cpp:1085
llvm::MipsTargetStreamer::emitDirectiveSetAtWithArg
virtual void emitDirectiveSetAtWithArg(unsigned RegNo)
Definition: MipsTargetStreamer.cpp:71
llvm::raw_ostream::write_hex
raw_ostream & write_hex(unsigned long long N)
Output N in hexadecimal, without any prefix or padding.
Definition: raw_ostream.cpp:139
llvm::MipsTargetAsmStreamer::emitFrame
void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg) override
Definition: MipsTargetStreamer.cpp:521