14#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVMODULEANALYSIS_H
15#define LLVM_LIB_TARGET_SPIRV_SPIRVMODULEANALYSIS_H
28class MachineModuleInfo;
46 const std::optional<Capability::Capability>
Cap;
52 std::optional<Capability::Capability>
Cap = {},
77 AvailableCaps.
clear();
78 AllExtensions.
clear();
119 std::map<const MachineFunction *, LocalToGlobalRegTable>;
125 MemoryModel::MemoryModel
Mem;
126 AddressingModel::AddressingModel
Addr;
151 assert(
F &&
"Function is null");
152 auto FuncPtrRegPair =
FuncMap.find(
F);
153 assert(FuncPtrRegPair !=
FuncMap.end() &&
"Cannot find function ID");
154 return FuncPtrRegPair->second;
204 void setBaseInfo(
const Module &M);
205 void collectGlobalEntities(
206 const std::vector<SPIRV::DTSortableEntry *> &DepsGraph,
210 void processDefInstrs(
const Module &M);
212 void processOtherInstrs(
const Module &M);
213 void numberRegistersGlobally(
const Module &M);
This file defines the StringMap class.
This file defines the DenseMap class.
const HexagonInstrInfo * TII
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallSet class.
This file defines the SmallVector class.
Represent the analysis usage information of a pass.
Implements a dense probed hash-table based set.
Representation of each machine instruction.
This class contains meta information specific to a module.
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
A Module instance is used to store all the information related to an LLVM module.
Wrapper class representing virtual and physical registers.
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
std::pair< const_iterator, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StringSet - A wrapper for StringMap that provides set-like functionality.
bool contains(const_arg_type_t< ValueT > V) const
Check if the set contains the given element.
std::map< const MachineFunction *, LocalToGlobalRegTable > RegisterAliasMapTy
std::map< Register, Register > LocalToGlobalRegTable
@ MB_DebugModuleProcessed
This is an optimization pass for GlobalISel generic memory operations.
static struct SPIRV::ModuleAnalysisInfo MAI
bool runOnModule(Module &M) override
runOnModule - Virtual method overriden by subclasses to process the module being operated on.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
Register getRegisterAlias(const MachineFunction *MF, Register Reg)
SmallVector< MachineInstr *, 4 > GlobalVarList
Register getExtInstSetReg(unsigned SetNum)
bool hasMBBRegister(const MachineBasicBlock &MBB)
DenseMap< const Function *, Register > FuncMap
void setRegisterAlias(const MachineFunction *MF, Register Reg, Register AliasReg)
bool hasRegisterAlias(const MachineFunction *MF, Register Reg)
RegisterAliasMapTy RegisterAliasTable
Register getOrCreateMBBRegister(const MachineBasicBlock &MBB)
InstrList & getMSInstrs(unsigned MSType)
bool getSkipEmission(const MachineInstr *MI)
MemoryModel::MemoryModel Mem
DenseMap< int, Register > BBNumToRegMap
InstrList MS[NUM_MODULE_SECTIONS]
AddressingModel::AddressingModel Addr
void setSkipEmission(MachineInstr *MI)
SourceLanguage::SourceLanguage SrcLang
Register getFuncReg(const Function *F)
DenseSet< MachineInstr * > InstrsToDelete
DenseMap< unsigned, Register > ExtInstSetMap
void addCapabilities(const CapabilityList &ToAdd)
unsigned getMaxVersion() const
bool isCapabilityAvailable(Capability::Capability Cap) const
unsigned getMinVersion() const
void addExtensions(const ExtensionList &ToAdd)
void checkSatisfiable(const SPIRVSubtarget &ST) const
void getAndAddRequirements(SPIRV::OperandCategory::OperandCategory Category, uint32_t i, const SPIRVSubtarget &ST)
void addExtension(Extension::Extension ToAdd)
void initAvailableCapabilities(const SPIRVSubtarget &ST)
void addCapability(Capability::Capability ToAdd)
void addAvailableCaps(const CapabilityList &ToAdd)
const CapabilityList & getMinimalCapabilities() const
const SmallSet< Extension::Extension, 4 > & getExtensions() const
void addRequirements(const Requirements &Req)
Requirements(bool IsSatisfiable=false, std::optional< Capability::Capability > Cap={}, ExtensionList Exts={}, unsigned MinVer=0, unsigned MaxVer=0)
const std::optional< Capability::Capability > Cap
Requirements(Capability::Capability Cap)