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SPIRVModuleAnalysis.h
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1 //===- SPIRVModuleAnalysis.h - analysis of global instrs & regs -*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // The analysis collects instructions that should be output at the module level
10 // and performs the global register numbering.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVMODULEANALYSIS_H
15 #define LLVM_LIB_TARGET_SPIRV_SPIRVMODULEANALYSIS_H
16 
18 #include "SPIRVDuplicatesTracker.h"
19 #include "SPIRVSubtarget.h"
20 #include "llvm/ADT/DenseMap.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/ADT/StringMap.h"
23 
24 namespace llvm {
25 class MachineFunction;
26 class MachineModuleInfo;
27 
28 namespace SPIRV {
29 // The enum contains logical module sections for the instruction collection.
31  // MB_Capabilities, MB_Extensions, MB_ExtInstImports, MB_MemoryModel,
32  MB_EntryPoints, // All OpEntryPoint instructions (if any).
33  // MB_ExecutionModes, MB_DebugSourceAndStrings,
34  MB_DebugNames, // All OpName and OpMemberName intrs.
35  MB_DebugModuleProcessed, // All OpModuleProcessed instructions.
36  MB_Annotations, // OpDecorate, OpMemberDecorate etc.
37  MB_TypeConstVars, // OpTypeXXX, OpConstantXXX, and global OpVariables.
38  MB_ExtFuncDecls, // OpFunction etc. to declare for external funcs.
39  NUM_MODULE_SECTIONS // Total number of sections requiring basic blocks.
40 };
41 
43 // Maps a local register to the corresponding global alias.
44 using LocalToGlobalRegTable = std::map<Register, Register>;
45 using RegisterAliasMapTy =
46  std::map<const MachineFunction *, LocalToGlobalRegTable>;
47 
48 // The struct contains results of the module analysis and methods
49 // to access them.
54  unsigned SrcLangVersion;
55  // Contains the list of all global OpVariables in the module.
57  // Maps function names to coresponding function ID registers.
59  // The set contains machine instructions which are necessary
60  // for correct MIR but will not be emitted in function bodies.
62  // The table contains global aliases of local registers for each machine
63  // function. The aliases are used to substitute local registers during
64  // code emission.
66  // The counter holds the maximum ID we have in the module.
67  unsigned MaxID;
68  // The array contains lists of MIs for each module section.
70  // The table maps MBB number to SPIR-V unique ID register.
72 
73  Register getFuncReg(std::string FuncName) {
74  auto FuncReg = FuncNameMap.find(FuncName);
75  assert(FuncReg != FuncNameMap.end() && "Cannot find function Id");
76  return FuncReg->second;
77  }
78  InstrList &getMSInstrs(unsigned MSType) { return MS[MSType]; }
81  return InstrsToDelete.contains(MI);
82  }
84  Register AliasReg) {
85  RegisterAliasTable[MF][Reg] = AliasReg;
86  }
88  auto RI = RegisterAliasTable[MF].find(Reg);
89  if (RI == RegisterAliasTable[MF].end()) {
90  return Register(0);
91  }
92  return RegisterAliasTable[MF][Reg];
93  }
95  return RegisterAliasTable.find(MF) != RegisterAliasTable.end() &&
96  RegisterAliasTable[MF].find(Reg) != RegisterAliasTable[MF].end();
97  }
98  unsigned getNextID() { return MaxID++; }
100  return BBNumToRegMap.find(MBB.getNumber()) != BBNumToRegMap.end();
101  }
102  // Convert MBB's number to corresponding ID register.
104  auto f = BBNumToRegMap.find(MBB.getNumber());
105  if (f != BBNumToRegMap.end())
106  return f->second;
108  BBNumToRegMap[MBB.getNumber()] = NewReg;
109  return NewReg;
110  }
111 };
112 } // namespace SPIRV
113 
115  static char ID;
116 
117 public:
119 
120  bool runOnModule(Module &M) override;
121  void getAnalysisUsage(AnalysisUsage &AU) const override;
123 
124 private:
125  void setBaseInfo(const Module &M);
126  template <typename T> void collectTypesConstsVars();
127  void collectGlobalEntities(
128  const std::vector<SPIRV::DTSortableEntry *> &DepsGraph,
130  std::function<bool(const SPIRV::DTSortableEntry *)> Pred,
131  bool UsePreOrder);
132  void processDefInstrs(const Module &M);
133  void collectFuncNames(MachineInstr &MI, const Function &F);
134  void processOtherInstrs(const Module &M);
135  void numberRegistersGlobally(const Module &M);
136 
137  const SPIRVSubtarget *ST;
139  const SPIRVInstrInfo *TII;
140  MachineModuleInfo *MMI;
141 };
142 } // namespace llvm
143 #endif // LLVM_LIB_TARGET_SPIRV_SPIRVMODULEANALYSIS_H
llvm::SPIRV::ModuleAnalysisInfo::setRegisterAlias
void setRegisterAlias(const MachineFunction *MF, Register Reg, Register AliasReg)
Definition: SPIRVModuleAnalysis.h:83
llvm::SPIRV::ModuleSectionType
ModuleSectionType
Definition: SPIRVModuleAnalysis.h:30
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::ModulePass
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
Definition: Pass.h:248
llvm::SPIRV::MB_TypeConstVars
@ MB_TypeConstVars
Definition: SPIRVModuleAnalysis.h:37
llvm::Function
Definition: Function.h:60
llvm::SPIRV::NUM_MODULE_SECTIONS
@ NUM_MODULE_SECTIONS
Definition: SPIRVModuleAnalysis.h:39
llvm::SmallVector< MachineInstr * >
llvm::SPIRV::ModuleAnalysisInfo::Mem
SPIRV::MemoryModel Mem
Definition: SPIRVModuleAnalysis.h:51
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
DenseMap.h
llvm::sys::path::end
const_iterator end(StringRef path)
Get end iterator over path.
Definition: Path.cpp:235
llvm::SPIRVSubtarget
Definition: SPIRVSubtarget.h:36
llvm::SPIRV::LocalToGlobalRegTable
std::map< Register, Register > LocalToGlobalRegTable
Definition: SPIRVModuleAnalysis.h:44
llvm::SPIRV::ModuleAnalysisInfo::MaxID
unsigned MaxID
Definition: SPIRVModuleAnalysis.h:67
llvm::Register::index2VirtReg
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
Definition: Register.h:84
llvm::SPIRV::ModuleAnalysisInfo
Definition: SPIRVModuleAnalysis.h:50
SPIRVSubtarget.h
llvm::SPIRV::ModuleAnalysisInfo::getMSInstrs
InstrList & getMSInstrs(unsigned MSType)
Definition: SPIRVModuleAnalysis.h:78
llvm::detail::DenseSetImpl::insert
std::pair< iterator, bool > insert(const ValueT &V)
Definition: DenseSet.h:206
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::SPIRV::DTSortableEntry
Definition: SPIRVDuplicatesTracker.h:31
llvm::SPIRV::ModuleAnalysisInfo::setSkipEmission
void setSkipEmission(MachineInstr *MI)
Definition: SPIRVModuleAnalysis.h:79
llvm::SPIRV::ModuleAnalysisInfo::Addr
SPIRV::AddressingModel Addr
Definition: SPIRVModuleAnalysis.h:52
f
Itanium Name Demangler i e convert the string _Z1fv into f()". You can also use the CRTP base ManglingParser to perform some simple analysis on the mangled name
SPIRVBaseInfo.h
llvm::AnalysisUsage
Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
llvm::SPIRVModuleAnalysis::MAI
static struct SPIRV::ModuleAnalysisInfo MAI
Definition: SPIRVModuleAnalysis.h:122
llvm::SPIRV::ModuleAnalysisInfo::getNextID
unsigned getNextID()
Definition: SPIRVModuleAnalysis.h:98
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
llvm::MachineModuleInfo
This class contains meta information specific to a module.
Definition: MachineModuleInfo.h:74
llvm::SPIRV::ModuleAnalysisInfo::SrcLangVersion
unsigned SrcLangVersion
Definition: SPIRVModuleAnalysis.h:54
llvm::SPIRV::MB_Annotations
@ MB_Annotations
Definition: SPIRVModuleAnalysis.h:36
StringMap.h
llvm::SPIRV::ModuleAnalysisInfo::RegisterAliasTable
RegisterAliasMapTy RegisterAliasTable
Definition: SPIRVModuleAnalysis.h:65
llvm::SPIRV::MB_DebugModuleProcessed
@ MB_DebugModuleProcessed
Definition: SPIRVModuleAnalysis.h:35
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::SPIRV::ModuleAnalysisInfo::getSkipEmission
bool getSkipEmission(const MachineInstr *MI)
Definition: SPIRVModuleAnalysis.h:80
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::StringMap
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition: StringMap.h:110
llvm::SPIRV::MB_ExtFuncDecls
@ MB_ExtFuncDecls
Definition: SPIRVModuleAnalysis.h:38
llvm::SPIRV::ModuleAnalysisInfo::hasRegisterAlias
bool hasRegisterAlias(const MachineFunction *MF, Register Reg)
Definition: SPIRVModuleAnalysis.h:94
llvm::DenseSet< MachineInstr * >
llvm::SPIRV::ModuleAnalysisInfo::getFuncReg
Register getFuncReg(std::string FuncName)
Definition: SPIRVModuleAnalysis.h:73
llvm::SPIRVModuleAnalysis::ID
static char ID
Definition: SPIRVModuleAnalysis.h:115
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
llvm::ARM_MB::ST
@ ST
Definition: ARMBaseInfo.h:73
llvm::SPIRV::ModuleAnalysisInfo::GlobalVarList
SmallVector< MachineInstr *, 4 > GlobalVarList
Definition: SPIRVModuleAnalysis.h:56
llvm::SPIRV::AddressingModel
AddressingModel
Definition: SPIRVBaseInfo.h:167
llvm::DenseMap
Definition: DenseMap.h:716
llvm::SPIRV::ModuleAnalysisInfo::FuncNameMap
StringMap< Register > FuncNameMap
Definition: SPIRVModuleAnalysis.h:58
llvm::SPIRV::ModuleAnalysisInfo::MS
InstrList MS[NUM_MODULE_SECTIONS]
Definition: SPIRVModuleAnalysis.h:69
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::SPIRV::MB_DebugNames
@ MB_DebugNames
Definition: SPIRVModuleAnalysis.h:34
function
print Print MemDeps of function
Definition: MemDepPrinter.cpp:82
llvm::SPIRVGlobalRegistry
Definition: SPIRVGlobalRegistry.h:27
SPIRVDuplicatesTracker.h
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
llvm::SPIRV::ModuleAnalysisInfo::hasMBBRegister
bool hasMBBRegister(const MachineBasicBlock &MBB)
Definition: SPIRVModuleAnalysis.h:99
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::SPIRVInstrInfo
Definition: SPIRVInstrInfo.h:24
llvm::SPIRV::MemoryModel
MemoryModel
Definition: SPIRVBaseInfo.h:194
llvm::SPIRV::ModuleAnalysisInfo::SrcLang
SPIRV::SourceLanguage SrcLang
Definition: SPIRVModuleAnalysis.h:53
llvm::detail::DenseSetImpl::contains
bool contains(const_arg_type_t< ValueT > V) const
Check if the set contains the given element.
Definition: DenseSet.h:185
llvm::SPIRVModuleAnalysis
Definition: SPIRVModuleAnalysis.h:114
llvm::SPIRV::ModuleAnalysisInfo::getRegisterAlias
Register getRegisterAlias(const MachineFunction *MF, Register Reg)
Definition: SPIRVModuleAnalysis.h:87
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::SPIRVModuleAnalysis::SPIRVModuleAnalysis
SPIRVModuleAnalysis()
Definition: SPIRVModuleAnalysis.h:118
llvm::SPIRV::ModuleAnalysisInfo::BBNumToRegMap
DenseMap< int, Register > BBNumToRegMap
Definition: SPIRVModuleAnalysis.h:71
llvm::SPIRV::MB_EntryPoints
@ MB_EntryPoints
Definition: SPIRVModuleAnalysis.h:32
SmallVector.h
llvm::SPIRVModuleAnalysis::runOnModule
bool runOnModule(Module &M) override
runOnModule - Virtual method overriden by subclasses to process the module being operated on.
Definition: SPIRVModuleAnalysis.cpp:297
llvm::SPIRV::ModuleAnalysisInfo::InstrsToDelete
DenseSet< MachineInstr * > InstrsToDelete
Definition: SPIRVModuleAnalysis.h:61
llvm::SPIRV::RegisterAliasMapTy
std::map< const MachineFunction *, LocalToGlobalRegTable > RegisterAliasMapTy
Definition: SPIRVModuleAnalysis.h:46
llvm::SPIRV::SourceLanguage
SourceLanguage
Definition: SPIRVBaseInfo.h:157
llvm::SPIRVModuleAnalysis::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
Definition: SPIRVModuleAnalysis.cpp:292
llvm::SPIRV::ModuleAnalysisInfo::getOrCreateMBBRegister
Register getOrCreateMBBRegister(const MachineBasicBlock &MBB)
Definition: SPIRVModuleAnalysis.h:103