LLVM 19.0.0git
SPIRVInstrInfo.h
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1//===-- SPIRVInstrInfo.h - SPIR-V Instruction Information -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the SPIR-V implementation of the TargetInstrInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H
14#define LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H
15
16#include "SPIRVRegisterInfo.h"
18
19#define GET_INSTRINFO_HEADER
20#include "SPIRVGenInstrInfo.inc"
21
22namespace llvm {
23
25 const SPIRVRegisterInfo RI;
26
27public:
29
30 const SPIRVRegisterInfo &getRegisterInfo() const { return RI; }
31 bool isHeaderInstr(const MachineInstr &MI) const;
32 bool isConstantInstr(const MachineInstr &MI) const;
33 bool isTypeDeclInstr(const MachineInstr &MI) const;
34 bool isDecorationInstr(const MachineInstr &MI) const;
35 bool canUseFastMathFlags(const MachineInstr &MI) const;
36 bool canUseNSW(const MachineInstr &MI) const;
37 bool canUseNUW(const MachineInstr &MI) const;
38
42 bool AllowModify = false) const override;
43
45 int *BytesRemoved = nullptr) const override;
46
49 const DebugLoc &DL,
50 int *BytesAdded = nullptr) const override;
52 const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
53 bool KillSrc) const override;
54 bool expandPostRAPseudo(MachineInstr &MI) const override;
55};
56
57namespace SPIRV {
59 // It is a half type
61};
62} // namespace SPIRV
63
64} // namespace llvm
65
66#endif // LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
IRTranslator LLVM IR MI
#define I(x, y, z)
Definition: MD5.cpp:58
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
const SmallVectorImpl< MachineOperand > & Cond
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
A debug info location.
Definition: DebugLoc.h:33
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:33
Representation of each machine instruction.
Definition: MachineInstr.h:69
bool isConstantInstr(const MachineInstr &MI) const
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override
bool isTypeDeclInstr(const MachineInstr &MI) const
bool canUseFastMathFlags(const MachineInstr &MI) const
bool isDecorationInstr(const MachineInstr &MI) const
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
bool expandPostRAPseudo(MachineInstr &MI) const override
bool isHeaderInstr(const MachineInstr &MI) const
bool canUseNUW(const MachineInstr &MI) const
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override
const SPIRVRegisterInfo & getRegisterInfo() const
bool canUseNSW(const MachineInstr &MI) const
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18