llvm::GMemOperation Class Reference
Provides common memory operand functionality. More...
#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
Inheritance diagram for llvm::GMemOperation:
Public Member Functions | |
| MachineMemOperand & | getMMO () const |
| Get the MachineMemOperand on this instruction. | |
| bool | isAtomic () const |
| Returns true if the attached MachineMemOperand has the atomic flag set. | |
| bool | isVolatile () const |
| Returns true if the attached MachineMemOpeand as the volatile flag set. | |
| bool | isSimple () const |
| Returns true if the memory operation is neither atomic or volatile. | |
| bool | isUnordered () const |
| Returns true if this memory operation doesn't have any ordering constraints other than normal aliasing. | |
| Align | getAlign () const |
| Return the minimum known alignment in bytes of the actual memory reference. | |
| LocationSize | getMemSize () const |
| Returns the size in bytes of the memory access. | |
| LocationSize | getMemSizeInBits () const |
| Returns the size in bits of the memory access. | |
| Public Member Functions inherited from llvm::GenericMachineInstr | |
| GenericMachineInstr ()=delete | |
| Register | getReg (unsigned Idx) const |
| Access the Idx'th operand as a register and return it. | |
| bool | hasPoisonGeneratingFlags () const |
| void | dropPoisonGeneratingFlags () |
| Public Member Functions inherited from llvm::MachineInstr | |
| MachineInstr (const MachineInstr &)=delete | |
| MachineInstr & | operator= (const MachineInstr &)=delete |
| ~MachineInstr ()=delete | |
| const MachineBasicBlock * | getParent () const |
| MachineBasicBlock * | getParent () |
| LLVM_ABI void | moveBefore (MachineInstr *MovePos) |
Move the instruction before MovePos. | |
| LLVM_ABI const MachineFunction * | getMF () const |
| Return the function that contains the basic block that this instruction belongs to. | |
| MachineFunction * | getMF () |
| uint8_t | getAsmPrinterFlags () const |
| Return the asm printer flags bitvector. | |
| void | clearAsmPrinterFlags () |
| Clear the AsmPrinter bitvector. | |
| bool | getAsmPrinterFlag (CommentFlag Flag) const |
| Return whether an AsmPrinter flag is set. | |
| void | setAsmPrinterFlag (uint8_t Flag) |
| Set a flag for the AsmPrinter. | |
| void | clearAsmPrinterFlag (CommentFlag Flag) |
| Clear specific AsmPrinter flags. | |
| uint32_t | getFlags () const |
| Return the MI flags bitvector. | |
| bool | getFlag (MIFlag Flag) const |
| Return whether an MI flag is set. | |
| void | setFlag (MIFlag Flag) |
| Set a MI flag. | |
| void | setFlags (unsigned flags) |
| void | clearFlag (MIFlag Flag) |
| clearFlag - Clear a MI flag. | |
| void | clearFlags (unsigned flags) |
| bool | isInsideBundle () const |
| Return true if MI is in a bundle (but not the first MI in a bundle). | |
| bool | isBundled () const |
| Return true if this instruction part of a bundle. | |
| bool | isBundledWithPred () const |
| Return true if this instruction is part of a bundle, and it is not the first instruction in the bundle. | |
| bool | isBundledWithSucc () const |
| Return true if this instruction is part of a bundle, and it is not the last instruction in the bundle. | |
| LLVM_ABI void | bundleWithPred () |
| Bundle this instruction with its predecessor. | |
| LLVM_ABI void | bundleWithSucc () |
| Bundle this instruction with its successor. | |
| LLVM_ABI void | unbundleFromPred () |
| Break bundle above this instruction. | |
| LLVM_ABI void | unbundleFromSucc () |
| Break bundle below this instruction. | |
| const DebugLoc & | getDebugLoc () const |
| Returns the debug location id of this MachineInstr. | |
| const MachineOperand & | getDebugOffset () const |
| Return the operand containing the offset to be used if this DBG_VALUE instruction is indirect; will be an invalid register if this value is not indirect, and an immediate with value 0 otherwise. | |
| MachineOperand & | getDebugOffset () |
| LLVM_ABI const MachineOperand & | getDebugVariableOp () const |
| Return the operand for the debug variable referenced by this DBG_VALUE instruction. | |
| LLVM_ABI MachineOperand & | getDebugVariableOp () |
| LLVM_ABI const DILocalVariable * | getDebugVariable () const |
| Return the debug variable referenced by this DBG_VALUE instruction. | |
| LLVM_ABI const MachineOperand & | getDebugExpressionOp () const |
| Return the operand for the complex address expression referenced by this DBG_VALUE instruction. | |
| LLVM_ABI MachineOperand & | getDebugExpressionOp () |
| LLVM_ABI const DIExpression * | getDebugExpression () const |
| Return the complex address expression referenced by this DBG_VALUE instruction. | |
| LLVM_ABI const DILabel * | getDebugLabel () const |
| Return the debug label referenced by this DBG_LABEL instruction. | |
| LLVM_ABI unsigned | getDebugInstrNum () |
| Fetch the instruction number of this MachineInstr. | |
| LLVM_ABI unsigned | getDebugInstrNum (MachineFunction &MF) |
Fetch instruction number of this MachineInstr – but before it's inserted into MF. | |
| unsigned | peekDebugInstrNum () const |
| Examine the instruction number of this MachineInstr. | |
| void | setDebugInstrNum (unsigned Num) |
| Set instruction number of this MachineInstr. | |
| void | dropDebugNumber () |
| Drop any variable location debugging information associated with this instruction. | |
| LLVM_ABI const MDNode * | getLocCookieMD () const |
| For inline asm, get the !srcloc metadata node if we have it, and decode the loc cookie from it. | |
| LLVM_ABI void | emitInlineAsmError (const Twine &ErrMsg) const |
| Emit an error referring to the source location of this instruction. | |
| LLVM_ABI void | emitGenericError (const Twine &ErrMsg) const |
| const MCInstrDesc & | getDesc () const |
| Returns the target instruction descriptor of this MachineInstr. | |
| unsigned | getOpcode () const |
| Returns the opcode of this MachineInstr. | |
| unsigned | getNumOperands () const |
| Retuns the total number of operands. | |
| unsigned | getNumDebugOperands () const |
| Returns the total number of operands which are debug locations. | |
| const MachineOperand & | getOperand (unsigned i) const |
| MachineOperand & | getOperand (unsigned i) |
| MachineOperand & | getDebugOperand (unsigned Index) |
| const MachineOperand & | getDebugOperand (unsigned Index) const |
| bool | hasDebugOperandForReg (Register Reg) const |
Returns whether this debug value has at least one debug operand with the register Reg. | |
| LLVM_ABI iterator_range< filter_iterator< const MachineOperand *, std::function< bool(const MachineOperand &Op)> > > | getDebugOperandsForReg (Register Reg) const |
Returns a range of all of the operands that correspond to a debug use of Reg. | |
| LLVM_ABI iterator_range< filter_iterator< MachineOperand *, std::function< bool(MachineOperand &Op)> > > | getDebugOperandsForReg (Register Reg) |
| bool | isDebugOperand (const MachineOperand *Op) const |
| unsigned | getDebugOperandIndex (const MachineOperand *Op) const |
| unsigned | getNumDefs () const |
| Returns the total number of definitions. | |
| bool | hasImplicitDef () const |
| Returns true if the instruction has implicit definition. | |
| unsigned | getNumImplicitOperands () const |
| Returns the implicit operands number. | |
| bool | isOperandSubregIdx (unsigned OpIdx) const |
Return true if operand OpIdx is a subregister index. | |
| LLVM_ABI unsigned | getNumExplicitOperands () const |
| Returns the number of non-implicit operands. | |
| LLVM_ABI unsigned | getNumExplicitDefs () const |
| Returns the number of non-implicit definitions. | |
| mop_iterator | operands_begin () |
| mop_iterator | operands_end () |
| const_mop_iterator | operands_begin () const |
| const_mop_iterator | operands_end () const |
| mop_range | operands () |
| const_mop_range | operands () const |
| mop_range | explicit_operands () |
| const_mop_range | explicit_operands () const |
| mop_range | implicit_operands () |
| const_mop_range | implicit_operands () const |
| mop_range | debug_operands () |
| Returns all operands that are used to determine the variable location for this DBG_VALUE instruction. | |
| const_mop_range | debug_operands () const |
| Returns all operands that are used to determine the variable location for this DBG_VALUE instruction. | |
| mop_range | defs () |
| Returns all explicit operands that are register definitions. | |
| const_mop_range | defs () const |
| Returns all explicit operands that are register definitions. | |
| mop_range | uses () |
| Returns all operands which may be register uses. | |
| const_mop_range | uses () const |
| Returns all operands which may be register uses. | |
| mop_range | explicit_uses () |
| const_mop_range | explicit_uses () const |
| filtered_mop_range | all_defs () |
| Returns an iterator range over all operands that are (explicit or implicit) register defs. | |
| filtered_const_mop_range | all_defs () const |
| Returns an iterator range over all operands that are (explicit or implicit) register defs. | |
| filtered_mop_range | all_uses () |
| Returns an iterator range over all operands that are (explicit or implicit) register uses. | |
| filtered_const_mop_range | all_uses () const |
| Returns an iterator range over all operands that are (explicit or implicit) register uses. | |
| unsigned | getOperandNo (const_mop_iterator I) const |
Returns the number of the operand iterator I points to. | |
| ArrayRef< MachineMemOperand * > | memoperands () const |
| Access to memory operands of the instruction. | |
| mmo_iterator | memoperands_begin () const |
| Access to memory operands of the instruction. | |
| mmo_iterator | memoperands_end () const |
| Access to memory operands of the instruction. | |
| bool | memoperands_empty () const |
| Return true if we don't have any memory operands which described the memory access done by this instruction. | |
| bool | hasOneMemOperand () const |
| Return true if this instruction has exactly one MachineMemOperand. | |
| unsigned | getNumMemOperands () const |
| Return the number of memory operands. | |
| MCSymbol * | getPreInstrSymbol () const |
| Helper to extract a pre-instruction symbol if one has been added. | |
| MCSymbol * | getPostInstrSymbol () const |
| Helper to extract a post-instruction symbol if one has been added. | |
| MDNode * | getHeapAllocMarker () const |
| Helper to extract a heap alloc marker if one has been added. | |
| MDNode * | getPCSections () const |
| Helper to extract PCSections metadata target sections. | |
| MDNode * | getMMRAMetadata () const |
| Helper to extract mmra.op metadata. | |
| uint32_t | getCFIType () const |
| Helper to extract a CFI type hash if one has been added. | |
| bool | hasProperty (unsigned MCFlag, QueryType Type=AnyInBundle) const |
| Return true if the instruction (or in the case of a bundle, the instructions inside the bundle) has the specified property. | |
| bool | isPreISelOpcode (QueryType Type=IgnoreBundle) const |
| Return true if this is an instruction that should go through the usual legalization steps. | |
| bool | isVariadic (QueryType Type=IgnoreBundle) const |
| Return true if this instruction can have a variable number of operands. | |
| bool | hasOptionalDef (QueryType Type=IgnoreBundle) const |
| Set if this instruction has an optional definition, e.g. | |
| bool | isPseudo (QueryType Type=IgnoreBundle) const |
| Return true if this is a pseudo instruction that doesn't correspond to a real machine instruction. | |
| bool | isMetaInstruction (QueryType Type=IgnoreBundle) const |
| Return true if this instruction doesn't produce any output in the form of executable instructions. | |
| bool | isReturn (QueryType Type=AnyInBundle) const |
| bool | isEHScopeReturn (QueryType Type=AnyInBundle) const |
| Return true if this is an instruction that marks the end of an EH scope, i.e., a catchpad or a cleanuppad instruction. | |
| bool | isCall (QueryType Type=AnyInBundle) const |
| LLVM_ABI bool | isCandidateForAdditionalCallInfo (QueryType Type=IgnoreBundle) const |
| Return true if this is a call instruction that may have an additional information associated with it. | |
| LLVM_ABI bool | shouldUpdateAdditionalCallInfo () const |
| Return true if copying, moving, or erasing this instruction requires updating additional call info (see copyCallInfo, moveCallInfo, eraseCallInfo). | |
| bool | isBarrier (QueryType Type=AnyInBundle) const |
| Returns true if the specified instruction stops control flow from executing the instruction immediately following it. | |
| bool | isTerminator (QueryType Type=AnyInBundle) const |
| Returns true if this instruction part of the terminator for a basic block. | |
| bool | isBranch (QueryType Type=AnyInBundle) const |
| Returns true if this is a conditional, unconditional, or indirect branch. | |
| bool | isIndirectBranch (QueryType Type=AnyInBundle) const |
| Return true if this is an indirect branch, such as a branch through a register. | |
| bool | isConditionalBranch (QueryType Type=AnyInBundle) const |
| Return true if this is a branch which may fall through to the next instruction or may transfer control flow to some other block. | |
| bool | isUnconditionalBranch (QueryType Type=AnyInBundle) const |
| Return true if this is a branch which always transfers control flow to some other block. | |
| bool | isPredicable (QueryType Type=AllInBundle) const |
| Return true if this instruction has a predicate operand that controls execution. | |
| bool | isCompare (QueryType Type=IgnoreBundle) const |
| Return true if this instruction is a comparison. | |
| bool | isMoveImmediate (QueryType Type=IgnoreBundle) const |
| Return true if this instruction is a move immediate (including conditional moves) instruction. | |
| bool | isMoveReg (QueryType Type=IgnoreBundle) const |
| Return true if this instruction is a register move. | |
| bool | isBitcast (QueryType Type=IgnoreBundle) const |
| Return true if this instruction is a bitcast instruction. | |
| bool | isSelect (QueryType Type=IgnoreBundle) const |
| Return true if this instruction is a select instruction. | |
| bool | isNotDuplicable (QueryType Type=AnyInBundle) const |
| Return true if this instruction cannot be safely duplicated. | |
| bool | isConvergent (QueryType Type=AnyInBundle) const |
| Return true if this instruction is convergent. | |
| bool | hasDelaySlot (QueryType Type=AnyInBundle) const |
| Returns true if the specified instruction has a delay slot which must be filled by the code generator. | |
| bool | canFoldAsLoad (QueryType Type=IgnoreBundle) const |
| Return true for instructions that can be folded as memory operands in other instructions. | |
| bool | isRegSequenceLike (QueryType Type=IgnoreBundle) const |
| Return true if this instruction behaves the same way as the generic REG_SEQUENCE instructions. | |
| bool | isExtractSubregLike (QueryType Type=IgnoreBundle) const |
| Return true if this instruction behaves the same way as the generic EXTRACT_SUBREG instructions. | |
| bool | isInsertSubregLike (QueryType Type=IgnoreBundle) const |
| Return true if this instruction behaves the same way as the generic INSERT_SUBREG instructions. | |
| bool | mayLoad (QueryType Type=AnyInBundle) const |
| Return true if this instruction could possibly read memory. | |
| bool | mayStore (QueryType Type=AnyInBundle) const |
| Return true if this instruction could possibly modify memory. | |
| bool | mayLoadOrStore (QueryType Type=AnyInBundle) const |
| Return true if this instruction could possibly read or modify memory. | |
| bool | mayRaiseFPException () const |
| Return true if this instruction could possibly raise a floating-point exception. | |
| bool | isCommutable (QueryType Type=IgnoreBundle) const |
| Return true if this may be a 2- or 3-address instruction (of the form "X = op Y, Z, ..."), which produces the same result if Y and Z are exchanged. | |
| bool | isConvertibleTo3Addr (QueryType Type=IgnoreBundle) const |
| Return true if this is a 2-address instruction which can be changed into a 3-address instruction if needed. | |
| bool | usesCustomInsertionHook (QueryType Type=IgnoreBundle) const |
| Return true if this instruction requires custom insertion support when the DAG scheduler is inserting it into a machine basic block. | |
| bool | hasPostISelHook (QueryType Type=IgnoreBundle) const |
| Return true if this instruction requires adjustment after instruction selection by calling a target hook. | |
| bool | isRematerializable (QueryType Type=AllInBundle) const |
| Returns true if this instruction is a candidate for remat. | |
| bool | isAsCheapAsAMove (QueryType Type=AllInBundle) const |
| Returns true if this instruction has the same cost (or less) than a move instruction. | |
| bool | hasExtraSrcRegAllocReq (QueryType Type=AnyInBundle) const |
| Returns true if this instruction source operands have special register allocation requirements that are not captured by the operand register classes. | |
| bool | hasExtraDefRegAllocReq (QueryType Type=AnyInBundle) const |
| Returns true if this instruction def operands have special register allocation requirements that are not captured by the operand register classes. | |
| LLVM_ABI bool | isIdenticalTo (const MachineInstr &Other, MICheckType Check=CheckDefs) const |
Return true if this instruction is identical to Other. | |
| LLVM_ABI bool | isEquivalentDbgInstr (const MachineInstr &Other) const |
Returns true if this instruction is a debug instruction that represents an identical debug value to Other. | |
| LLVM_ABI MachineInstr * | removeFromParent () |
| Unlink 'this' from the containing basic block, and return it without deleting it. | |
| LLVM_ABI MachineInstr * | removeFromBundle () |
| Unlink this instruction from its basic block and return it without deleting it. | |
| LLVM_ABI void | eraseFromParent () |
| Unlink 'this' from the containing basic block and delete it. | |
| LLVM_ABI void | eraseFromBundle () |
| Unlink 'this' from its basic block and delete it. | |
| bool | isEHLabel () const |
| bool | isGCLabel () const |
| bool | isAnnotationLabel () const |
| bool | isLifetimeMarker () const |
| bool | isLabel () const |
| Returns true if the MachineInstr represents a label. | |
| bool | isCFIInstruction () const |
| bool | isPseudoProbe () const |
| bool | isPosition () const |
| bool | isNonListDebugValue () const |
| bool | isDebugValueList () const |
| bool | isDebugValue () const |
| bool | isDebugLabel () const |
| bool | isDebugRef () const |
| bool | isDebugValueLike () const |
| bool | isDebugPHI () const |
| bool | isDebugInstr () const |
| bool | isDebugOrPseudoInstr () const |
| bool | isDebugOffsetImm () const |
| bool | isIndirectDebugValue () const |
| A DBG_VALUE is indirect iff the location operand is a register and the offset operand is an immediate. | |
| LLVM_ABI bool | isDebugEntryValue () const |
| A DBG_VALUE is an entry value iff its debug expression contains the DW_OP_LLVM_entry_value operation. | |
| bool | isUndefDebugValue () const |
| Return true if the instruction is a debug value which describes a part of a variable as unavailable. | |
| bool | isJumpTableDebugInfo () const |
| bool | isPHI () const |
| bool | isKill () const |
| bool | isImplicitDef () const |
| bool | isInlineAsm () const |
| LLVM_ABI bool | mayFoldInlineAsmRegOp (unsigned OpId) const |
| Returns true if the register operand can be folded with a load or store into a frame index. | |
| LLVM_ABI bool | isStackAligningInlineAsm () const |
| LLVM_ABI InlineAsm::AsmDialect | getInlineAsmDialect () const |
| bool | isInsertSubreg () const |
| bool | isSubregToReg () const |
| bool | isRegSequence () const |
| bool | isBundle () const |
| bool | isCopy () const |
| bool | isFullCopy () const |
| bool | isExtractSubreg () const |
| bool | isFakeUse () const |
| bool | isCopyLike () const |
| Return true if the instruction behaves like a copy. | |
| bool | isIdentityCopy () const |
| Return true is the instruction is an identity copy. | |
| bool | isTransient () const |
| Return true if this is a transient instruction that is either very likely to be eliminated during register allocation (such as copy-like instructions), or if this instruction doesn't have an execution-time cost. | |
| LLVM_ABI unsigned | getBundleSize () const |
| Return the number of instructions inside the MI bundle, excluding the bundle header. | |
| bool | readsRegister (Register Reg, const TargetRegisterInfo *TRI) const |
| Return true if the MachineInstr reads the specified register. | |
| bool | readsVirtualRegister (Register Reg) const |
| Return true if the MachineInstr reads the specified virtual register. | |
| LLVM_ABI std::pair< bool, bool > | readsWritesVirtualRegister (Register Reg, SmallVectorImpl< unsigned > *Ops=nullptr) const |
| Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg. | |
| bool | killsRegister (Register Reg, const TargetRegisterInfo *TRI) const |
| Return true if the MachineInstr kills the specified register. | |
| bool | definesRegister (Register Reg, const TargetRegisterInfo *TRI) const |
| Return true if the MachineInstr fully defines the specified register. | |
| bool | modifiesRegister (Register Reg, const TargetRegisterInfo *TRI) const |
| Return true if the MachineInstr modifies (fully define or partially define) the specified register. | |
| bool | registerDefIsDead (Register Reg, const TargetRegisterInfo *TRI) const |
| Returns true if the register is dead in this machine instruction. | |
| LLVM_ABI bool | hasRegisterImplicitUseOperand (Register Reg) const |
| Returns true if the MachineInstr has an implicit-use operand of exactly the given register (not considering sub/super-registers). | |
| LLVM_ABI int | findRegisterUseOperandIdx (Register Reg, const TargetRegisterInfo *TRI, bool isKill=false) const |
| Returns the operand index that is a use of the specific register or -1 if it is not found. | |
| MachineOperand * | findRegisterUseOperand (Register Reg, const TargetRegisterInfo *TRI, bool isKill=false) |
| Wrapper for findRegisterUseOperandIdx, it returns a pointer to the MachineOperand rather than an index. | |
| const MachineOperand * | findRegisterUseOperand (Register Reg, const TargetRegisterInfo *TRI, bool isKill=false) const |
| LLVM_ABI int | findRegisterDefOperandIdx (Register Reg, const TargetRegisterInfo *TRI, bool isDead=false, bool Overlap=false) const |
| Returns the operand index that is a def of the specified register or -1 if it is not found. | |
| MachineOperand * | findRegisterDefOperand (Register Reg, const TargetRegisterInfo *TRI, bool isDead=false, bool Overlap=false) |
| Wrapper for findRegisterDefOperandIdx, it returns a pointer to the MachineOperand rather than an index. | |
| const MachineOperand * | findRegisterDefOperand (Register Reg, const TargetRegisterInfo *TRI, bool isDead=false, bool Overlap=false) const |
| LLVM_ABI int | findFirstPredOperandIdx () const |
| Find the index of the first operand in the operand list that is used to represent the predicate. | |
| LLVM_ABI int | findInlineAsmFlagIdx (unsigned OpIdx, unsigned *GroupNo=nullptr) const |
| Find the index of the flag word operand that corresponds to operand OpIdx on an inline asm instruction. | |
| LLVM_ABI const TargetRegisterClass * | getRegClassConstraint (unsigned OpIdx, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const |
| Compute the static register class constraint for operand OpIdx. | |
| LLVM_ABI const TargetRegisterClass * | getRegClassConstraintEffectForVReg (Register Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, bool ExploreBundle=false) const |
Applies the constraints (def/use) implied by this MI on Reg to the given CurRC. | |
| LLVM_ABI const TargetRegisterClass * | getRegClassConstraintEffect (unsigned OpIdx, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const |
Applies the constraints (def/use) implied by the OpIdx operand to the given CurRC. | |
| LLVM_ABI void | tieOperands (unsigned DefIdx, unsigned UseIdx) |
| Add a tie between the register operands at DefIdx and UseIdx. | |
| LLVM_ABI unsigned | findTiedOperandIdx (unsigned OpIdx) const |
| Given the index of a tied register operand, find the operand it is tied to. | |
| bool | isRegTiedToUseOperand (unsigned DefOpIdx, unsigned *UseOpIdx=nullptr) const |
| Given the index of a register def operand, check if the register def is tied to a source operand, due to either two-address elimination or inline assembly constraints. | |
| bool | isRegTiedToDefOperand (unsigned UseOpIdx, unsigned *DefOpIdx=nullptr) const |
| Return true if the use operand of the specified index is tied to a def operand. | |
| LLVM_ABI void | clearKillInfo () |
| Clears kill flags on all operands. | |
| LLVM_ABI void | substituteRegister (Register FromReg, Register ToReg, unsigned SubIdx, const TargetRegisterInfo &RegInfo) |
| Replace all occurrences of FromReg with ToReg:SubIdx, properly composing subreg indices where necessary. | |
| LLVM_ABI bool | addRegisterKilled (Register IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false) |
| We have determined MI kills a register. | |
| LLVM_ABI void | clearRegisterKills (Register Reg, const TargetRegisterInfo *RegInfo) |
| Clear all kill flags affecting Reg. | |
| LLVM_ABI bool | addRegisterDead (Register Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false) |
| We have determined MI defined a register without a use. | |
| LLVM_ABI void | clearRegisterDeads (Register Reg) |
Clear all dead flags on operands defining register Reg. | |
| LLVM_ABI void | setRegisterDefReadUndef (Register Reg, bool IsUndef=true) |
Mark all subregister defs of register Reg with the undef flag. | |
| LLVM_ABI void | addRegisterDefined (Register Reg, const TargetRegisterInfo *RegInfo=nullptr) |
| We have determined MI defines a register. | |
| LLVM_ABI void | setPhysRegsDeadExcept (ArrayRef< Register > UsedRegs, const TargetRegisterInfo &TRI) |
| Mark every physreg used by this instruction as dead except those in the UsedRegs list. | |
| LLVM_ABI bool | isSafeToMove (bool &SawStore) const |
| Return true if it is safe to move this instruction. | |
| LLVM_ABI bool | wouldBeTriviallyDead () const |
| Return true if this instruction would be trivially dead if all of its defined registers were dead. | |
| LLVM_ABI bool | isDead (const MachineRegisterInfo &MRI, LiveRegUnits *LivePhysRegs=nullptr) const |
| Check whether an MI is dead. | |
| LLVM_ABI bool | mayAlias (BatchAAResults *AA, const MachineInstr &Other, bool UseTBAA) const |
| Returns true if this instruction's memory access aliases the memory access of Other. | |
| LLVM_ABI bool | mayAlias (AAResults *AA, const MachineInstr &Other, bool UseTBAA) const |
| LLVM_ABI bool | hasOrderedMemoryRef () const |
| Return true if this instruction may have an ordered or volatile memory reference, or if the information describing the memory reference is not available. | |
| LLVM_ABI bool | isDereferenceableInvariantLoad () const |
| Return true if this load instruction never traps and points to a memory location whose value doesn't change during the execution of this function. | |
| LLVM_ABI Register | isConstantValuePHI () const |
| If the specified instruction is a PHI that always merges together the same virtual register, return the register, otherwise return Register(). | |
| LLVM_ABI bool | hasUnmodeledSideEffects () const |
| Return true if this instruction has side effects that are not modeled by mayLoad / mayStore, etc. | |
| LLVM_ABI bool | isLoadFoldBarrier () const |
| Returns true if it is illegal to fold a load across this instruction. | |
| LLVM_ABI bool | allDefsAreDead () const |
| Return true if all the defs of this instruction are dead. | |
| LLVM_ABI bool | allImplicitDefsAreDead () const |
| Return true if all the implicit defs of this instruction are dead. | |
| LLVM_ABI std::optional< LocationSize > | getSpillSize (const TargetInstrInfo *TII) const |
| Return a valid size if the instruction is a spill instruction. | |
| LLVM_ABI std::optional< LocationSize > | getFoldedSpillSize (const TargetInstrInfo *TII) const |
| Return a valid size if the instruction is a folded spill instruction. | |
| LLVM_ABI std::optional< LocationSize > | getRestoreSize (const TargetInstrInfo *TII) const |
| Return a valid size if the instruction is a restore instruction. | |
| LLVM_ABI std::optional< LocationSize > | getFoldedRestoreSize (const TargetInstrInfo *TII) const |
| Return a valid size if the instruction is a folded restore instruction. | |
| LLVM_ABI void | copyImplicitOps (MachineFunction &MF, const MachineInstr &MI) |
| Copy implicit register operands from specified instruction to this instruction. | |
| LLVM_ABI void | addOperand (MachineFunction &MF, const MachineOperand &Op) |
| Add the specified operand to the instruction. | |
| LLVM_ABI void | addOperand (const MachineOperand &Op) |
| Add an operand without providing an MF reference. | |
| LLVM_ABI void | insert (mop_iterator InsertBefore, ArrayRef< MachineOperand > Ops) |
| Inserts Ops BEFORE It. Can untie/retie tied operands. | |
| LLVM_ABI void | setDesc (const MCInstrDesc &TID) |
| Replace the instruction descriptor (thus opcode) of the current instruction with a new one. | |
| void | setDebugLoc (DebugLoc DL) |
| Replace current source information with new such. | |
| LLVM_ABI void | removeOperand (unsigned OpNo) |
| Erase an operand from an instruction, leaving it with one fewer operand than it started with. | |
| LLVM_ABI void | dropMemRefs (MachineFunction &MF) |
| Clear this MachineInstr's memory reference descriptor list. | |
| LLVM_ABI void | setMemRefs (MachineFunction &MF, ArrayRef< MachineMemOperand * > MemRefs) |
| Assign this MachineInstr's memory reference descriptor list. | |
| LLVM_ABI void | addMemOperand (MachineFunction &MF, MachineMemOperand *MO) |
| Add a MachineMemOperand to the machine instruction. | |
| LLVM_ABI void | cloneMemRefs (MachineFunction &MF, const MachineInstr &MI) |
| Clone another MachineInstr's memory reference descriptor list and replace ours with it. | |
| LLVM_ABI void | cloneMergedMemRefs (MachineFunction &MF, ArrayRef< const MachineInstr * > MIs) |
| Clone the merge of multiple MachineInstrs' memory reference descriptors list and replace ours with it. | |
| LLVM_ABI void | setPreInstrSymbol (MachineFunction &MF, MCSymbol *Symbol) |
| Set a symbol that will be emitted just prior to the instruction itself. | |
| LLVM_ABI void | setPostInstrSymbol (MachineFunction &MF, MCSymbol *Symbol) |
| Set a symbol that will be emitted just after the instruction itself. | |
| LLVM_ABI void | cloneInstrSymbols (MachineFunction &MF, const MachineInstr &MI) |
| Clone another MachineInstr's pre- and post- instruction symbols and replace ours with it. | |
| LLVM_ABI void | setHeapAllocMarker (MachineFunction &MF, MDNode *MD) |
| Set a marker on instructions that denotes where we should create and emit heap alloc site labels. | |
| LLVM_ABI void | setPCSections (MachineFunction &MF, MDNode *MD) |
| LLVM_ABI void | setMMRAMetadata (MachineFunction &MF, MDNode *MMRAs) |
| LLVM_ABI void | setCFIType (MachineFunction &MF, uint32_t Type) |
| Set the CFI type for the instruction. | |
| LLVM_ABI uint32_t | mergeFlagsWith (const MachineInstr &Other) const |
| Return the MIFlags which represent both MachineInstrs. | |
| LLVM_ABI void | copyIRFlags (const Instruction &I) |
| Copy all flags to MachineInst MIFlags. | |
| void | untieRegOperand (unsigned OpIdx) |
| Break any tie involving OpIdx. | |
| LLVM_ABI void | addImplicitDefUseOperands (MachineFunction &MF) |
| Add all implicit def and use operands to this instruction. | |
| LLVM_ABI void | collectDebugValues (SmallVectorImpl< MachineInstr * > &DbgValues) |
| Scan instructions immediately following MI and collect any matching DBG_VALUEs. | |
| LLVM_ABI void | changeDebugValuesDefReg (Register Reg) |
Find all DBG_VALUEs that point to the register def in this instruction and point them to Reg instead. | |
| LLVM_ABI unsigned | removePHIIncomingValueFor (const MachineBasicBlock &MBB) |
| Remove all incoming values of Phi instruction for the given block. | |
| void | setDebugValueUndef () |
| Sets all register debug operands in this debug value instruction to be undef. | |
| std::tuple< Register, Register > | getFirst2Regs () const |
| std::tuple< Register, Register, Register > | getFirst3Regs () const |
| std::tuple< Register, Register, Register, Register > | getFirst4Regs () const |
| std::tuple< Register, Register, Register, Register, Register > | getFirst5Regs () const |
| LLVM_ABI std::tuple< LLT, LLT > | getFirst2LLTs () const |
| LLVM_ABI std::tuple< LLT, LLT, LLT > | getFirst3LLTs () const |
| LLVM_ABI std::tuple< LLT, LLT, LLT, LLT > | getFirst4LLTs () const |
| LLVM_ABI std::tuple< LLT, LLT, LLT, LLT, LLT > | getFirst5LLTs () const |
| LLVM_ABI std::tuple< Register, LLT, Register, LLT > | getFirst2RegLLTs () const |
| LLVM_ABI std::tuple< Register, LLT, Register, LLT, Register, LLT > | getFirst3RegLLTs () const |
| LLVM_ABI std::tuple< Register, LLT, Register, LLT, Register, LLT, Register, LLT > | getFirst4RegLLTs () const |
| LLVM_ABI std::tuple< Register, LLT, Register, LLT, Register, LLT, Register, LLT, Register, LLT > | getFirst5RegLLTs () const |
| LLVM_ABI LLT | getTypeToPrint (unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const |
| Debugging supportDetermine the generic type to be printed (if needed) on uses and defs. | |
| LLVM_ABI bool | hasComplexRegisterTies () const |
| Return true when an instruction has tied register that can't be determined by the instruction's descriptor. | |
| LLVM_ABI void | print (raw_ostream &OS, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const |
Print this MI to OS. | |
| LLVM_ABI void | print (raw_ostream &OS, ModuleSlotTracker &MST, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const |
| LLVM_ABI void | dump () const |
| LLVM_ABI void | dumpr (const MachineRegisterInfo &MRI, unsigned MaxDepth=UINT_MAX) const |
Print on dbgs() the current instruction and the instructions defining its operands and so on until we reach MaxDepth. | |
| Public Member Functions inherited from llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > > | |
| MachineInstr * | getPrevNode () |
| MachineInstr * | getNextNode () |
Get the next node, or nullptr for the list tail. | |
| Public Member Functions inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type > | |
| self_iterator | getIterator () |
| reverse_self_iterator | getReverseIterator () |
| std::enable_if_t< T::is_sentinel_tracking_explicit, bool > | isSentinel () const |
| Check whether this is the sentinel node. | |
| Public Member Functions inherited from llvm::ilist_detail::node_parent_access< ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type >, ilist_detail::compute_node_options< MachineInstr, Options... >::type::parent_ty > | |
| const ilist_detail::compute_node_options< MachineInstr, Options... >::type::parent_ty * | getParent () const |
| void | setParent (ilist_detail::compute_node_options< MachineInstr, Options... >::type::parent_ty *Parent) |
Static Public Member Functions | |
| static bool | classof (const MachineInstr *MI) |
| Static Public Member Functions inherited from llvm::GenericMachineInstr | |
| static bool | classof (const MachineInstr *MI) |
| Static Public Member Functions inherited from llvm::MachineInstr | |
| static LLVM_ABI uint32_t | copyFlagsFromInstruction (const Instruction &I) |
Detailed Description
Provides common memory operand functionality.
Definition at line 53 of file GenericMachineInstrs.h.
Member Function Documentation
◆ classof()
|
inlinestatic |
Definition at line 77 of file GenericMachineInstrs.h.
References llvm::GenericMachineInstr::classof(), and MI.
◆ getAlign()
|
inline |
Return the minimum known alignment in bytes of the actual memory reference.
Definition at line 71 of file GenericMachineInstrs.h.
References llvm::MachineMemOperand::getAlign(), and getMMO().
Referenced by llvm::LegalizerHelper::lowerLoad().
◆ getMemSize()
|
inline |
Returns the size in bytes of the memory access.
Definition at line 73 of file GenericMachineInstrs.h.
References getMMO(), and llvm::MachineMemOperand::getSize().
Referenced by llvm::LegalizerHelper::reduceLoadStoreWidth().
◆ getMemSizeInBits()
|
inline |
Returns the size in bits of the memory access.
Definition at line 75 of file GenericMachineInstrs.h.
References getMMO(), and llvm::MachineMemOperand::getSizeInBits().
Referenced by llvm::CombinerHelper::matchCombineLoadWithAndMask(), and llvm::CombinerHelper::matchEqualDefs().
◆ getMMO()
|
inline |
Get the MachineMemOperand on this instruction.
Definition at line 56 of file GenericMachineInstrs.h.
References llvm::MachineInstr::memoperands_begin().
Referenced by llvm::CombinerHelper::applySextInRegOfLoad(), getAlign(), getMemSize(), getMemSizeInBits(), llvm::GAnyLoad::getRanges(), isAtomic(), isUnordered(), isVolatile(), llvm::LegalizerHelper::lowerLoad(), llvm::CombinerHelper::matchCombineExtendingLoads(), llvm::CombinerHelper::matchCombineLoadWithAndMask(), llvm::CombinerHelper::matchLoadOrCombine(), and llvm::LegalizerHelper::reduceLoadStoreWidth().
◆ isAtomic()
|
inline |
Returns true if the attached MachineMemOperand has the atomic flag set.
Definition at line 59 of file GenericMachineInstrs.h.
References getMMO(), and llvm::MachineMemOperand::isAtomic().
Referenced by isSimple(), llvm::CombinerHelper::matchCombineIndexedLoadStore(), and llvm::LegalizerHelper::reduceLoadStoreWidth().
◆ isSimple()
|
inline |
Returns true if the memory operation is neither atomic or volatile.
Definition at line 63 of file GenericMachineInstrs.h.
References isAtomic(), and isVolatile().
Referenced by llvm::CombinerHelper::matchCombineLoadWithAndMask().
◆ isUnordered()
|
inline |
Returns true if this memory operation doesn't have any ordering constraints other than normal aliasing.
Volatile and (ordered) atomic memory operations can't be reordered.
Definition at line 67 of file GenericMachineInstrs.h.
References getMMO(), and llvm::MachineMemOperand::isUnordered().
◆ isVolatile()
|
inline |
Returns true if the attached MachineMemOpeand as the volatile flag set.
Definition at line 61 of file GenericMachineInstrs.h.
References getMMO(), and llvm::MachineMemOperand::isVolatile().
Referenced by isSimple().
The documentation for this class was generated from the following file:
- include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
Generated on for LLVM by
1.14.0