LLVM  9.0.0svn
ARCFrameLowering.cpp
Go to the documentation of this file.
1 //===- ARCFrameLowering.cpp - ARC Frame Information -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the ARC implementation of the TargetFrameLowering class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "ARCFrameLowering.h"
14 #include "ARCMachineFunctionInfo.h"
15 #include "ARCSubtarget.h"
20 #include "llvm/IR/Function.h"
21 #include "llvm/Support/Debug.h"
22 
23 #define DEBUG_TYPE "arc-frame-lowering"
24 
25 using namespace llvm;
26 
27 static cl::opt<bool>
28  UseSaveRestoreFunclet("arc-save-restore-funclet", cl::Hidden,
29  cl::desc("Use arc callee save/restore functions"),
30  cl::init(true));
31 
32 static const char *store_funclet_name[] = {
33  "__st_r13_to_r15", "__st_r13_to_r16", "__st_r13_to_r17", "__st_r13_to_r18",
34  "__st_r13_to_r19", "__st_r13_to_r20", "__st_r13_to_r21", "__st_r13_to_r22",
35  "__st_r13_to_r23", "__st_r13_to_r24", "__st_r13_to_r25",
36 };
37 
38 static const char *load_funclet_name[] = {
39  "__ld_r13_to_r15", "__ld_r13_to_r16", "__ld_r13_to_r17", "__ld_r13_to_r18",
40  "__ld_r13_to_r19", "__ld_r13_to_r20", "__ld_r13_to_r21", "__ld_r13_to_r22",
41  "__ld_r13_to_r23", "__ld_r13_to_r24", "__ld_r13_to_r25",
42 };
43 
46  const ARCInstrInfo &TII, DebugLoc dl,
47  int Amount, int StackPtr) {
48  unsigned AdjOp;
49  if (!Amount)
50  return;
51  bool Positive;
52  unsigned AbsAmount;
53  if (Amount < 0) {
54  AbsAmount = -Amount;
55  Positive = false;
56  } else {
57  AbsAmount = Amount;
58  Positive = true;
59  }
60 
61  LLVM_DEBUG(dbgs() << "Internal: adjust stack by: " << Amount << ","
62  << AbsAmount << "\n");
63 
64  assert((AbsAmount % 4 == 0) && "Stack adjustments must be 4-byte aligned.");
65  if (isUInt<6>(AbsAmount))
66  AdjOp = Positive ? ARC::ADD_rru6 : ARC::SUB_rru6;
67  else
68  AdjOp = Positive ? ARC::ADD_rrlimm : ARC::SUB_rrlimm;
69 
70  BuildMI(MBB, MBBI, dl, TII.get(AdjOp), StackPtr)
71  .addReg(StackPtr)
72  .addImm(AbsAmount);
73 }
74 
75 static unsigned
76 determineLastCalleeSave(const std::vector<CalleeSavedInfo> &CSI) {
77  unsigned Last = 0;
78  for (auto Reg : CSI) {
79  assert(Reg.getReg() >= ARC::R13 && Reg.getReg() <= ARC::R25 &&
80  "Unexpected callee saved reg.");
81  if (Reg.getReg() > Last)
82  Last = Reg.getReg();
83  }
84  return Last;
85 }
86 
88  BitVector &SavedRegs,
89  RegScavenger *RS) const {
90  LLVM_DEBUG(dbgs() << "Determine Callee Saves: " << MF.getName() << "\n");
92  SavedRegs.set(ARC::BLINK);
93 }
94 
95 void ARCFrameLowering::adjustStackToMatchRecords(
97  bool Allocate) const {
98  MachineFunction &MF = *MBB.getParent();
99  int ScalarAlloc = MF.getFrameInfo().getStackSize();
100 
101  if (Allocate) {
102  // Allocate by adjusting by the negative of what the record holder tracked
103  // it tracked a positive offset in a downward growing stack.
104  ScalarAlloc = -ScalarAlloc;
105  }
106 
107  generateStackAdjustment(MBB, MBBI, *ST.getInstrInfo(), DebugLoc(),
108  ScalarAlloc, ARC::SP);
109 }
110 
111 /// Insert prolog code into the function.
112 /// For ARC, this inserts a call to a function that puts required callee saved
113 /// registers onto the stack, when enough callee saved registers are required.
115  MachineBasicBlock &MBB) const {
116  LLVM_DEBUG(dbgs() << "Emit Prologue: " << MF.getName() << "\n");
117  auto *AFI = MF.getInfo<ARCFunctionInfo>();
118  MachineModuleInfo &MMI = MF.getMMI();
119  MCContext &Context = MMI.getContext();
120  const MCRegisterInfo *MRI = Context.getRegisterInfo();
121  const ARCInstrInfo *TII = MF.getSubtarget<ARCSubtarget>().getInstrInfo();
122  MachineBasicBlock::iterator MBBI = MBB.begin();
123  // Debug location must be unknown since the first debug location is used
124  // to determine the end of the prologue.
125  DebugLoc dl;
126  MachineFrameInfo &MFI = MF.getFrameInfo();
127  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
128  unsigned Last = determineLastCalleeSave(CSI);
129  unsigned StackSlotsUsedByFunclet = 0;
130  bool SavedBlink = false;
131  unsigned AlreadyAdjusted = 0;
132  if (MF.getFunction().isVarArg()) {
133  // Add in the varargs area here first.
134  LLVM_DEBUG(dbgs() << "Varargs\n");
135  unsigned VarArgsBytes = MFI.getObjectSize(AFI->getVarArgsFrameIndex());
136  BuildMI(MBB, MBBI, dl, TII->get(ARC::SUB_rru6))
137  .addReg(ARC::SP)
138  .addReg(ARC::SP)
139  .addImm(VarArgsBytes);
140  }
141  if (hasFP(MF)) {
142  LLVM_DEBUG(dbgs() << "Saving FP\n");
143  BuildMI(MBB, MBBI, dl, TII->get(ARC::ST_AW_rs9))
144  .addReg(ARC::SP, RegState::Define)
145  .addReg(ARC::FP)
146  .addReg(ARC::SP)
147  .addImm(-4);
148  AlreadyAdjusted += 4;
149  }
150  if (UseSaveRestoreFunclet && Last > ARC::R14) {
151  LLVM_DEBUG(dbgs() << "Creating store funclet.\n");
152  // BL to __save_r13_to_<TRI->getRegAsmName()>
153  StackSlotsUsedByFunclet = Last - ARC::R12;
154  BuildMI(MBB, MBBI, dl, TII->get(ARC::PUSH_S_BLINK));
155  BuildMI(MBB, MBBI, dl, TII->get(ARC::SUB_rru6))
156  .addReg(ARC::SP)
157  .addReg(ARC::SP)
158  .addImm(4 * StackSlotsUsedByFunclet);
159  BuildMI(MBB, MBBI, dl, TII->get(ARC::BL))
160  .addExternalSymbol(store_funclet_name[Last - ARC::R15])
161  .addReg(ARC::BLINK, RegState::Implicit | RegState::Kill);
162  AlreadyAdjusted += 4 * (StackSlotsUsedByFunclet + 1);
163  SavedBlink = true;
164  }
165  // If we haven't saved BLINK, but we need to...do that now.
166  if (MFI.hasCalls() && !SavedBlink) {
167  LLVM_DEBUG(dbgs() << "Creating save blink.\n");
168  BuildMI(MBB, MBBI, dl, TII->get(ARC::PUSH_S_BLINK));
169  AlreadyAdjusted += 4;
170  }
171  if (AFI->MaxCallStackReq > 0)
172  MFI.setStackSize(MFI.getStackSize() + AFI->MaxCallStackReq);
173  // We have already saved some of the stack...
174  LLVM_DEBUG(dbgs() << "Adjusting stack by: "
175  << (MFI.getStackSize() - AlreadyAdjusted) << "\n");
176  generateStackAdjustment(MBB, MBBI, *ST.getInstrInfo(), dl,
177  -(MFI.getStackSize() - AlreadyAdjusted), ARC::SP);
178 
179  if (hasFP(MF)) {
180  LLVM_DEBUG(dbgs() << "Setting FP from SP.\n");
181  BuildMI(MBB, MBBI, dl,
182  TII->get(isUInt<6>(MFI.getStackSize()) ? ARC::ADD_rru6
183  : ARC::ADD_rrlimm),
184  ARC::FP)
185  .addReg(ARC::SP)
186  .addImm(MFI.getStackSize());
187  }
188 
189  // Emit CFI records:
190  // .cfi_def_cfa_offset StackSize
191  // .cfi_offset fp, -StackSize
192  // .cfi_offset blink, -StackSize+4
193  unsigned CFIIndex = MF.addFrameInst(
195  BuildMI(MBB, MBBI, dl, TII->get(TargetOpcode::CFI_INSTRUCTION))
196  .addCFIIndex(CFIIndex)
198 
199  int CurOffset = -4;
200  if (hasFP(MF)) {
202  nullptr, MRI->getDwarfRegNum(ARC::FP, true), CurOffset));
203  BuildMI(MBB, MBBI, dl, TII->get(TargetOpcode::CFI_INSTRUCTION))
204  .addCFIIndex(CFIIndex)
206  CurOffset -= 4;
207  }
208 
209  if (MFI.hasCalls()) {
211  nullptr, MRI->getDwarfRegNum(ARC::BLINK, true), CurOffset));
212  BuildMI(MBB, MBBI, dl, TII->get(TargetOpcode::CFI_INSTRUCTION))
213  .addCFIIndex(CFIIndex)
215  }
216  // CFI for the rest of the registers.
217  for (const auto &Entry : CSI) {
218  unsigned Reg = Entry.getReg();
219  int FI = Entry.getFrameIdx();
220  // Skip BLINK and FP.
221  if ((hasFP(MF) && Reg == ARC::FP) || (MFI.hasCalls() && Reg == ARC::BLINK))
222  continue;
224  nullptr, MRI->getDwarfRegNum(Reg, true), MFI.getObjectOffset(FI)));
225  BuildMI(MBB, MBBI, dl, TII->get(TargetOpcode::CFI_INSTRUCTION))
226  .addCFIIndex(CFIIndex)
228  }
229 }
230 
231 /// Insert epilog code into the function.
232 /// For ARC, this inserts a call to a function that restores callee saved
233 /// registers onto the stack, when enough callee saved registers are required.
235  MachineBasicBlock &MBB) const {
236  LLVM_DEBUG(dbgs() << "Emit Epilogue: " << MF.getName() << "\n");
237  auto *AFI = MF.getInfo<ARCFunctionInfo>();
238  const ARCInstrInfo *TII = MF.getSubtarget<ARCSubtarget>().getInstrInfo();
240  MachineFrameInfo &MFI = MF.getFrameInfo();
241  uint64_t StackSize = MF.getFrameInfo().getStackSize();
242  bool SavedBlink = false;
243  unsigned AmountAboveFunclet = 0;
244  // If we have variable sized frame objects, then we have to move
245  // the stack pointer to a known spot (fp - StackSize).
246  // Then, replace the frame pointer by (new) [sp,StackSize-4].
247  // Then, move the stack pointer the rest of the way (sp = sp + StackSize).
248  if (hasFP(MF)) {
249  BuildMI(MBB, MBBI, DebugLoc(), TII->get(ARC::SUB_rru6), ARC::SP)
250  .addReg(ARC::FP)
251  .addImm(StackSize);
252  AmountAboveFunclet += 4;
253  }
254 
255  // Now, move the stack pointer to the bottom of the save area for the funclet.
256  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
257  unsigned Last = determineLastCalleeSave(CSI);
258  unsigned StackSlotsUsedByFunclet = 0;
259  // Now, restore the callee save registers.
260  if (UseSaveRestoreFunclet && Last > ARC::R14) {
261  // BL to __ld_r13_to_<TRI->getRegAsmName()>
262  StackSlotsUsedByFunclet = Last - ARC::R12;
263  AmountAboveFunclet += 4 * (StackSlotsUsedByFunclet + 1);
264  SavedBlink = true;
265  }
266 
267  if (MFI.hasCalls() && !SavedBlink) {
268  AmountAboveFunclet += 4;
269  SavedBlink = true;
270  }
271 
272  // Move the stack pointer up to the point of the funclet.
273  if (StackSize - AmountAboveFunclet) {
274  BuildMI(MBB, MBBI, MBB.findDebugLoc(MBBI), TII->get(ARC::ADD_rru6))
275  .addReg(ARC::SP)
276  .addReg(ARC::SP)
277  .addImm(StackSize - AmountAboveFunclet);
278  }
279 
280  if (StackSlotsUsedByFunclet) {
281  BuildMI(MBB, MBBI, MBB.findDebugLoc(MBBI), TII->get(ARC::BL))
282  .addExternalSymbol(load_funclet_name[Last - ARC::R15])
283  .addReg(ARC::BLINK, RegState::Implicit | RegState::Kill);
284  BuildMI(MBB, MBBI, MBB.findDebugLoc(MBBI), TII->get(ARC::ADD_rru6))
285  .addReg(ARC::SP)
286  .addReg(ARC::SP)
287  .addImm(4 * (StackSlotsUsedByFunclet));
288  }
289  // Now, pop blink if necessary.
290  if (SavedBlink) {
291  BuildMI(MBB, MBBI, MBB.findDebugLoc(MBBI), TII->get(ARC::POP_S_BLINK));
292  }
293  // Now, pop fp if necessary.
294  if (hasFP(MF)) {
295  BuildMI(MBB, MBBI, MBB.findDebugLoc(MBBI), TII->get(ARC::LD_AB_rs9))
296  .addReg(ARC::SP, RegState::Define)
298  .addReg(ARC::SP)
299  .addImm(4);
300  }
301 
302  // Relieve the varargs area if necessary.
303  if (MF.getFunction().isVarArg()) {
304  // Add in the varargs area here first.
305  LLVM_DEBUG(dbgs() << "Varargs\n");
306  unsigned VarArgsBytes = MFI.getObjectSize(AFI->getVarArgsFrameIndex());
307  BuildMI(MBB, MBBI, MBB.findDebugLoc(MBBI), TII->get(ARC::ADD_rru6))
308  .addReg(ARC::SP)
309  .addReg(ARC::SP)
310  .addImm(VarArgsBytes);
311  }
312 }
313 
314 static std::vector<CalleeSavedInfo>::iterator
315 getSavedReg(std::vector<CalleeSavedInfo> &V, unsigned reg) {
316  for (auto I = V.begin(), E = V.end(); I != E; ++I) {
317  if (reg == I->getReg())
318  return I;
319  }
320  return V.end();
321 }
322 
325  std::vector<CalleeSavedInfo> &CSI) const {
326  // Use this opportunity to assign the spill slots for all of the potential
327  // callee save registers (blink, fp, r13->r25) that we care about the
328  // placement for. We can calculate all of that data here.
329  int CurOffset = -4;
330  unsigned Last = determineLastCalleeSave(CSI);
331  MachineFrameInfo &MFI = MF.getFrameInfo();
332  if (hasFP(MF)) {
333  // Create a fixed slot at for FP
334  int StackObj = MFI.CreateFixedSpillStackObject(4, CurOffset, true);
335  LLVM_DEBUG(dbgs() << "Creating fixed object (" << StackObj << ") for FP at "
336  << CurOffset << "\n");
337  (void)StackObj;
338  CurOffset -= 4;
339  }
340  if (MFI.hasCalls() || (UseSaveRestoreFunclet && Last > ARC::R14)) {
341  // Create a fixed slot for BLINK.
342  int StackObj = MFI.CreateFixedSpillStackObject(4, CurOffset, true);
343  LLVM_DEBUG(dbgs() << "Creating fixed object (" << StackObj
344  << ") for BLINK at " << CurOffset << "\n");
345  (void)StackObj;
346  CurOffset -= 4;
347  }
348 
349  // Create slots for last down to r13.
350  for (unsigned Which = Last; Which > ARC::R12; Which--) {
351  auto RegI = getSavedReg(CSI, Which);
352  if (RegI == CSI.end() || RegI->getFrameIdx() == 0) {
353  // Always create the stack slot. If for some reason the register isn't in
354  // the save list, then don't worry about it.
355  int FI = MFI.CreateFixedSpillStackObject(4, CurOffset, true);
356  if (RegI != CSI.end())
357  RegI->setFrameIdx(FI);
358  } else
359  MFI.setObjectOffset(RegI->getFrameIdx(), CurOffset);
360  CurOffset -= 4;
361  }
362  for (auto &I : CSI) {
363  if (I.getReg() > ARC::R12)
364  continue;
365  if (I.getFrameIdx() == 0) {
366  I.setFrameIdx(MFI.CreateFixedSpillStackObject(4, CurOffset, true));
367  LLVM_DEBUG(dbgs() << "Creating fixed object (" << I.getFrameIdx()
368  << ") for other register at " << CurOffset << "\n");
369  } else {
370  MFI.setObjectOffset(I.getFrameIdx(), CurOffset);
371  LLVM_DEBUG(dbgs() << "Updating fixed object (" << I.getFrameIdx()
372  << ") for other register at " << CurOffset << "\n");
373  }
374  CurOffset -= 4;
375  }
376  return true;
377 }
378 
381  const std::vector<CalleeSavedInfo> &CSI,
382  const TargetRegisterInfo *TRI) const {
383  LLVM_DEBUG(dbgs() << "Spill callee saved registers: "
384  << MBB.getParent()->getName() << "\n");
385  // There are routines for saving at least 3 registers (r13 to r15, etc.)
386  unsigned Last = determineLastCalleeSave(CSI);
387  if (UseSaveRestoreFunclet && Last > ARC::R14) {
388  // Use setObjectOffset for these registers.
389  // Needs to be in or before processFunctionBeforeFrameFinalized.
390  // Or, do assignCalleeSaveSpillSlots?
391  // Will be handled in prolog.
392  return true;
393  }
394  return false;
395 }
396 
399  std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const {
400  LLVM_DEBUG(dbgs() << "Restore callee saved registers: "
401  << MBB.getParent()->getName() << "\n");
402  // There are routines for saving at least 3 registers (r13 to r15, etc.)
403  unsigned Last = determineLastCalleeSave(CSI);
404  if (UseSaveRestoreFunclet && Last > ARC::R14) {
405  // Will be handled in epilog.
406  return true;
407  }
408  return false;
409 }
410 
411 // Adjust local variables that are 4-bytes or larger to 4-byte boundary
413  MachineFunction &MF, RegScavenger *RS) const {
414  const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
415  LLVM_DEBUG(dbgs() << "Process function before frame finalized: "
416  << MF.getName() << "\n");
417  MachineFrameInfo &MFI = MF.getFrameInfo();
418  LLVM_DEBUG(dbgs() << "Current stack size: " << MFI.getStackSize() << "\n");
419  const TargetRegisterClass *RC = &ARC::GPR32RegClass;
420  if (MFI.hasStackObjects()) {
421  int RegScavFI = MFI.CreateStackObject(
422  RegInfo->getSpillSize(*RC), RegInfo->getSpillAlignment(*RC), false);
423  RS->addScavengingFrameIndex(RegScavFI);
424  LLVM_DEBUG(dbgs() << "Created scavenging index RegScavFI=" << RegScavFI
425  << "\n");
426  }
427 }
428 
431  unsigned Reg, int NumBytes, bool IsAdd,
432  const ARCInstrInfo *TII) {
433  unsigned Opc = IsAdd ? ARC::ADD_rru6 : ARC::SUB_rru6;
434  BuildMI(MBB, MBBI, dl, TII->get(Opc), Reg)
435  .addReg(Reg, RegState::Kill)
436  .addImm(NumBytes);
437 }
438 
442  LLVM_DEBUG(dbgs() << "EmitCallFramePseudo: " << MF.getName() << "\n");
443  const ARCInstrInfo *TII = MF.getSubtarget<ARCSubtarget>().getInstrInfo();
444  MachineInstr &Old = *I;
445  DebugLoc dl = Old.getDebugLoc();
446  unsigned Amt = Old.getOperand(0).getImm();
447  auto *AFI = MF.getInfo<ARCFunctionInfo>();
448  if (!hasFP(MF)) {
449  if (Amt > AFI->MaxCallStackReq && Old.getOpcode() == ARC::ADJCALLSTACKDOWN)
450  AFI->MaxCallStackReq = Amt;
451  } else {
452  if (Amt != 0) {
453  assert((Old.getOpcode() == ARC::ADJCALLSTACKDOWN ||
454  Old.getOpcode() == ARC::ADJCALLSTACKUP) &&
455  "Unknown Frame Pseudo.");
456  bool IsAdd = (Old.getOpcode() == ARC::ADJCALLSTACKUP);
457  emitRegUpdate(MBB, I, dl, ARC::SP, Amt, IsAdd, TII);
458  }
459  }
460  return MBB.erase(I);
461 }
462 
464  const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
465  bool HasFP = MF.getTarget().Options.DisableFramePointerElim(MF) ||
468  RegInfo->needsStackRealignment(MF);
469  return HasFP;
470 }
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:176
ARCFunctionInfo - This class is derived from MachineFunction private ARC target-specific information ...
BitVector & set()
Definition: BitVector.h:397
LLVMContext & Context
This class represents lattice values for constants.
Definition: AllocatorList.h:23
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:382
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Insert Prologue into the function.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:487
unsigned Reg
static unsigned determineLastCalleeSave(const std::vector< CalleeSavedInfo > &CSI)
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:33
MachineModuleInfo & getMMI() const
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
Add explicit callee save registers.
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:474
unsigned getSpillSize(const TargetRegisterClass &RC) const
Return the size in bytes of the stack slot allocated to hold a spilled copy of a register from class ...
static cl::opt< bool > UseSaveRestoreFunclet("arc-save-restore-funclet", cl::Hidden, cl::desc("Use arc callee save/restore functions"), cl::init(true))
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
unsigned getSpillAlignment(const TargetRegisterClass &RC) const
Return the minimum required alignment in bytes for a spill slot for a register of this class...
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
const HexagonInstrInfo * TII
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:408
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
static const char * load_funclet_name[]
Context object for machine code objects.
Definition: MCContext.h:62
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
static const char * store_funclet_name[]
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
const ARCInstrInfo * getInstrInfo() const override
Definition: ARCSubtarget.h:48
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata *> MDs)
Definition: Metadata.h:1165
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:422
This file declares the machine register scavenger class.
unsigned const MachineRegisterInfo * MRI
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
bool assignCalleeSavedSpillSlots(llvm::MachineFunction &, const llvm::TargetRegisterInfo *, std::vector< llvm::CalleeSavedInfo > &) const override
assignCalleeSavedSpillSlots - Allows target to override spill slot assignment logic.
void setStackSize(uint64_t Size)
Set the size of the stack.
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE and DBG_LABEL instructions...
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register...
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
static std::vector< CalleeSavedInfo >::iterator getSavedReg(std::vector< CalleeSavedInfo > &V, unsigned reg)
int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool IsImmutable=false)
Create a spill slot at a fixed location on the stack.
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
int64_t getImm() const
const Function & getFunction() const
Return the LLVM function that this machine code represents.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
static void generateStackAdjustment(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const ARCInstrInfo &TII, DebugLoc dl, int Amount, int StackPtr)
Representation of each machine instruction.
Definition: MachineInstr.h:63
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & setMIFlags(unsigned Flags) const
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Insert Epilogue into the function.
TargetOptions Options
Definition: TargetMachine.h:96
#define I(x, y, z)
Definition: MD5.cpp:58
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
const MCRegisterInfo * getRegisterInfo() const
Definition: MCContext.h:294
bool needsStackRealignment(const MachineFunction &MF) const
True if storage within the function requires the stack pointer to be aligned more than the normal cal...
void setObjectOffset(int ObjectIdx, int64_t SPOffset)
Set the stack frame offset of the specified object.
IRTranslator LLVM IR MI
#define LLVM_DEBUG(X)
Definition: Debug.h:122
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:413
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
This class contains meta information specific to a module.
bool hasCalls() const
Return true if the current function has any function calls.
static void emitRegUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned Reg, int NumBytes, bool IsAdd, const ARCInstrInfo *TII)