LLVM  9.0.0svn
AVRAsmPrinter.cpp
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1 //===-- AVRAsmPrinter.cpp - AVR LLVM assembly writer ----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a printer that converts from our internal representation
10 // of machine-dependent LLVM code to GAS-format AVR assembly language.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "AVR.h"
15 #include "AVRMCInstLower.h"
16 #include "AVRSubtarget.h"
18 
24 #include "llvm/IR/Mangler.h"
25 #include "llvm/MC/MCInst.h"
26 #include "llvm/MC/MCStreamer.h"
27 #include "llvm/MC/MCSymbol.h"
31 
32 #define DEBUG_TYPE "avr-asm-printer"
33 
34 namespace llvm {
35 
36 /// An AVR assembly code printer.
37 class AVRAsmPrinter : public AsmPrinter {
38 public:
40  std::unique_ptr<MCStreamer> Streamer)
41  : AsmPrinter(TM, std::move(Streamer)), MRI(*TM.getMCRegisterInfo()) { }
42 
43  StringRef getPassName() const override { return "AVR Assembly Printer"; }
44 
45  void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O,
46  const char *Modifier = 0);
47 
48  bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
49  unsigned AsmVariant, const char *ExtraCode,
50  raw_ostream &O) override;
51 
52  bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
53  unsigned AsmVariant, const char *ExtraCode,
54  raw_ostream &O) override;
55 
56  void EmitInstruction(const MachineInstr *MI) override;
57 
58 private:
59  const MCRegisterInfo &MRI;
60 };
61 
62 void AVRAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
63  raw_ostream &O, const char *Modifier) {
64  const MachineOperand &MO = MI->getOperand(OpNo);
65 
66  switch (MO.getType()) {
69  break;
71  O << MO.getImm();
72  break;
74  O << getSymbol(MO.getGlobal());
75  break;
78  break;
80  O << *MO.getMBB()->getSymbol();
81  break;
82  default:
83  llvm_unreachable("Not implemented yet!");
84  }
85 }
86 
87 bool AVRAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
88  unsigned AsmVariant, const char *ExtraCode,
89  raw_ostream &O) {
90  // Default asm printer can only deal with some extra codes,
91  // so try it first.
92  bool Error = AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O);
93 
94  if (Error && ExtraCode && ExtraCode[0]) {
95  if (ExtraCode[1] != 0)
96  return true; // Unknown modifier.
97 
98  if (ExtraCode[0] >= 'A' && ExtraCode[0] <= 'Z') {
99  const MachineOperand &RegOp = MI->getOperand(OpNum);
100 
101  assert(RegOp.isReg() && "Operand must be a register when you're"
102  "using 'A'..'Z' operand extracodes.");
103  unsigned Reg = RegOp.getReg();
104 
105  unsigned ByteNumber = ExtraCode[0] - 'A';
106 
107  unsigned OpFlags = MI->getOperand(OpNum - 1).getImm();
108  unsigned NumOpRegs = InlineAsm::getNumOperandRegisters(OpFlags);
109  (void)NumOpRegs;
110 
111  const AVRSubtarget &STI = MF->getSubtarget<AVRSubtarget>();
112  const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
113 
114  const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(Reg);
115  unsigned BytesPerReg = TRI.getRegSizeInBits(*RC) / 8;
116  assert(BytesPerReg <= 2 && "Only 8 and 16 bit regs are supported.");
117 
118  unsigned RegIdx = ByteNumber / BytesPerReg;
119  assert(RegIdx < NumOpRegs && "Multibyte index out of range.");
120 
121  Reg = MI->getOperand(OpNum + RegIdx).getReg();
122 
123  if (BytesPerReg == 2) {
124  Reg = TRI.getSubReg(Reg, ByteNumber % BytesPerReg ? AVR::sub_hi
125  : AVR::sub_lo);
126  }
127 
129  return false;
130  }
131  }
132 
133  if (Error)
134  printOperand(MI, OpNum, O);
135 
136  return false;
137 }
138 
140  unsigned OpNum, unsigned AsmVariant,
141  const char *ExtraCode,
142  raw_ostream &O) {
143  if (ExtraCode && ExtraCode[0]) {
144  llvm_unreachable("This branch is not implemented yet");
145  }
146 
147  const MachineOperand &MO = MI->getOperand(OpNum);
148  (void)MO;
149  assert(MO.isReg() && "Unexpected inline asm memory operand");
150 
151  // TODO: We should be able to look up the alternative name for
152  // the register if it's given.
153  // TableGen doesn't expose a way of getting retrieving names
154  // for registers.
155  if (MI->getOperand(OpNum).getReg() == AVR::R31R30) {
156  O << "Z";
157  } else {
158  assert(MI->getOperand(OpNum).getReg() == AVR::R29R28 &&
159  "Wrong register class for memory operand.");
160  O << "Y";
161  }
162 
163  // If NumOpRegs == 2, then we assume it is product of a FrameIndex expansion
164  // and the second operand is an Imm.
165  unsigned OpFlags = MI->getOperand(OpNum - 1).getImm();
166  unsigned NumOpRegs = InlineAsm::getNumOperandRegisters(OpFlags);
167 
168  if (NumOpRegs == 2) {
169  O << '+' << MI->getOperand(OpNum + 1).getImm();
170  }
171 
172  return false;
173 }
174 
176  AVRMCInstLower MCInstLowering(OutContext, *this);
177 
178  MCInst I;
179  MCInstLowering.lowerInstruction(*MI, I);
181 }
182 
183 } // end of namespace llvm
184 
185 extern "C" void LLVMInitializeAVRAsmPrinter() {
186  llvm::RegisterAsmPrinter<llvm::AVRAsmPrinter> X(llvm::getTheAVRTarget());
187 }
188 
void EmitInstruction(const MachineInstr *MI) override
Targets should implement this to emit instructions.
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
MachineBasicBlock * getMBB() const
std::unique_ptr< MCStreamer > OutStreamer
This is the MCStreamer object for the file we are generating.
Definition: AsmPrinter.h:93
MCSymbol * GetExternalSymbolSymbol(StringRef Sym) const
Return the MCSymbol for the specified ExternalSymbol.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...
void lowerInstruction(const MachineInstr &MI, MCInst &OutMI) const
Lowers a MachineInstr into a MCInst.
MCContext & OutContext
This is the context for the output file that we are streaming.
Definition: AsmPrinter.h:88
unsigned getReg() const
getReg - Returns the register number.
unsigned Reg
MachineBasicBlock reference.
unsigned const TargetRegisterInfo * TRI
MachineFunction * MF
The current machine function.
Definition: AsmPrinter.h:96
Target & getTheAVRTarget()
Definition: BitVector.h:937
Name of external global symbol.
const char * getSymbolName() const
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:158
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O, const char *Modifier=0)
void LLVMInitializeAVRAsmPrinter()
Address of a global value.
Lowers MachineInstr objects into MCInst objects.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const GlobalValue * getGlobal() const
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant...
AVRAsmPrinter(TargetMachine &TM, std::unique_ptr< MCStreamer > Streamer)
TargetMachine & TM
Target machine description.
Definition: AsmPrinter.h:81
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:78
static unsigned getNumOperandRegisters(unsigned Flag)
getNumOperandRegisters - Extract the number of registers field from the inline asm operand flag...
Definition: InlineAsm.h:335
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
MCSymbol * getSymbol(const GlobalValue *GV) const
Definition: AsmPrinter.cpp:430
MachineOperand class - Representation of each machine instruction operand.
void EmitToStreamer(MCStreamer &S, const MCInst &Inst)
Definition: AsmPrinter.cpp:225
An AVR assembly code printer.
int64_t getImm() const
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant...
A specific AVR target MCU.
Definition: AVRSubtarget.h:31
Representation of each machine instruction.
Definition: MachineInstr.h:63
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
#define I(x, y, z)
Definition: MD5.cpp:58
static const char * getPrettyRegisterName(unsigned RegNo, MCRegisterInfo const &MRI)
bool isReg() const
isReg - Tests if this is a MO_Register operand.
StringRef getPassName() const override
getPassName - Return a nice clean name for a pass.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Lightweight error class with error context and mandatory checking.
Definition: Error.h:157
const AVRRegisterInfo * getRegisterInfo() const override
Definition: AVRSubtarget.h:45
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:65
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:413
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.