LLVM  10.0.0svn
AVRAsmPrinter.cpp
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1 //===-- AVRAsmPrinter.cpp - AVR LLVM assembly writer ----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a printer that converts from our internal representation
10 // of machine-dependent LLVM code to GAS-format AVR assembly language.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "AVR.h"
15 #include "AVRMCInstLower.h"
16 #include "AVRSubtarget.h"
19 
25 #include "llvm/IR/Mangler.h"
26 #include "llvm/MC/MCInst.h"
27 #include "llvm/MC/MCStreamer.h"
28 #include "llvm/MC/MCSymbol.h"
32 
33 #define DEBUG_TYPE "avr-asm-printer"
34 
35 namespace llvm {
36 
37 /// An AVR assembly code printer.
38 class AVRAsmPrinter : public AsmPrinter {
39 public:
41  std::unique_ptr<MCStreamer> Streamer)
42  : AsmPrinter(TM, std::move(Streamer)), MRI(*TM.getMCRegisterInfo()) { }
43 
44  StringRef getPassName() const override { return "AVR Assembly Printer"; }
45 
46  void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
47 
48  bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
49  const char *ExtraCode, raw_ostream &O) override;
50 
51  bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
52  const char *ExtraCode, raw_ostream &O) override;
53 
54  void EmitInstruction(const MachineInstr *MI) override;
55 
56 private:
57  const MCRegisterInfo &MRI;
58 };
59 
60 void AVRAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
61  raw_ostream &O) {
62  const MachineOperand &MO = MI->getOperand(OpNo);
63 
64  switch (MO.getType()) {
67  break;
69  O << MO.getImm();
70  break;
72  O << getSymbol(MO.getGlobal());
73  break;
76  break;
78  O << *MO.getMBB()->getSymbol();
79  break;
80  default:
81  llvm_unreachable("Not implemented yet!");
82  }
83 }
84 
85 bool AVRAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
86  const char *ExtraCode, raw_ostream &O) {
87  // Default asm printer can only deal with some extra codes,
88  // so try it first.
89  bool Error = AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O);
90 
91  if (Error && ExtraCode && ExtraCode[0]) {
92  if (ExtraCode[1] != 0)
93  return true; // Unknown modifier.
94 
95  if (ExtraCode[0] >= 'A' && ExtraCode[0] <= 'Z') {
96  const MachineOperand &RegOp = MI->getOperand(OpNum);
97 
98  assert(RegOp.isReg() && "Operand must be a register when you're"
99  "using 'A'..'Z' operand extracodes.");
100  Register Reg = RegOp.getReg();
101 
102  unsigned ByteNumber = ExtraCode[0] - 'A';
103 
104  unsigned OpFlags = MI->getOperand(OpNum - 1).getImm();
105  unsigned NumOpRegs = InlineAsm::getNumOperandRegisters(OpFlags);
106  (void)NumOpRegs;
107 
108  const AVRSubtarget &STI = MF->getSubtarget<AVRSubtarget>();
109  const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
110 
111  const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(Reg);
112  unsigned BytesPerReg = TRI.getRegSizeInBits(*RC) / 8;
113  assert(BytesPerReg <= 2 && "Only 8 and 16 bit regs are supported.");
114 
115  unsigned RegIdx = ByteNumber / BytesPerReg;
116  assert(RegIdx < NumOpRegs && "Multibyte index out of range.");
117 
118  Reg = MI->getOperand(OpNum + RegIdx).getReg();
119 
120  if (BytesPerReg == 2) {
121  Reg = TRI.getSubReg(Reg, ByteNumber % BytesPerReg ? AVR::sub_hi
122  : AVR::sub_lo);
123  }
124 
126  return false;
127  }
128  }
129 
130  if (Error)
131  printOperand(MI, OpNum, O);
132 
133  return false;
134 }
135 
137  unsigned OpNum, const char *ExtraCode,
138  raw_ostream &O) {
139  if (ExtraCode && ExtraCode[0]) {
140  llvm_unreachable("This branch is not implemented yet");
141  }
142 
143  const MachineOperand &MO = MI->getOperand(OpNum);
144  (void)MO;
145  assert(MO.isReg() && "Unexpected inline asm memory operand");
146 
147  // TODO: We should be able to look up the alternative name for
148  // the register if it's given.
149  // TableGen doesn't expose a way of getting retrieving names
150  // for registers.
151  if (MI->getOperand(OpNum).getReg() == AVR::R31R30) {
152  O << "Z";
153  } else {
154  assert(MI->getOperand(OpNum).getReg() == AVR::R29R28 &&
155  "Wrong register class for memory operand.");
156  O << "Y";
157  }
158 
159  // If NumOpRegs == 2, then we assume it is product of a FrameIndex expansion
160  // and the second operand is an Imm.
161  unsigned OpFlags = MI->getOperand(OpNum - 1).getImm();
162  unsigned NumOpRegs = InlineAsm::getNumOperandRegisters(OpFlags);
163 
164  if (NumOpRegs == 2) {
165  O << '+' << MI->getOperand(OpNum + 1).getImm();
166  }
167 
168  return false;
169 }
170 
172  AVRMCInstLower MCInstLowering(OutContext, *this);
173 
174  MCInst I;
175  MCInstLowering.lowerInstruction(*MI, I);
177 }
178 
179 } // end of namespace llvm
180 
181 extern "C" void LLVMInitializeAVRAsmPrinter() {
182  llvm::RegisterAsmPrinter<llvm::AVRAsmPrinter> X(llvm::getTheAVRTarget());
183 }
184 
void EmitInstruction(const MachineInstr *MI) override
Targets should implement this to emit instructions.
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
MachineBasicBlock * getMBB() const
std::unique_ptr< MCStreamer > OutStreamer
This is the MCStreamer object for the file we are generating.
Definition: AsmPrinter.h:93
MCSymbol * GetExternalSymbolSymbol(StringRef Sym) const
Return the MCSymbol for the specified ExternalSymbol.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
void lowerInstruction(const MachineInstr &MI, MCInst &OutMI) const
Lowers a MachineInstr into a MCInst.
MCContext & OutContext
This is the context for the output file that we are streaming.
Definition: AsmPrinter.h:88
unsigned Reg
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant...
MachineBasicBlock reference.
unsigned const TargetRegisterInfo * TRI
MachineFunction * MF
The current machine function.
Definition: AsmPrinter.h:96
Target & getTheAVRTarget()
Definition: BitVector.h:937
Name of external global symbol.
const char * getSymbolName() const
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:158
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
void LLVMInitializeAVRAsmPrinter()
Address of a global value.
Lowers MachineInstr objects into MCInst objects.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const GlobalValue * getGlobal() const
AVRAsmPrinter(TargetMachine &TM, std::unique_ptr< MCStreamer > Streamer)
TargetMachine & TM
Target machine description.
Definition: AsmPrinter.h:81
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:78
static unsigned getNumOperandRegisters(unsigned Flag)
getNumOperandRegisters - Extract the number of registers field from the inline asm operand flag...
Definition: InlineAsm.h:336
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...
void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O)
MCSymbol * getSymbol(const GlobalValue *GV) const
Definition: AsmPrinter.cpp:444
MachineOperand class - Representation of each machine instruction operand.
void EmitToStreamer(MCStreamer &S, const MCInst &Inst)
Definition: AsmPrinter.cpp:234
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant...
An AVR assembly code printer.
int64_t getImm() const
A specific AVR target MCU.
Definition: AVRSubtarget.h:31
Representation of each machine instruction.
Definition: MachineInstr.h:64
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
#define I(x, y, z)
Definition: MD5.cpp:58
static const char * getPrettyRegisterName(unsigned RegNo, MCRegisterInfo const &MRI)
bool isReg() const
isReg - Tests if this is a MO_Register operand.
StringRef getPassName() const override
getPassName - Return a nice clean name for a pass.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Lightweight error class with error context and mandatory checking.
Definition: Error.h:157
const AVRRegisterInfo * getRegisterInfo() const override
Definition: AVRSubtarget.h:45
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:65
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
Register getReg() const
getReg - Returns the register number.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:416
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19