LLVM  6.0.0svn
AVRAsmPrinter.cpp
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1 //===-- AVRAsmPrinter.cpp - AVR LLVM assembly writer ----------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format AVR assembly language.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "AVR.h"
16 #include "AVRMCInstLower.h"
17 #include "AVRSubtarget.h"
19 
25 #include "llvm/IR/Mangler.h"
26 #include "llvm/MC/MCInst.h"
27 #include "llvm/MC/MCStreamer.h"
28 #include "llvm/MC/MCSymbol.h"
32 
33 #define DEBUG_TYPE "avr-asm-printer"
34 
35 namespace llvm {
36 
37 /// An AVR assembly code printer.
38 class AVRAsmPrinter : public AsmPrinter {
39 public:
41  std::unique_ptr<MCStreamer> Streamer)
42  : AsmPrinter(TM, std::move(Streamer)), MRI(*TM.getMCRegisterInfo()) { }
43 
44  StringRef getPassName() const override { return "AVR Assembly Printer"; }
45 
46  void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O,
47  const char *Modifier = 0);
48 
49  bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
50  unsigned AsmVariant, const char *ExtraCode,
51  raw_ostream &O) override;
52 
53  bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
54  unsigned AsmVariant, const char *ExtraCode,
55  raw_ostream &O) override;
56 
57  void EmitInstruction(const MachineInstr *MI) override;
58 
59 private:
60  const MCRegisterInfo &MRI;
61 };
62 
63 void AVRAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
64  raw_ostream &O, const char *Modifier) {
65  const MachineOperand &MO = MI->getOperand(OpNo);
66 
67  switch (MO.getType()) {
70  break;
72  O << MO.getImm();
73  break;
75  O << getSymbol(MO.getGlobal());
76  break;
79  break;
81  O << *MO.getMBB()->getSymbol();
82  break;
83  default:
84  llvm_unreachable("Not implemented yet!");
85  }
86 }
87 
88 bool AVRAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
89  unsigned AsmVariant, const char *ExtraCode,
90  raw_ostream &O) {
91  // Default asm printer can only deal with some extra codes,
92  // so try it first.
93  bool Error = AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O);
94 
95  if (Error && ExtraCode && ExtraCode[0]) {
96  if (ExtraCode[1] != 0)
97  return true; // Unknown modifier.
98 
99  if (ExtraCode[0] >= 'A' && ExtraCode[0] <= 'Z') {
100  const MachineOperand &RegOp = MI->getOperand(OpNum);
101 
102  assert(RegOp.isReg() && "Operand must be a register when you're"
103  "using 'A'..'Z' operand extracodes.");
104  unsigned Reg = RegOp.getReg();
105 
106  unsigned ByteNumber = ExtraCode[0] - 'A';
107 
108  unsigned OpFlags = MI->getOperand(OpNum - 1).getImm();
109  unsigned NumOpRegs = InlineAsm::getNumOperandRegisters(OpFlags);
110  (void)NumOpRegs;
111 
112  const AVRSubtarget &STI = MF->getSubtarget<AVRSubtarget>();
113  const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
114 
115  const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(Reg);
116  unsigned BytesPerReg = TRI.getRegSizeInBits(*RC) / 8;
117  assert(BytesPerReg <= 2 && "Only 8 and 16 bit regs are supported.");
118 
119  unsigned RegIdx = ByteNumber / BytesPerReg;
120  assert(RegIdx < NumOpRegs && "Multibyte index out of range.");
121 
122  Reg = MI->getOperand(OpNum + RegIdx).getReg();
123 
124  if (BytesPerReg == 2) {
125  Reg = TRI.getSubReg(Reg, ByteNumber % BytesPerReg ? AVR::sub_hi
126  : AVR::sub_lo);
127  }
128 
130  return false;
131  }
132  }
133 
134  if (Error)
135  printOperand(MI, OpNum, O);
136 
137  return false;
138 }
139 
141  unsigned OpNum, unsigned AsmVariant,
142  const char *ExtraCode,
143  raw_ostream &O) {
144  if (ExtraCode && ExtraCode[0]) {
145  llvm_unreachable("This branch is not implemented yet");
146  }
147 
148  const MachineOperand &MO = MI->getOperand(OpNum);
149  (void)MO;
150  assert(MO.isReg() && "Unexpected inline asm memory operand");
151 
152  // TODO: We should be able to look up the alternative name for
153  // the register if it's given.
154  // TableGen doesn't expose a way of getting retrieving names
155  // for registers.
156  if (MI->getOperand(OpNum).getReg() == AVR::R31R30) {
157  O << "Z";
158  } else {
159  assert(MI->getOperand(OpNum).getReg() == AVR::R29R28 &&
160  "Wrong register class for memory operand.");
161  O << "Y";
162  }
163 
164  // If NumOpRegs == 2, then we assume it is product of a FrameIndex expansion
165  // and the second operand is an Imm.
166  unsigned OpFlags = MI->getOperand(OpNum - 1).getImm();
167  unsigned NumOpRegs = InlineAsm::getNumOperandRegisters(OpFlags);
168 
169  if (NumOpRegs == 2) {
170  O << '+' << MI->getOperand(OpNum + 1).getImm();
171  }
172 
173  return false;
174 }
175 
177  AVRMCInstLower MCInstLowering(OutContext, *this);
178 
179  MCInst I;
180  MCInstLowering.lowerInstruction(*MI, I);
182 }
183 
184 } // end of namespace llvm
185 
186 extern "C" void LLVMInitializeAVRAsmPrinter() {
187  llvm::RegisterAsmPrinter<llvm::AVRAsmPrinter> X(llvm::getTheAVRTarget());
188 }
189 
void EmitInstruction(const MachineInstr *MI) override
Targets should implement this to emit instructions.
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
MachineBasicBlock * getMBB() const
std::unique_ptr< MCStreamer > OutStreamer
This is the MCStreamer object for the file we are generating.
Definition: AsmPrinter.h:92
MCSymbol * GetExternalSymbolSymbol(StringRef Sym) const
Return the MCSymbol for the specified ExternalSymbol.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...
void lowerInstruction(const MachineInstr &MI, MCInst &OutMI) const
Lowers a MachineInstr into a MCInst.
MCContext & OutContext
This is the context for the output file that we are streaming.
Definition: AsmPrinter.h:87
unsigned getReg() const
getReg - Returns the register number.
const MachineFunction * MF
The current machine function.
Definition: AsmPrinter.h:95
MachineBasicBlock reference.
Target & getTheAVRTarget()
Definition: BitVector.h:920
Name of external global symbol.
Reg
All possible values of the reg field in the ModR/M byte.
const char * getSymbolName() const
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:159
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O, const char *Modifier=0)
void LLVMInitializeAVRAsmPrinter()
Address of a global value.
Lowers MachineInstr objects into MCInst objects.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const GlobalValue * getGlobal() const
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant...
AVRAsmPrinter(TargetMachine &TM, std::unique_ptr< MCStreamer > Streamer)
TargetMachine & TM
Target machine description.
Definition: AsmPrinter.h:80
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:77
static unsigned getNumOperandRegisters(unsigned Flag)
getNumOperandRegisters - Extract the number of registers field from the inline asm operand flag...
Definition: InlineAsm.h:336
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
MCSymbol * getSymbol(const GlobalValue *GV) const
Definition: AsmPrinter.cpp:433
MachineOperand class - Representation of each machine instruction operand.
void EmitToStreamer(MCStreamer &S, const MCInst &Inst)
Definition: AsmPrinter.cpp:222
An AVR assembly code printer.
int64_t getImm() const
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant...
A specific AVR target MCU.
Definition: AVRSubtarget.h:32
Representation of each machine instruction.
Definition: MachineInstr.h:59
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
#define I(x, y, z)
Definition: MD5.cpp:58
static const char * getPrettyRegisterName(unsigned RegNo, MCRegisterInfo const &MRI)
bool isReg() const
isReg - Tests if this is a MO_Register operand.
StringRef getPassName() const override
getPassName - Return a nice clean name for a pass.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Lightweight error class with error context and mandatory checking.
Definition: Error.h:156
const AVRRegisterInfo * getRegisterInfo() const override
Definition: AVRSubtarget.h:46
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:44
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:57
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:295
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.