LLVM  6.0.0svn
LiveRangeEdit.h
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1 //===- LiveRangeEdit.h - Basic tools for split and spill --------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // The LiveRangeEdit class represents changes done to a virtual register when it
11 // is spilled or split.
12 //
13 // The parent register is never changed. Instead, a number of new virtual
14 // registers are created and added to the newRegs vector.
15 //
16 //===----------------------------------------------------------------------===//
17 
18 #ifndef LLVM_CODEGEN_LIVERANGEEDIT_H
19 #define LLVM_CODEGEN_LIVERANGEEDIT_H
20 
21 #include "llvm/ADT/ArrayRef.h"
22 #include "llvm/ADT/None.h"
23 #include "llvm/ADT/SetVector.h"
24 #include "llvm/ADT/SmallPtrSet.h"
25 #include "llvm/ADT/SmallVector.h"
33 #include <cassert>
34 
35 namespace llvm {
36 
37 class LiveIntervals;
38 class MachineBlockFrequencyInfo;
39 class MachineInstr;
40 class MachineLoopInfo;
41 class MachineOperand;
42 class TargetInstrInfo;
43 class TargetRegisterInfo;
44 class VirtRegMap;
45 
47 public:
48  /// Callback methods for LiveRangeEdit owners.
49  class Delegate {
50  virtual void anchor();
51 
52  public:
53  virtual ~Delegate() = default;
54 
55  /// Called immediately before erasing a dead machine instruction.
57 
58  /// Called when a virtual register is no longer used. Return false to defer
59  /// its deletion from LiveIntervals.
60  virtual bool LRE_CanEraseVirtReg(unsigned) { return true; }
61 
62  /// Called before shrinking the live range of a virtual register.
63  virtual void LRE_WillShrinkVirtReg(unsigned) {}
64 
65  /// Called after cloning a virtual register.
66  /// This is used for new registers representing connected components of Old.
67  virtual void LRE_DidCloneVirtReg(unsigned New, unsigned Old) {}
68  };
69 
70 private:
71  LiveInterval *Parent;
74  LiveIntervals &LIS;
75  VirtRegMap *VRM;
76  const TargetInstrInfo &TII;
77  Delegate *const TheDelegate;
78 
79  /// FirstNew - Index of the first register added to NewRegs.
80  const unsigned FirstNew;
81 
82  /// ScannedRemattable - true when remattable values have been identified.
83  bool ScannedRemattable = false;
84 
85  /// DeadRemats - The saved instructions which have already been dead after
86  /// rematerialization but not deleted yet -- to be done in postOptimization.
88 
89  /// Remattable - Values defined by remattable instructions as identified by
90  /// tii.isTriviallyReMaterializable().
92 
93  /// Rematted - Values that were actually rematted, and so need to have their
94  /// live range trimmed or entirely removed.
96 
97  /// scanRemattable - Identify the Parent values that may rematerialize.
98  void scanRemattable(AliasAnalysis *aa);
99 
100  /// allUsesAvailableAt - Return true if all registers used by OrigMI at
101  /// OrigIdx are also available with the same value at UseIdx.
102  bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx,
103  SlotIndex UseIdx) const;
104 
105  /// foldAsLoad - If LI has a single use and a single def that can be folded as
106  /// a load, eliminate the register by folding the def into the use.
107  bool foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr *> &Dead);
108 
111 
112  /// Helper for eliminateDeadDefs.
113  void eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink,
114  AliasAnalysis *AA);
115 
116  /// MachineRegisterInfo callback to notify when new virtual
117  /// registers are created.
118  void MRI_NoteNewVirtualRegister(unsigned VReg) override;
119 
120  /// \brief Check if MachineOperand \p MO is a last use/kill either in the
121  /// main live range of \p LI or in one of the matching subregister ranges.
122  bool useIsKill(const LiveInterval &LI, const MachineOperand &MO) const;
123 
124 public:
125  /// Create a LiveRangeEdit for breaking down parent into smaller pieces.
126  /// @param parent The register being spilled or split.
127  /// @param newRegs List to receive any new registers created. This needn't be
128  /// empty initially, any existing registers are ignored.
129  /// @param MF The MachineFunction the live range edit is taking place in.
130  /// @param lis The collection of all live intervals in this function.
131  /// @param vrm Map of virtual registers to physical registers for this
132  /// function. If NULL, no virtual register map updates will
133  /// be done. This could be the case if called before Regalloc.
134  /// @param deadRemats The collection of all the instructions defining an
135  /// original reg and are dead after remat.
137  MachineFunction &MF, LiveIntervals &lis, VirtRegMap *vrm,
138  Delegate *delegate = nullptr,
139  SmallPtrSet<MachineInstr *, 32> *deadRemats = nullptr)
140  : Parent(parent), NewRegs(newRegs), MRI(MF.getRegInfo()), LIS(lis),
141  VRM(vrm), TII(*MF.getSubtarget().getInstrInfo()), TheDelegate(delegate),
142  FirstNew(newRegs.size()), DeadRemats(deadRemats) {
143  MRI.setDelegate(this);
144  }
145 
146  ~LiveRangeEdit() override { MRI.resetDelegate(this); }
147 
149  assert(Parent && "No parent LiveInterval");
150  return *Parent;
151  }
152 
153  unsigned getReg() const { return getParent().reg; }
154 
155  /// Iterator for accessing the new registers added by this edit.
157  iterator begin() const { return NewRegs.begin() + FirstNew; }
158  iterator end() const { return NewRegs.end(); }
159  unsigned size() const { return NewRegs.size() - FirstNew; }
160  bool empty() const { return size() == 0; }
161  unsigned get(unsigned idx) const { return NewRegs[idx + FirstNew]; }
162 
163  /// pop_back - It allows LiveRangeEdit users to drop new registers.
164  /// The context is when an original def instruction of a register is
165  /// dead after rematerialization, we still want to keep it for following
166  /// rematerializations. We save the def instruction in DeadRemats,
167  /// and replace the original dst register with a new dummy register so
168  /// the live range of original dst register can be shrinked normally.
169  /// We don't want to allocate phys register for the dummy register, so
170  /// we want to drop it from the NewRegs set.
171  void pop_back() { NewRegs.pop_back(); }
172 
174  return makeArrayRef(NewRegs).slice(FirstNew);
175  }
176 
177  /// createEmptyIntervalFrom - Create a new empty interval based on OldReg.
178  LiveInterval &createEmptyIntervalFrom(unsigned OldReg);
179 
180  /// createFrom - Create a new virtual register based on OldReg.
181  unsigned createFrom(unsigned OldReg);
182 
183  /// create - Create a new register with the same class and original slot as
184  /// parent.
187  }
188 
189  unsigned create() { return createFrom(getReg()); }
190 
191  /// anyRematerializable - Return true if any parent values may be
192  /// rematerializable.
193  /// This function must be called before any rematerialization is attempted.
195 
196  /// checkRematerializable - Manually add VNI to the list of rematerializable
197  /// values if DefMI may be rematerializable.
199  AliasAnalysis *);
200 
201  /// Remat - Information needed to rematerialize at a specific location.
202  struct Remat {
203  VNInfo *ParentVNI; // parent_'s value at the remat location.
204  MachineInstr *OrigMI = nullptr; // Instruction defining OrigVNI. It contains
205  // the real expr for remat.
206 
207  explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI) {}
208  };
209 
210  /// canRematerializeAt - Determine if ParentVNI can be rematerialized at
211  /// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI.
212  /// When cheapAsAMove is set, only cheap remats are allowed.
213  bool canRematerializeAt(Remat &RM, VNInfo *OrigVNI, SlotIndex UseIdx,
214  bool cheapAsAMove);
215 
216  /// rematerializeAt - Rematerialize RM.ParentVNI into DestReg by inserting an
217  /// instruction into MBB before MI. The new instruction is mapped, but
218  /// liveness is not updated.
219  /// Return the SlotIndex of the new instruction.
221  MachineBasicBlock::iterator MI, unsigned DestReg,
222  const Remat &RM, const TargetRegisterInfo &,
223  bool Late = false);
224 
225  /// markRematerialized - explicitly mark a value as rematerialized after doing
226  /// it manually.
227  void markRematerialized(const VNInfo *ParentVNI) {
228  Rematted.insert(ParentVNI);
229  }
230 
231  /// didRematerialize - Return true if ParentVNI was rematerialized anywhere.
232  bool didRematerialize(const VNInfo *ParentVNI) const {
233  return Rematted.count(ParentVNI);
234  }
235 
237  // DeadRemats is an optional field.
238  if (DeadRemats)
239  DeadRemats->insert(inst);
240  }
241 
242  /// eraseVirtReg - Notify the delegate that Reg is no longer in use, and try
243  /// to erase it from LIS.
244  void eraseVirtReg(unsigned Reg);
245 
246  /// eliminateDeadDefs - Try to delete machine instructions that are now dead
247  /// (allDefsAreDead returns true). This may cause live intervals to be trimmed
248  /// and further dead efs to be eliminated.
249  /// RegsBeingSpilled lists registers currently being spilled by the register
250  /// allocator. These registers should not be split into new intervals
251  /// as currently those new intervals are not guaranteed to spill.
253  ArrayRef<unsigned> RegsBeingSpilled = None,
254  AliasAnalysis *AA = nullptr);
255 
256  /// calculateRegClassAndHint - Recompute register class and hint for each new
257  /// register.
259  const MachineBlockFrequencyInfo &);
260 };
261 
262 } // end namespace llvm
263 
264 #endif // LLVM_CODEGEN_LIVERANGEEDIT_H
const unsigned reg
Definition: LiveInterval.h:667
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
bool anyRematerializable(AliasAnalysis *)
anyRematerializable - Return true if any parent values may be rematerializable.
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:136
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:638
void eliminateDeadDefs(SmallVectorImpl< MachineInstr *> &Dead, ArrayRef< unsigned > RegsBeingSpilled=None, AliasAnalysis *AA=nullptr)
eliminateDeadDefs - Try to delete machine instructions that are now dead (allDefsAreDead returns true...
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
ArrayRef< unsigned > regs() const
bool didRematerialize(const VNInfo *ParentVNI) const
didRematerialize - Return true if ParentVNI was rematerialized anywhere.
VNInfo - Value Number Information.
Definition: LiveInterval.h:53
LiveRangeEdit(LiveInterval *parent, SmallVectorImpl< unsigned > &newRegs, MachineFunction &MF, LiveIntervals &lis, VirtRegMap *vrm, Delegate *delegate=nullptr, SmallPtrSet< MachineInstr *, 32 > *deadRemats=nullptr)
Create a LiveRangeEdit for breaking down parent into smaller pieces.
Callback methods for LiveRangeEdit owners.
Definition: LiveRangeEdit.h:49
bool checkRematerializable(VNInfo *VNI, const MachineInstr *DefMI, AliasAnalysis *)
checkRematerializable - Manually add VNI to the list of rematerializable values if DefMI may be remat...
const HexagonInstrInfo * TII
ArrayRef< T > makeArrayRef(const T &OneElt)
Construct an ArrayRef from a single element.
Definition: ArrayRef.h:451
Reg
All possible values of the reg field in the ModR/M byte.
void markDeadRemat(MachineInstr *inst)
bool canRematerializeAt(Remat &RM, VNInfo *OrigVNI, SlotIndex UseIdx, bool cheapAsAMove)
canRematerializeAt - Determine if ParentVNI can be rematerialized at UseIdx.
void pop_back()
pop_back - It allows LiveRangeEdit users to drop new registers.
unsigned getReg() const
TargetInstrInfo - Interface to description of machine instruction set.
unsigned createFrom(unsigned OldReg)
createFrom - Create a new virtual register based on OldReg.
unsigned const MachineRegisterInfo * MRI
Remat(VNInfo *ParentVNI)
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
Definition: SmallVector.h:116
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:371
unsigned size() const
virtual bool LRE_CanEraseVirtReg(unsigned)
Called when a virtual register is no longer used.
Definition: LiveRangeEdit.h:60
size_type count(ConstPtrType Ptr) const
count - Return 1 if the specified pointer is in the set, 0 otherwise.
Definition: SmallPtrSet.h:382
~LiveRangeEdit() override
virtual void LRE_WillEraseInstruction(MachineInstr *MI)
Called immediately before erasing a dead machine instruction.
Definition: LiveRangeEdit.h:56
bool empty() const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
LiveInterval & getParent() const
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:418
MachineOperand class - Representation of each machine instruction operand.
MachineInstrBuilder MachineInstrBuilder & DefMI
virtual ~Delegate()=default
void resetDelegate(Delegate *delegate)
virtual void LRE_WillShrinkVirtReg(unsigned)
Called before shrinking the live range of a virtual register.
Definition: LiveRangeEdit.h:63
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
void markRematerialized(const VNInfo *ParentVNI)
markRematerialized - explicitly mark a value as rematerialized after doing it manually.
Representation of each machine instruction.
Definition: MachineInstr.h:59
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator end()
Definition: SmallVector.h:120
SlotIndex rematerializeAt(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, const Remat &RM, const TargetRegisterInfo &, bool Late=false)
rematerializeAt - Rematerialize RM.ParentVNI into DestReg by inserting an instruction into MBB before...
SmallVectorImpl< unsigned >::const_iterator iterator
Iterator for accessing the new registers added by this edit.
iterator begin() const
virtual void LRE_DidCloneVirtReg(unsigned New, unsigned Old)
Called after cloning a virtual register.
Definition: LiveRangeEdit.h:67
iterator end() const
Remat - Information needed to rematerialize at a specific location.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
LiveInterval & createEmptyIntervalFrom(unsigned OldReg)
createEmptyIntervalFrom - Create a new empty interval based on OldReg.
A vector that has set insertion semantics.
Definition: SetVector.h:41
LiveInterval & createEmptyInterval()
create - Create a new register with the same class and original slot as parent.
void calculateRegClassAndHint(MachineFunction &, const MachineLoopInfo &, const MachineBlockFrequencyInfo &)
calculateRegClassAndHint - Recompute register class and hint for each new register.
IRTranslator LLVM IR MI
void setDelegate(Delegate *delegate)
void eraseVirtReg(unsigned Reg)
eraseVirtReg - Notify the delegate that Reg is no longer in use, and try to erase it from LIS...
SlotIndex - An opaque wrapper around machine indexes.
Definition: SlotIndexes.h:84