LLVM 22.0.0git
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#include "Target/RISCV/RISCVISelDAGToDAG.h"
Static Public Member Functions | |
static RISCVCC::CondCode | getRISCVCCForIntCC (ISD::CondCode CC) |
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static bool | IsLegalToFold (SDValue N, SDNode *U, SDNode *Root, CodeGenOptLevel OptLevel, bool IgnoreChains=false) |
IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction selection that starts at Root. | |
static void | InvalidateNodeId (SDNode *N) |
static int | getUninvalidatedNodeId (SDNode *N) |
static void | EnforceNodeIdInvariant (SDNode *N) |
static int | getNumFixedFromVariadicInfo (unsigned Flags) |
getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values that should be skipped when copying from the root. | |
Definition at line 24 of file RISCVISelDAGToDAG.h.
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Definition at line 30 of file RISCVISelDAGToDAG.h.
void RISCVDAGToDAGISel::addVectorLoadStoreOperands | ( | SDNode * | Node, |
unsigned | SEWImm, | ||
const SDLoc & | DL, | ||
unsigned | CurOp, | ||
bool | IsMasked, | ||
bool | IsStridedOrIndexed, | ||
SmallVectorImpl< SDValue > & | Operands, | ||
bool | IsLoad = false , |
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MVT * | IndexVT = nullptr |
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) |
Definition at line 243 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getTargetConstant(), llvm::RISCVSubtarget::getXLenVT(), llvm::RISCVVType::MASK_AGNOSTIC, Operands, and selectVLOp().
Referenced by Select(), selectVLSEG(), selectVLSEGFF(), selectVLXSEG(), selectVSSEG(), and selectVSXSEG().
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Definition at line 175 of file RISCVISelDAGToDAG.h.
References llvm::RISCVCC::COND_EQ, llvm::RISCVCC::COND_GE, llvm::RISCVCC::COND_GEU, llvm::RISCVCC::COND_LT, llvm::RISCVCC::COND_LTU, llvm::RISCVCC::COND_NE, llvm_unreachable, llvm::ISD::SETEQ, llvm::ISD::SETGE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETUGE, and llvm::ISD::SETULT.
Definition at line 128 of file RISCVISelDAGToDAG.h.
References hasAllNBitUsers().
Referenced by Select().
Definition at line 129 of file RISCVISelDAGToDAG.h.
References hasAllNBitUsers().
Referenced by Select().
bool RISCVDAGToDAGISel::hasAllNBitUsers | ( | SDNode * | Node, |
unsigned | Bits, | ||
const unsigned | Depth = 0 |
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) | const |
Definition at line 3829 of file RISCVISelDAGToDAG.cpp.
References llvm::ISD::ADD, llvm::ISD::AND, assert(), llvm::bit_width(), llvm::Depth, llvm::User::getOperand(), llvm::Use::getOperandNo(), llvm::Use::getUser(), llvm::RISCVSubtarget::getXLen(), hasAllNBitUsers(), llvm::Log2_32(), llvm::SelectionDAG::MaxRecursionDepth, llvm::ISD::MUL, llvm::ISD::OR, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SRL, llvm::ISD::SUB, llvm::SelectionDAGISel::TII, vectorPseudoHasAllNBitUsers(), and llvm::ISD::XOR.
Referenced by hasAllBUsers(), hasAllHUsers(), hasAllNBitUsers(), and hasAllWUsers().
Definition at line 130 of file RISCVISelDAGToDAG.h.
References hasAllNBitUsers().
Referenced by Select().
Definition at line 3680 of file RISCVISelDAGToDAG.cpp.
References assert(), llvm::SelectionDAGISel::CurDAG, llvm::SelectionDAG::haveNoCommonBitsSet(), N, and llvm::ISD::OR.
Referenced by selectZExtImm32().
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PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.
Reimplemented from llvm::SelectionDAGISel.
Definition at line 146 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAG::allnodes_begin(), llvm::SelectionDAG::allnodes_end(), llvm::SelectionDAGISel::CurDAG, llvm::SelectionDAG::getRoot(), llvm::HandleSDNode::getValue(), N, llvm::SelectionDAG::RemoveDeadNodes(), and llvm::SelectionDAG::setRoot().
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PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts.
Reimplemented from llvm::SelectionDAGISel.
Definition at line 42 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAG::allnodes_begin(), llvm::SelectionDAG::allnodes_end(), llvm::ISD::ANY_EXTEND, assert(), llvm::MVT::changeVectorElementType(), llvm::SelectionDAG::CreateStackTemporary(), llvm::SelectionDAGISel::CurDAG, llvm::dbgs(), DL, llvm::ISD::FP_EXTEND, llvm::SelectionDAG::getEntryNode(), llvm::TypeSize::getFixed(), llvm::MachinePointerInfo::getFixedStack(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getMemBasePlusOffset(), llvm::SelectionDAG::getMemIntrinsicNode(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getRegister(), llvm::SelectionDAG::getStore(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getUNDEF(), llvm::MVT::getVectorElementType(), llvm::SelectionDAG::getVTList(), llvm::MachinePointerInfo::getWithOffset(), llvm::RISCVSubtarget::getXLenVT(), llvm::Hi, llvm::ISD::INTRINSIC_W_CHAIN, llvm::MVT::isInteger(), llvm::MVT::isScalableVector(), llvm::MVT::isVector(), LLVM_DEBUG, llvm::Lo, llvm::SelectionDAGISel::MF, llvm::MachineMemOperand::MOLoad, N, Opc, llvm::SelectionDAG::RemoveDeadNodes(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::ISD::SPLAT_VECTOR, and llvm::ISD::TokenFactor.
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Reimplemented from llvm::SelectionDAGISel.
Definition at line 34 of file RISCVISelDAGToDAG.h.
References llvm::MachineFunction::getSubtarget(), llvm::SelectionDAGISel::MF, and llvm::SelectionDAGISel::runOnMachineFunction().
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Main hook for targets to transform nodes into machine nodes.
Implements llvm::SelectionDAGISel.
Definition at line 1083 of file RISCVISelDAGToDAG.cpp.
References Addr, addVectorLoadStoreOperands(), llvm::ISD::AND, assert(), llvm::sampleprof::Base, llvm::bit_width(), llvm::ISD::BITCAST, llvm::APFloat::bitcastToAPInt(), llvm::CallingConv::C, CASE_VMNAND_VMSET_OPCODES, CASE_VMSLT_OPCODES, CASE_VMXOR_VMANDN_VMOR_OPCODES, llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::countr_one(), llvm::countr_zero(), llvm::SelectionDAGISel::CurDAG, llvm::dbgs(), llvm::RISCVTargetLowering::decomposeSubvectorInsertExtractToSubRegs(), DL, llvm::RISCVSubtarget::expandVScale(), llvm::ISD::EXTRACT_SUBVECTOR, llvm::SDValue::getConstantOperandVal(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getEntryNode(), llvm::RISCVTargetLowering::getLMUL(), llvm::SelectionDAG::getMachineNode(), llvm::SDValue::getNode(), getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::TargetMachine::getOptLevel(), llvm::RISCVTargetLowering::getRegClassIDForVecVT(), llvm::SelectionDAG::getRegister(), llvm::RISCVSubtarget::getRegisterInfo(), llvm::TypeSize::getScalable(), llvm::MVT::getScalarSizeInBits(), getSegInstNF(), llvm::APInt::getSExtValue(), llvm::APInt::getSignedMinValue(), llvm::SDValue::getSimpleValueType(), llvm::MVT::getSizeInBits(), llvm::EVT::getStoreSize(), llvm::MVT::getStoreSize(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetExtractSubreg(), llvm::SelectionDAG::getTargetInsertSubreg(), llvm::RISCVSubtarget::getTargetLowering(), llvm::SDValue::getValueType(), llvm::MVT::getVectorElementCount(), llvm::MVT::getVectorElementType(), llvm::RISCVSubtarget::getXLen(), llvm::RISCVSubtarget::getXLenVT(), hasAllBUsers(), hasAllHUsers(), hasAllWUsers(), llvm::SDValue::hasOneUse(), llvm::Hi, Idx, llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, llvm::RISCVSubtarget::is64Bit(), llvm::MVT::isFixedLengthVector(), llvm::SelectionDAGISel::IsLegalToFold(), llvm::isMask_64(), llvm::APFloat::isNegZero(), llvm::isNullConstant(), llvm::isOneConstant(), llvm::APFloat::isPosZero(), llvm::isPowerOf2_64(), llvm::SelectionDAGISel::IsProfitableToFold(), llvm::MVT::isScalableVector(), llvm::isShiftedMask_64(), llvm::APFloat::isZero(), LLVM_DEBUG, llvm_unreachable, llvm::RISCVVType::LMUL_F2, llvm::RISCVVType::LMUL_F4, llvm::RISCVVType::LMUL_F8, llvm::Lo, llvm::ISD::LOAD, llvm::Log2_32(), llvm::M1(), llvm::RISCVVType::MASK_AGNOSTIC, llvm::MachineMemOperand::MONonTemporal, llvm::MONontemporalBit0, llvm::MONontemporalBit1, llvm::ISD::MUL, N, llvm::Offset, Opc, Operands, llvm::ISD::OR, P, llvm::ISD::POST_INC, llvm::ISD::PREFETCH, llvm::SelectionDAG::RemoveDeadNode(), llvm::SelectionDAGISel::ReplaceNode(), llvm::SelectionDAGISel::ReplaceUses(), llvm::report_fatal_error(), llvm::RISCVFPRndMode::RNE, llvm::RISCV::RVVBitsPerBlock, SelectAddrRegImm(), selectImm(), selectSF_VC_X_SE(), selectVLOp(), selectVLSEG(), selectVLSEGFF(), selectVLXSEG(), selectVSETVLI(), selectVSSEG(), selectVSXSEG(), llvm::MachineMemOperand::setFlags(), llvm::SelectionDAG::setNodeMemRefs(), llvm::ISD::SEXTLOAD, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND_INREG, llvm::MVT::SimpleTy, llvm::ISD::SRA, llvm::ISD::SRL, llvm::RISCVVType::TAIL_AGNOSTIC, llvm::SelectionDAGISel::TLI, llvm::SelectionDAGISel::TM, TRI, tryBitfieldInsertOpFromOrAndImm(), tryBitfieldInsertOpFromXor(), tryIndexedLoad(), tryShrinkShlLogicImm(), trySignedBitfieldExtract(), trySignedBitfieldInsertInMask(), trySignedBitfieldInsertInSign(), tryUnsignedBitfieldExtract(), tryUnsignedBitfieldInsertInZero(), X, and llvm::ISD::XOR.
Definition at line 2861 of file RISCVISelDAGToDAG.cpp.
References Addr, llvm::sampleprof::Base, llvm::SelectionDAGISel::CurDAG, llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetFrameIndex(), llvm::RISCVSubtarget::getXLenVT(), and llvm::Offset.
Referenced by SelectAddrRegImm(), SelectAddrRegImm9(), and SelectAddrRegImmLsb00000().
Definition at line 2954 of file RISCVISelDAGToDAG.cpp.
References llvm::ISD::ADD, Addr, assert(), llvm::sampleprof::Base, llvm::commonAlignment(), llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getMachineNode(), llvm::SelectionDAG::getSignedTargetConstant(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetFrameIndex(), llvm::SelectionDAG::getTargetGlobalAddress(), llvm::SDValue::getValueType(), llvm::SelectionDAG::isBaseWithConstantOffset(), isWorthFoldingAdd(), llvm::Offset, SelectAddrFrameIndex(), and selectConstantAddr().
Referenced by Select(), and SelectInlineAsmMemoryOperand().
Similar to SelectAddrRegImm, except that the offset is restricted to uimm9.
Definition at line 3046 of file RISCVISelDAGToDAG.cpp.
References Addr, llvm::sampleprof::Base, llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getSignedTargetConstant(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetFrameIndex(), llvm::SelectionDAG::isBaseWithConstantOffset(), llvm::Offset, and SelectAddrFrameIndex().
Similar to SelectAddrRegImm, except that the least significant 5 bits of Offset should be all zeros.
Definition at line 3073 of file RISCVISelDAGToDAG.cpp.
References llvm::ISD::ADD, Addr, assert(), llvm::sampleprof::Base, llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getMachineNode(), llvm::SelectionDAG::getSignedTargetConstant(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetFrameIndex(), llvm::SelectionDAG::isBaseWithConstantOffset(), llvm::Offset, SelectAddrFrameIndex(), and selectConstantAddr().
Definition at line 3297 of file RISCVISelDAGToDAG.cpp.
References llvm::ISD::ADD, Addr, llvm::sampleprof::Base, and llvm::Offset.
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Definition at line 57 of file RISCVISelDAGToDAG.h.
References Addr, llvm::sampleprof::Base, Index, and SelectAddrRegRegScale().
bool RISCVDAGToDAGISel::SelectAddrRegRegScale | ( | SDValue | Addr, |
unsigned | MaxShiftAmount, | ||
SDValue & | Base, | ||
SDValue & | Index, | ||
SDValue & | Scale | ||
) |
Definition at line 3195 of file RISCVISelDAGToDAG.cpp.
References llvm::ISD::ADD, Addr, llvm::sampleprof::Base, llvm::SelectionDAGISel::CurDAG, llvm::SelectionDAG::getMachineNode(), llvm::SelectionDAG::getTargetConstant(), isWorthFoldingIntoRegRegScale(), LHS, N, RHS, and llvm::ISD::SHL.
Referenced by SelectAddrRegRegScale(), and SelectAddrRegZextRegScale().
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Definition at line 67 of file RISCVISelDAGToDAG.h.
References Addr, llvm::sampleprof::Base, Index, and SelectAddrRegZextRegScale().
bool RISCVDAGToDAGISel::SelectAddrRegZextRegScale | ( | SDValue | Addr, |
unsigned | MaxShiftAmount, | ||
unsigned | Bits, | ||
SDValue & | Base, | ||
SDValue & | Index, | ||
SDValue & | Scale | ||
) |
Definition at line 3278 of file RISCVISelDAGToDAG.cpp.
References Addr, llvm::ISD::AND, llvm::sampleprof::Base, llvm::CallingConv::C, and SelectAddrRegRegScale().
Referenced by SelectAddrRegZextRegScale().
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SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint.
If this does not match or is not implemented, return true. The resultant operands (which will appear in the machine instruction) should be added to the OutOps vector.
Reimplemented from llvm::SelectionDAGISel.
Definition at line 2833 of file RISCVISelDAGToDAG.cpp.
References llvm::InlineAsm::A, assert(), llvm::SelectionDAGISel::CurDAG, llvm::InlineAsm::getMemConstraintName(), llvm::SelectionDAG::getTargetConstant(), llvm::RISCVSubtarget::getXLenVT(), llvm::InlineAsm::m, llvm::InlineAsm::o, llvm::report_fatal_error(), and SelectAddrRegImm().
Definition at line 3749 of file RISCVISelDAGToDAG.cpp.
References llvm::all_of(), llvm::ISD::AND, llvm::SelectionDAGISel::CurDAG, N, llvm::ISD::OR, selectImm(), and llvm::ISD::XOR.
Definition at line 4138 of file RISCVISelDAGToDAG.cpp.
References N, selectVSplat(), llvm::ISD::SIGN_EXTEND, and llvm::ISD::ZERO_EXTEND.
Definition at line 3723 of file RISCVISelDAGToDAG.cpp.
References llvm::ISD::ADD, llvm::all_of(), and N.
Referenced by selectVSplatImm64Neg().
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Definition at line 152 of file RISCVISelDAGToDAG.h.
References N, and selectRVVSimm5().
Definition at line 4200 of file RISCVISelDAGToDAG.cpp.
References llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, llvm::SelectionDAG::getSignedTargetConstant(), llvm::RISCVSubtarget::getXLenVT(), N, and llvm::SignExtend64().
Referenced by selectRVVSimm5().
Definition at line 4164 of file RISCVISelDAGToDAG.cpp.
References assert(), llvm::ISD::BITCAST, llvm::APFloat::bitcastToAPInt(), llvm::SelectionDAGISel::CurDAG, DL, llvm::APInt::getSExtValue(), llvm::SDNode::getSimpleValueType(), llvm::ConstantFPSDNode::getValueAPF(), llvm::RISCVSubtarget::getXLenVT(), llvm::RISCVSubtarget::is64Bit(), llvm::APFloat::isNegZero(), llvm::APFloat::isPosZero(), N, and selectImm().
bool RISCVDAGToDAGISel::selectSETCC | ( | SDValue | N, |
ISD::CondCode | ExpectedCCVal, | ||
SDValue & | Val | ||
) |
RISC-V doesn't have general instructions for integer setne/seteq, but we can check for equality with 0.
This function emits instructions that convert the seteq/setne into something that can be compared with 0. ExpectedCCVal
indicates the condition code to attempt to match (e.g. ISD::SETNE).
Definition at line 3387 of file RISCVISelDAGToDAG.cpp.
References assert(), llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getMachineNode(), llvm::SelectionDAG::getSignedTargetConstant(), llvm::SelectionDAG::getTargetConstant(), llvm::ISD::isIntEqualitySetCC(), llvm::isNullConstant(), llvm::isPowerOf2_64(), LHS, llvm::Log2_64(), N, RHS, and llvm::ISD::SETCC.
Referenced by selectSETEQ(), and selectSETNE().
Definition at line 98 of file RISCVISelDAGToDAG.h.
References N, selectSETCC(), and llvm::ISD::SETEQ.
Definition at line 95 of file RISCVISelDAGToDAG.h.
References N, selectSETCC(), and llvm::ISD::SETNE.
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Definition at line 103 of file RISCVISelDAGToDAG.h.
References N, and selectSExtBits().
Definition at line 3466 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAG::ComputeNumSignBits(), llvm::SelectionDAGISel::CurDAG, llvm::SDValue::getConstantOperandVal(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::MVT::getSizeInBits(), N, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND_INREG, and llvm::ISD::SRA.
Referenced by selectSExtBits().
void RISCVDAGToDAGISel::selectSF_VC_X_SE | ( | SDNode * | Node | ) |
Definition at line 982 of file RISCVISelDAGToDAG.cpp.
References assert(), llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getMachineNode(), llvm::SelectionDAG::getTargetConstant(), llvm::RISCVSubtarget::getXLenVT(), llvm::RISCVSubtarget::hasVInstructions(), llvm::ISD::INTRINSIC_VOID, llvm::Log2_32(), Operands, and llvm::SelectionDAGISel::ReplaceNode().
Referenced by Select().
Definition at line 3310 of file RISCVISelDAGToDAG.cpp.
References llvm::ISD::ADD, llvm::ISD::AND, assert(), llvm::SelectionDAG::computeKnownBits(), llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getAllOnesConstant(), llvm::APInt::getBitWidth(), llvm::SDValue::getConstantOperandAPInt(), llvm::SDValue::getConstantOperandVal(), llvm::SelectionDAG::getMachineNode(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SelectionDAG::getRegister(), llvm::SDValue::getValueType(), llvm::isPowerOf2_32(), llvm::APInt::isSubsetOf(), N, llvm::ISD::SUB, llvm::KnownBits::Zero, and llvm::ISD::ZERO_EXTEND.
Referenced by selectShiftMask32(), and selectShiftMaskXLen().
Definition at line 90 of file RISCVISelDAGToDAG.h.
References N, and selectShiftMask().
Definition at line 87 of file RISCVISelDAGToDAG.h.
References llvm::RISCVSubtarget::getXLen(), N, and selectShiftMask().
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Definition at line 117 of file RISCVISelDAGToDAG.h.
References N, and selectSHXADD_UWOp().
Look for various patterns that can be done with a SHL that can be folded into a SHXADD_UW.
ShAmt
contains 1, 2, or 3 and is set based on which SHXADD_UW we are trying to match.
Definition at line 3646 of file RISCVISelDAGToDAG.cpp.
References llvm::ISD::AND, llvm::countl_zero(), llvm::countr_zero(), llvm::SelectionDAGISel::CurDAG, DL, llvm::SDValue::getConstantOperandVal(), llvm::SelectionDAG::getMachineNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SelectionDAG::getTargetConstant(), llvm::SDValue::hasOneUse(), llvm::isShiftedMask_64(), N, and llvm::ISD::SHL.
Referenced by selectSHXADD_UWOp().
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Definition at line 112 of file RISCVISelDAGToDAG.h.
References N, and selectSHXADDOp().
Look for various patterns that can be done with a SHL that can be folded into a SHXADD.
ShAmt
contains 1, 2, or 3 and is set based on which SHXADD we are trying to match.
Definition at line 3516 of file RISCVISelDAGToDAG.cpp.
References llvm::ISD::AND, llvm::bit_width(), llvm::countr_zero(), llvm::SelectionDAGISel::CurDAG, DL, llvm::SDValue::getConstantOperandVal(), llvm::SelectionDAG::getMachineNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SelectionDAG::getTargetConstant(), llvm::RISCVSubtarget::getXLen(), llvm::SDValue::hasOneUse(), llvm::isShiftedMask_64(), N, llvm::ISD::SHL, llvm::ISD::SRA, and llvm::ISD::SRL.
Referenced by selectSHXADDOp().
Definition at line 3993 of file RISCVISelDAGToDAG.cpp.
References llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, llvm::SelectionDAG::getSignedTargetConstant(), llvm::SelectionDAG::getTargetConstant(), N, and llvm::Offset.
Definition at line 4014 of file RISCVISelDAGToDAG.cpp.
References llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, getReg(), llvm::SelectionDAG::getSignedTargetConstant(), llvm::SelectionDAG::getTargetConstant(), N, and llvm::RISCV::VLMaxSentinel.
Referenced by addVectorLoadStoreOperands(), and Select().
Definition at line 283 of file RISCVISelDAGToDAG.cpp.
References addVectorLoadStoreOperands(), llvm::SelectionDAGISel::CurDAG, DL, llvm::RISCVTargetLowering::getLMUL(), llvm::SelectionDAG::getMachineNode(), Operands, P, llvm::SelectionDAG::RemoveDeadNode(), llvm::SelectionDAGISel::ReplaceUses(), and llvm::SelectionDAG::setNodeMemRefs().
Referenced by Select().
Definition at line 311 of file RISCVISelDAGToDAG.cpp.
References addVectorLoadStoreOperands(), llvm::SelectionDAGISel::CurDAG, DL, llvm::RISCVTargetLowering::getLMUL(), llvm::SelectionDAG::getMachineNode(), llvm::RISCVSubtarget::getXLenVT(), Operands, P, llvm::SelectionDAG::RemoveDeadNode(), llvm::SelectionDAGISel::ReplaceUses(), and llvm::SelectionDAG::setNodeMemRefs().
Referenced by Select().
Definition at line 342 of file RISCVISelDAGToDAG.cpp.
References addVectorLoadStoreOperands(), assert(), llvm::SelectionDAGISel::CurDAG, llvm::RISCVVType::decodeVLMUL(), DL, llvm::RISCVTargetLowering::getLMUL(), llvm::SelectionDAG::getMachineNode(), llvm::MVT::getScalarSizeInBits(), llvm::MVT::getVectorMinNumElements(), llvm::RISCVSubtarget::is64Bit(), llvm::Log2_32(), Operands, P, llvm::SelectionDAG::RemoveDeadNode(), llvm::SelectionDAGISel::ReplaceUses(), llvm::report_fatal_error(), llvm::RISCV::RVVBitsPerBlock, and llvm::SelectionDAG::setNodeMemRefs().
Referenced by Select().
void RISCVDAGToDAGISel::selectVSETVLI | ( | SDNode * | Node | ) |
Definition at line 461 of file RISCVISelDAGToDAG.cpp.
References assert(), llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, llvm::RISCVVType::decodeVSEW(), DL, llvm::RISCVVType::encodeVTYPE(), llvm::SelectionDAG::getMachineNode(), llvm::RISCVSubtarget::getRealVLen(), llvm::SelectionDAG::getRegister(), llvm::RISCVVType::getSEWLMULRatio(), llvm::SelectionDAG::getTargetConstant(), llvm::RISCVSubtarget::getXLenVT(), llvm::RISCVSubtarget::hasVInstructions(), llvm::ISD::INTRINSIC_WO_CHAIN, llvm::isAllOnesConstant(), llvm::Offset, and llvm::SelectionDAGISel::ReplaceNode().
Referenced by Select().
Definition at line 4053 of file RISCVISelDAGToDAG.cpp.
References findVSplat(), N, and llvm::Splat.
Referenced by selectLow8BitsVSplat().
Definition at line 4133 of file RISCVISelDAGToDAG.cpp.
References findVSplat(), N, selectNegImm(), and llvm::Splat.
Definition at line 4097 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAGISel::CurDAG, N, and selectVSplatImmHelper().
Definition at line 4102 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAGISel::CurDAG, N, and selectVSplatImmHelper().
Definition at line 4109 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAGISel::CurDAG, N, and selectVSplatImmHelper().
Definition at line 4116 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAGISel::CurDAG, N, and selectVSplatImmHelper().
Definition at line 4126 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAGISel::CurDAG, llvm::isUIntN(), N, and selectVSplatImmHelper().
Referenced by selectVSplatUimmBits().
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Definition at line 139 of file RISCVISelDAGToDAG.h.
References N, and selectVSplatUimm().
Definition at line 390 of file RISCVISelDAGToDAG.cpp.
References addVectorLoadStoreOperands(), llvm::SelectionDAGISel::CurDAG, DL, llvm::RISCVTargetLowering::getLMUL(), llvm::SelectionDAG::getMachineNode(), Operands, P, llvm::SelectionDAGISel::ReplaceNode(), and llvm::SelectionDAG::setNodeMemRefs().
Referenced by Select().
Definition at line 415 of file RISCVISelDAGToDAG.cpp.
References addVectorLoadStoreOperands(), assert(), llvm::SelectionDAGISel::CurDAG, llvm::RISCVVType::decodeVLMUL(), DL, llvm::RISCVTargetLowering::getLMUL(), llvm::SelectionDAG::getMachineNode(), llvm::MVT::getScalarSizeInBits(), llvm::MVT::getVectorMinNumElements(), llvm::RISCVSubtarget::is64Bit(), llvm::Log2_32(), Operands, P, llvm::SelectionDAGISel::ReplaceNode(), llvm::report_fatal_error(), llvm::RISCV::RVVBitsPerBlock, and llvm::SelectionDAG::setNodeMemRefs().
Referenced by Select().
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inline |
Definition at line 107 of file RISCVISelDAGToDAG.h.
References N, and selectZExtBits().
Definition at line 3495 of file RISCVISelDAGToDAG.cpp.
References llvm::ISD::AND, llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, llvm::APInt::getBitsSetFrom(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::MaskedValueIsZero(), and N.
Referenced by selectZExtBits().
Definition at line 3700 of file RISCVISelDAGToDAG.cpp.
References llvm::ISD::ADD, N, llvm::ISD::OR, and orDisjoint().
Definition at line 718 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAG::computeKnownBits(), llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getMachineNode(), llvm::APInt::getSExtValue(), llvm::SelectionDAG::getSignedTargetConstant(), llvm::SelectionDAG::getTargetConstant(), llvm::APInt::isShiftedMask(), llvm::APInt::isSubsetOf(), llvm::PatternMatch::m_And(), llvm::MIPatternMatch::m_OneUse(), llvm::PatternMatch::m_Or(), llvm::PatternMatch::m_Value(), Opc, llvm::SelectionDAGISel::ReplaceNode(), selectImm(), and llvm::KnownBits::Zero.
Referenced by Select().
Definition at line 825 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getMachineNode(), llvm::APInt::getSExtValue(), llvm::SelectionDAG::getSignedTargetConstant(), llvm::SelectionDAG::getTargetConstant(), llvm::APInt::isShiftedMask(), llvm::PatternMatch::m_And(), llvm::PatternMatch::m_Deferred(), llvm::MIPatternMatch::m_OneUse(), llvm::PatternMatch::m_Value(), llvm::PatternMatch::m_Xor(), Opc, llvm::SelectionDAGISel::ReplaceNode(), selectImm(), and X.
Referenced by Select().
Definition at line 913 of file RISCVISelDAGToDAG.cpp.
References assert(), llvm::CallingConv::C, llvm::SelectionDAGISel::CurDAG, llvm::LSBaseSDNode::getAddressingMode(), llvm::LoadSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::LoadSDNode::getExtensionType(), llvm::SelectionDAG::getMachineNode(), llvm::MemSDNode::getMemoryVT(), llvm::LoadSDNode::getOffset(), llvm::SelectionDAG::getSignedTargetConstant(), llvm::SelectionDAG::getTargetConstant(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::Offset, llvm::ISD::POST_INC, llvm::ISD::PRE_INC, llvm::SelectionDAGISel::ReplaceNode(), llvm::SelectionDAG::setNodeMemRefs(), llvm::ISD::UNINDEXED, and llvm::ISD::ZEXTLOAD.
Referenced by Select().
Definition at line 519 of file RISCVISelDAGToDAG.cpp.
References llvm::ISD::AND, assert(), llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getMachineNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::ConstantSDNode::getSExtValue(), llvm::SelectionDAG::getSignedTargetConstant(), llvm::SelectionDAG::getTargetConstant(), llvm::ConstantSDNode::getZExtValue(), llvm::SDValue::hasOneUse(), llvm_unreachable, llvm::ISD::OR, llvm::SelectionDAGISel::ReplaceNode(), llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND_INREG, and llvm::ISD::XOR.
Referenced by Select().
Definition at line 597 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getMachineNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetConstant(), llvm::SDValue::hasOneUse(), Opc, llvm::SelectionDAGISel::ReplaceNode(), llvm::ISD::SHL, and llvm::ISD::SIGN_EXTEND_INREG.
Referenced by Select().
Definition at line 680 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getMachineNode(), llvm::SelectionDAG::getSignedTargetConstant(), llvm::SelectionDAG::getTargetConstant(), llvm::APInt::isShiftedMask(), llvm::APInt::isSignedIntN(), llvm::MIPatternMatch::m_OneUse(), llvm::PatternMatch::m_Or(), llvm::PatternMatch::m_Value(), llvm::SelectionDAGISel::ReplaceNode(), and X.
Referenced by Select().
Definition at line 769 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getMachineNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetConstant(), llvm::SDValue::hasOneUse(), Opc, llvm::SelectionDAGISel::ReplaceNode(), and llvm::ISD::SHL.
Referenced by Select().
bool RISCVDAGToDAGISel::tryUnsignedBitfieldExtract | ( | SDNode * | Node, |
const SDLoc & | DL, | ||
MVT | VT, | ||
SDValue | X, | ||
unsigned | Msb, | ||
unsigned | Lsb | ||
) |
Definition at line 865 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getMachineNode(), llvm::SelectionDAG::getTargetConstant(), Opc, llvm::SelectionDAGISel::ReplaceNode(), and X.
Referenced by Select().
bool RISCVDAGToDAGISel::tryUnsignedBitfieldInsertInZero | ( | SDNode * | Node, |
const SDLoc & | DL, | ||
MVT | VT, | ||
SDValue | X, | ||
unsigned | Msb, | ||
unsigned | Lsb | ||
) |
Definition at line 893 of file RISCVISelDAGToDAG.cpp.
References llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getMachineNode(), llvm::SelectionDAG::getTargetConstant(), Opc, llvm::SelectionDAGISel::ReplaceNode(), and X.
Referenced by Select().