16 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H 17 #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H 36 class ScalarEvolution;
53 enum MemIntrinsicType {
54 VECTOR_LDST_TWO_ELEMENTS,
55 VECTOR_LDST_THREE_ELEMENTS,
56 VECTOR_LDST_FOUR_ELEMENTS
59 bool isWideningInstruction(
Type *Ty,
unsigned Opcode,
65 TLI(ST->getTargetLowering()) {}
91 bool Vector = (ClassID == 1);
106 return std::max(ST->getMinSVEVectorSizeInBits(), 128u);
115 return ST->getMinVectorRegisterBitWidth();
127 const Value *Ptr,
bool VariableMask,
143 unsigned Opcode,
Type *Ty,
160 bool IsZeroCmp)
const;
182 if (!isa<ScalableVectorType>(
DataType) || !ST->hasSVE())
185 Type *Ty = cast<ScalableVectorType>(
DataType)->getElementType();
216 if (
auto *DataTypeVTy = dyn_cast<VectorType>(
DataType)) {
217 unsigned NumElements =
218 cast<FixedVectorType>(DataTypeVTy)->getNumElements();
219 unsigned EltSize = DataTypeVTy->getElementType()->getScalarSizeInBits();
220 return NumElements > 1 &&
isPowerOf2_64(NumElements) && EltSize >= 8 &&
230 bool UseMaskForCond =
false,
bool UseMaskForGaps =
false);
234 bool &AllowPromotionWithoutCommonHeader);
258 #endif // LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H int getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
Optional< unsigned > getMaxVScale() const
Optional< unsigned > getMaxVScale() const
This class represents lattice values for constants.
unsigned getMinVectorRegisterBitWidth()
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth)
static constexpr unsigned SVEBitsPerBlock
The main scalar evolution driver.
int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
unsigned getRegisterBitWidth(bool Vector) const
Base class which can be used to help build a TTI implementation.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
unsigned getMaxInterleaveFactor(unsigned VF)
bool isLegalNTStore(Type *DataType, Align Alignment)
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP)
int getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index)
int getAddressComputationCost(Type *Ty, ScalarEvolution *SE, const SCEV *Ptr)
int getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
bool enableInterleavedAccessVectorization()
int getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp, int Index, VectorType *SubTp)
int getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, bool IsPairwiseForm, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput)
int getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, TTI::OperandValueKind Opd1Info=TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info=TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo=TTI::OP_None, TTI::OperandValueProperties Opd2PropInfo=TTI::OP_None, ArrayRef< const Value * > Args=ArrayRef< const Value * >(), const Instruction *CxtI=nullptr)
bool isIntegerTy() const
True if this is an instance of IntegerType.
bool useNeonVector(const Type *Ty) const
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
unsigned getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
int getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr)
Analysis containing CSE Info
bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info)
bool isFloatTy() const
Return true if this is 'float', a 32-bit IEEE fp type.
bool useReductionIntrinsic(unsigned Opcode, Type *Ty, TTI::ReductionFlags Flags) const
unsigned getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
Value * getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, Type *ExpectedType)
int getIntImmCost(int64_t Val)
Calculate the cost of materializing a 64-bit value.
The instances of the Type class are immutable: once they are created, they are never changed.
int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index)
bool isPointerTy() const
True if this is an instance of PointerType.
bool shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader)
See if I should be considered for address type promotion.
bool isLegalMaskedStore(Type *DataType, Align Alignment)
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
bool isHalfTy() const
Return true if this is 'half', a 16-bit IEEE fp type.
This file provides a helper that implements much of the TTI interface in terms of the target-independ...
TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const
bool shouldExpandReduction(const IntrinsicInst *II) const
bool supportsScalableVectors() const
bool isLegalMaskedLoad(Type *DataType, Align Alignment)
AArch64TTIImpl(const AArch64TargetMachine *TM, const Function &F)
This struct is a compact representation of a valid (non-zero power of two) alignment.
Align max(MaybeAlign Lhs, Align Rhs)
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
bool areInlineCompatible(const Function *Caller, const Function *Callee) const
unsigned getNumberOfRegisters(unsigned ClassID) const
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP)
Base class of all SIMD vector types.
Class for arbitrary precision integers.
bool isBFloatTy() const
Return true if this is 'bfloat', a 16-bit bfloat type.
unsigned getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind)
unsigned getGISelRematGlobalCost() const
This class represents an analyzed expression in the program.
int getCostOfKeepingLiveOverCall(ArrayRef< Type * > Tys)
Represents a single loop in the control flow graph.
LLVM Value Representation.
int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, bool UseMaskForCond=false, bool UseMaskForGaps=false)
static const Function * getParent(const Value *V)
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
bool isLegalMaskedLoadStore(Type *DataType, Align Alignment)
bool isDoubleTy() const
Return true if this is 'double', a 64-bit IEEE fp type.
static constexpr unsigned SVEMaxBitsPerVector
Information about a load/store intrinsic defined by the target.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
A wrapper class for inspecting calls to intrinsic functions.