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AArch64TargetTransformInfo.h
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1 //===- AArch64TargetTransformInfo.h - AArch64 specific TTI ------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// AArch64 target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15 
16 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
18 
19 #include "AArch64.h"
20 #include "AArch64Subtarget.h"
21 #include "AArch64TargetMachine.h"
22 #include "llvm/ADT/ArrayRef.h"
25 #include "llvm/IR/Function.h"
26 #include "llvm/IR/Intrinsics.h"
27 #include <cstdint>
28 
29 namespace llvm {
30 
31 class APInt;
32 class Instruction;
33 class IntrinsicInst;
34 class Loop;
35 class SCEV;
36 class ScalarEvolution;
37 class Type;
38 class Value;
39 class VectorType;
40 
41 class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
43  using TTI = TargetTransformInfo;
44 
45  friend BaseT;
46 
47  const AArch64Subtarget *ST;
48  const AArch64TargetLowering *TLI;
49 
50  const AArch64Subtarget *getST() const { return ST; }
51  const AArch64TargetLowering *getTLI() const { return TLI; }
52 
53  enum MemIntrinsicType {
54  VECTOR_LDST_TWO_ELEMENTS,
55  VECTOR_LDST_THREE_ELEMENTS,
56  VECTOR_LDST_FOUR_ELEMENTS
57  };
58 
59  bool isWideningInstruction(Type *Ty, unsigned Opcode,
61 
62 public:
63  explicit AArch64TTIImpl(const AArch64TargetMachine *TM, const Function &F)
64  : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
65  TLI(ST->getTargetLowering()) {}
66 
67  bool areInlineCompatible(const Function *Caller,
68  const Function *Callee) const;
69 
70  /// \name Scalar TTI Implementations
71  /// @{
72 
74  int getIntImmCost(int64_t Val);
75  int getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind);
76  int getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm,
78  Instruction *Inst = nullptr);
79  int getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
81  TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
82 
83  /// @}
84 
85  /// \name Vector TTI Implementations
86  /// @{
87 
88  bool enableInterleavedAccessVectorization() { return true; }
89 
90  unsigned getNumberOfRegisters(unsigned ClassID) const {
91  bool Vector = (ClassID == 1);
92  if (Vector) {
93  if (ST->hasNEON())
94  return 32;
95  return 0;
96  }
97  return 31;
98  }
99 
102 
103  unsigned getRegisterBitWidth(bool Vector) const {
104  if (Vector) {
105  if (ST->hasSVE())
106  return std::max(ST->getMinSVEVectorSizeInBits(), 128u);
107  if (ST->hasNEON())
108  return 128;
109  return 0;
110  }
111  return 64;
112  }
113 
115  return ST->getMinVectorRegisterBitWidth();
116  }
117 
119  if (ST->hasSVE())
121  return BaseT::getMaxVScale();
122  }
123 
124  unsigned getMaxInterleaveFactor(unsigned VF);
125 
126  unsigned getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
127  const Value *Ptr, bool VariableMask,
129  const Instruction *I = nullptr);
130 
131  int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
133  const Instruction *I = nullptr);
134 
135  int getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
136  unsigned Index);
137 
138  unsigned getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind);
139 
140  int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
141 
143  unsigned Opcode, Type *Ty,
150  const Instruction *CxtI = nullptr);
151 
152  int getAddressComputationCost(Type *Ty, ScalarEvolution *SE, const SCEV *Ptr);
153 
154  int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
155  CmpInst::Predicate VecPred,
157  const Instruction *I = nullptr);
158 
160  bool IsZeroCmp) const;
161  bool useNeonVector(const Type *Ty) const;
162 
163  int getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment,
164  unsigned AddressSpace,
166  const Instruction *I = nullptr);
167 
169 
172 
175 
177  Type *ExpectedType);
178 
180 
182  if (!isa<ScalableVectorType>(DataType) || !ST->hasSVE())
183  return false;
184 
185  Type *Ty = cast<ScalableVectorType>(DataType)->getElementType();
186  if (Ty->isPointerTy())
187  return true;
188 
189  if (Ty->isBFloatTy() || Ty->isHalfTy() ||
190  Ty->isFloatTy() || Ty->isDoubleTy())
191  return true;
192 
193  if (Ty->isIntegerTy(8) || Ty->isIntegerTy(16) ||
194  Ty->isIntegerTy(32) || Ty->isIntegerTy(64))
195  return true;
196 
197  return false;
198  }
199 
200  bool isLegalMaskedLoad(Type *DataType, Align Alignment) {
201  return isLegalMaskedLoadStore(DataType, Alignment);
202  }
203 
204  bool isLegalMaskedStore(Type *DataType, Align Alignment) {
205  return isLegalMaskedLoadStore(DataType, Alignment);
206  }
207 
208  bool isLegalNTStore(Type *DataType, Align Alignment) {
209  // NOTE: The logic below is mostly geared towards LV, which calls it with
210  // vectors with 2 elements. We might want to improve that, if other
211  // users show up.
212  // Nontemporal vector stores can be directly lowered to STNP, if the vector
213  // can be halved so that each half fits into a register. That's the case if
214  // the element type fits into a register and the number of elements is a
215  // power of 2 > 1.
216  if (auto *DataTypeVTy = dyn_cast<VectorType>(DataType)) {
217  unsigned NumElements =
218  cast<FixedVectorType>(DataTypeVTy)->getNumElements();
219  unsigned EltSize = DataTypeVTy->getElementType()->getScalarSizeInBits();
220  return NumElements > 1 && isPowerOf2_64(NumElements) && EltSize >= 8 &&
221  EltSize <= 128 && isPowerOf2_64(EltSize);
222  }
223  return BaseT::isLegalNTStore(DataType, Alignment);
224  }
225 
227  unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
228  Align Alignment, unsigned AddressSpace,
230  bool UseMaskForCond = false, bool UseMaskForGaps = false);
231 
232  bool
234  bool &AllowPromotionWithoutCommonHeader);
235 
236  bool shouldExpandReduction(const IntrinsicInst *II) const { return false; }
237 
238  unsigned getGISelRematGlobalCost() const {
239  return 2;
240  }
241 
242  bool supportsScalableVectors() const { return ST->hasSVE(); }
243 
244  bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
245  TTI::ReductionFlags Flags) const;
246 
247  int getArithmeticReductionCost(unsigned Opcode, VectorType *Ty,
248  bool IsPairwiseForm,
250 
252  VectorType *SubTp);
253  /// @}
254 };
255 
256 } // end namespace llvm
257 
258 #endif // LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
int getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
CastContextHint
Represents a hint about the context in which a cast is used.
Optional< unsigned > getMaxVScale() const
Definition: BasicTTIImpl.h:574
Optional< unsigned > getMaxVScale() const
This class represents lattice values for constants.
Definition: AllocatorList.h:23
bool isLegalNTStore(Type *DataType, Align Alignment) const
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth)
static constexpr unsigned SVEBitsPerBlock
The main scalar evolution driver.
int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
unsigned getRegisterBitWidth(bool Vector) const
F(f)
Base class which can be used to help build a TTI implementation.
Definition: BasicTTIImpl.h:75
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:722
unsigned getMaxInterleaveFactor(unsigned VF)
bool isLegalNTStore(Type *DataType, Align Alignment)
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP)
int getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index)
int getAddressComputationCost(Type *Ty, ScalarEvolution *SE, const SCEV *Ptr)
int getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
unsigned getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const
int getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp, int Index, VectorType *SubTp)
int getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, bool IsPairwiseForm, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput)
int getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, TTI::OperandValueKind Opd1Info=TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info=TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo=TTI::OP_None, TTI::OperandValueProperties Opd2PropInfo=TTI::OP_None, ArrayRef< const Value * > Args=ArrayRef< const Value * >(), const Instruction *CxtI=nullptr)
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:202
PopcntSupportKind
Flags indicating the kind of support for population count.
bool useNeonVector(const Type *Ty) const
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
unsigned getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
int getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr)
Analysis containing CSE Info
Definition: CSEInfo.cpp:25
The weighted sum of size and latency.
bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info)
bool isFloatTy() const
Return true if this is 'float', a 32-bit IEEE fp type.
Definition: Type.h:148
bool useReductionIntrinsic(unsigned Opcode, Type *Ty, TTI::ReductionFlags Flags) const
unsigned getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
Returns options for expansion of memcmp. IsZeroCmp is.
Value * getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, Type *ExpectedType)
int getIntImmCost(int64_t Val)
Calculate the cost of materializing a 64-bit value.
Flags describing the kind of vector reduction.
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:46
int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index)
bool isPointerTy() const
True if this is an instance of PointerType.
Definition: Type.h:229
bool shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader)
See if I should be considered for address type promotion.
bool isLegalMaskedStore(Type *DataType, Align Alignment)
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
Definition: MathExtras.h:497
bool isHalfTy() const
Return true if this is 'half', a 16-bit IEEE fp type.
Definition: Type.h:142
This file provides a helper that implements much of the TTI interface in terms of the target-independ...
TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const
bool shouldExpandReduction(const IntrinsicInst *II) const
bool isLegalMaskedLoad(Type *DataType, Align Alignment)
AArch64TTIImpl(const AArch64TargetMachine *TM, const Function &F)
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
OperandValueProperties
Additional properties of an operand's values.
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:350
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
Definition: Alignment.h:119
bool areInlineCompatible(const Function *Caller, const Function *Callee) const
AddressSpace
Definition: NVPTXBaseInfo.h:21
uint32_t Index
unsigned getNumberOfRegisters(unsigned ClassID) const
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP)
Base class of all SIMD vector types.
Definition: DerivedTypes.h:388
Class for arbitrary precision integers.
Definition: APInt.h:70
bool isBFloatTy() const
Return true if this is 'bfloat', a 16-bit bfloat type.
Definition: Type.h:145
unsigned getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind)
unsigned getGISelRematGlobalCost() const
This class represents an analyzed expression in the program.
int getCostOfKeepingLiveOverCall(ArrayRef< Type * > Tys)
Represents a single loop in the control flow graph.
Definition: LoopInfo.h:529
Parameters that control the generic loop unrolling transformation.
#define I(x, y, z)
Definition: MD5.cpp:59
LLVM Value Representation.
Definition: Value.h:75
int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, bool UseMaskForCond=false, bool UseMaskForGaps=false)
static const Function * getParent(const Value *V)
const DataLayout & getDataLayout() const
OperandValueKind
Additional information about an operand's possible values.
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
This pass exposes codegen information to IR-level passes.
TargetCostKind
The kind of cost model.
bool isLegalMaskedLoadStore(Type *DataType, Align Alignment)
bool isDoubleTy() const
Return true if this is 'double', a 64-bit IEEE fp type.
Definition: Type.h:151
static constexpr unsigned SVEMaxBitsPerVector
Information about a load/store intrinsic defined by the target.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:44
ShuffleKind
The various kinds of shuffle patterns for vector queries.