LLVM 18.0.0git
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#include "Target/AArch64/AArch64Subtarget.h"
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enum | ARMProcFamilyEnum : uint8_t { Others , A64FX , Ampere1 , Ampere1A , AppleA7 , AppleA10 , AppleA11 , AppleA12 , AppleA13 , AppleA14 , AppleA15 , AppleA16 , AppleA17 , Carmel , CortexA35 , CortexA53 , CortexA55 , CortexA510 , CortexA520 , CortexA57 , CortexA65 , CortexA72 , CortexA73 , CortexA75 , CortexA76 , CortexA77 , CortexA78 , CortexA78C , CortexA710 , CortexA715 , CortexA720 , CortexR82 , CortexX1 , CortexX1C , CortexX2 , CortexX3 , CortexX4 , ExynosM3 , Falkor , Kryo , NeoverseE1 , NeoverseN1 , NeoverseN2 , Neoverse512TVB , NeoverseV1 , NeoverseV2 , Saphira , ThunderX2T99 , ThunderX , ThunderXT81 , ThunderXT83 , ThunderXT88 , ThunderX3T110 , TSV110 } |
Definition at line 38 of file AArch64Subtarget.h.
enum llvm::AArch64Subtarget::ARMProcFamilyEnum : uint8_t |
Definition at line 40 of file AArch64Subtarget.h.
AArch64Subtarget::AArch64Subtarget | ( | const Triple & | TT, |
StringRef | CPU, | ||
StringRef | TuneCPU, | ||
StringRef | FS, | ||
const TargetMachine & | TM, | ||
bool | LittleEndian, | ||
unsigned | MinSVEVectorSizeInBitsOverride = 0 , |
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unsigned | MaxSVEVectorSizeInBitsOverride = 0 , |
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bool | StreamingSVEMode = false , |
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bool | StreamingCompatibleSVEMode = false , |
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bool | HasMinSize = false |
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This constructor initializes the data members to match that of the specified triple.
Definition at line 310 of file AArch64Subtarget.cpp.
References CallLoweringInfo, llvm::StringMap< ValueTy, AllocatorTy >::count(), llvm::createAArch64InstructionSelector(), getRegisterInfo(), getTargetLowering(), InlineAsmLoweringInfo, llvm::StringSet< AllocatorTy >::insert(), InstSelector, llvm::AArch64::isX18ReservedByDefault(), RegBankInfo, ReservedRegsForRA, ReserveXRegister, ReserveXRegisterForRA, llvm::BitVector::set(), TM, and TRI.
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Definition at line 312 of file AArch64Subtarget.h.
References isTargetILP32(), and useAA().
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This function is design to compatible with the function def in other targets and escape build error about the virtual function def in base class TargetSubtargetInfo.
Updeate me if AArch64 target need to use it.
Definition at line 346 of file AArch64Subtarget.h.
unsigned AArch64Subtarget::classifyGlobalFunctionReference | ( | const GlobalValue * | GV, |
const TargetMachine & | TM | ||
) | const |
Definition at line 427 of file AArch64Subtarget.cpp.
References ClassifyGlobalReference(), F, llvm::GlobalValue::getParent(), getTargetTriple(), llvm::GlobalValue::getValueType(), llvm::GlobalValue::hasDLLImportStorageClass(), llvm::GlobalValue::hasInternalLinkage(), llvm::Type::isFunctionTy(), isTargetMachO(), isWindowsArm64EC(), llvm::CodeModel::Large, llvm::AArch64II::MO_DLLIMPORT, llvm::AArch64II::MO_GOT, llvm::AArch64II::MO_NO_FLAG, TM, and UseNonLazyBind.
unsigned AArch64Subtarget::ClassifyGlobalReference | ( | const GlobalValue * | GV, |
const TargetMachine & | TM | ||
) | const |
ClassifyGlobalReference - Find the target operand flags that describe how a global value should be referenced for the current subtarget.
Find the target operand flags that describe how a global value should be referenced for the current subtarget.
Definition at line 385 of file AArch64Subtarget.cpp.
References llvm::GlobalValue::getParent(), getTargetTriple(), llvm::GlobalValue::getValueType(), llvm::GlobalValue::hasDLLImportStorageClass(), llvm::GlobalValue::hasExternalWeakLinkage(), llvm::Type::isFunctionTy(), llvm::GlobalValue::isTagged(), isTargetMachO(), isWindowsArm64EC(), llvm::CodeModel::Large, llvm::AArch64II::MO_COFFSTUB, llvm::AArch64II::MO_DLLIMPORT, llvm::AArch64II::MO_DLLIMPORTAUX, llvm::AArch64II::MO_GOT, llvm::AArch64II::MO_NC, llvm::AArch64II::MO_NO_FLAG, llvm::AArch64II::MO_TAGGED, llvm::CodeModel::Tiny, TM, and useSmallAddressing().
Referenced by classifyGlobalFunctionReference(), llvm::AArch64InstrInfo::expandPostRAPseudo(), and performGlobalAddressCombine().
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Definition at line 468 of file AArch64Subtarget.cpp.
References EnableEarlyIfConvert.
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Definition at line 201 of file AArch64Subtarget.h.
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Definition at line 202 of file AArch64Subtarget.h.
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Definition at line 449 of file AArch64Subtarget.h.
AArch64PAuth::AuthCheckMethod AArch64Subtarget::getAuthenticatedLRCheckMethod | ( | ) | const |
Choose a method of checking LR before performing a tail call.
Definition at line 530 of file AArch64Subtarget.cpp.
References AuthenticatedLRCheckMethod, and llvm::AArch64PAuth::None.
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Definition at line 262 of file AArch64Subtarget.h.
References CacheLineSize.
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Definition at line 362 of file AArch64Subtarget.cpp.
References CallLoweringInfo.
Definition at line 434 of file AArch64Subtarget.h.
References isWindowsArm64EC().
Referenced by llvm::AArch64FrameLowering::emitPrologue().
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Definition at line 486 of file AArch64Subtarget.cpp.
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Definition at line 185 of file AArch64Subtarget.h.
References FrameLowering.
Referenced by llvm::AArch64FunctionInfo::AArch64FunctionInfo().
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Definition at line 366 of file AArch64Subtarget.cpp.
References InlineAsmLoweringInfo.
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Definition at line 191 of file AArch64Subtarget.h.
References InstrInfo.
Referenced by llvm::AArch64PAuth::checkAuthenticatedRegister(), emitDefineCFAWithFP(), llvm::AArch64TargetLowering::EmitF128CSEL(), llvm::AArch64TargetLowering::EmitFill(), llvm::AArch64TargetLowering::EmitInstrWithCustomInserter(), llvm::AArch64FrameLowering::emitPrologue(), llvm::AArch64TargetLowering::EmitTileLoad(), llvm::AArch64TargetLowering::EmitZAInstr(), llvm::AArch64TargetLowering::EmitZero(), llvm::AArch64TargetLowering::EmitZTInstr(), getRegisterInfo(), llvm::AArch64TargetLowering::insertCopiesSplitCSR(), llvm::AArch64TargetLowering::isLegalAddressingMode(), and llvm::AArch64CallLowering::lowerCall().
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Definition at line 370 of file AArch64Subtarget.cpp.
References InstSelector.
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Definition at line 374 of file AArch64Subtarget.cpp.
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Definition at line 278 of file AArch64Subtarget.h.
References MaxBytesForLoopAlignment.
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().
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Definition at line 282 of file AArch64Subtarget.h.
References MaxJumpTableSize.
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().
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Definition at line 260 of file AArch64Subtarget.h.
References MaxInterleaveFactor.
Referenced by llvm::AArch64TTIImpl::getMaxInterleaveFactor().
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Definition at line 270 of file AArch64Subtarget.h.
References MaxPrefetchIterationsAhead.
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Definition at line 401 of file AArch64Subtarget.h.
References assert(), hasSVEorSME(), and MaxSVEVectorSizeInBits.
Referenced by findMoreOptimalIndexType(), llvm::AArch64TargetLowering::lowerInterleavedLoad(), and llvm::AArch64TargetLowering::lowerInterleavedStore().
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Definition at line 283 of file AArch64Subtarget.h.
References MinimumJumpTableEntries.
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Definition at line 264 of file AArch64Subtarget.h.
References MinPrefetchStride.
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Definition at line 407 of file AArch64Subtarget.h.
References assert(), hasSVEorSME(), and MinSVEVectorSizeInBits.
Referenced by llvm::AArch64TargetLowering::getNumInterleavedAccesses(), getPredicateForFixedLengthVector(), llvm::AArch64TTIImpl::getRegisterBitWidth(), isAllActivePredicate(), llvm::AArch64TargetLowering::isLegalInterleavedAccessType(), llvm::AArch64TargetLowering::lowerInterleavedLoad(), llvm::AArch64TargetLowering::lowerInterleavedStore(), optimizeWhile(), performFPExtendCombine(), performMSTORECombine(), performSTORECombine(), performUnpackCombine(), useSVEForFixedLengthVectors(), and llvm::AArch64TargetLowering::useSVEForFixedLengthVectorVT().
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Definition at line 230 of file AArch64Subtarget.h.
References isNeonAvailable(), isSVEAvailable(), and MinVectorRegisterBitWidth.
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Definition at line 242 of file AArch64Subtarget.h.
References llvm::BitVector::count(), ReserveXRegister, and ReserveXRegisterForRA.
Referenced by llvm::AArch64RegisterInfo::getRegPressureLimit().
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Definition at line 263 of file AArch64Subtarget.h.
References PrefetchDistance.
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Definition at line 273 of file AArch64Subtarget.h.
References PrefFunctionAlignment.
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().
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Definition at line 276 of file AArch64Subtarget.h.
References PrefLoopAlignment.
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().
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Returns ARM processor family.
Avoid this function! CPU specifics should be kept local to this class and preferably modeled with SubtargetFeatures or properties in initializeProperties().
Definition at line 208 of file AArch64Subtarget.h.
References ARMProcFamily.
Referenced by llvm::AArch64TargetLowering::getTargetMMOFlags(), and llvm::AArch64TTIImpl::getUnrollingPreferences().
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Definition at line 378 of file AArch64Subtarget.cpp.
References RegBankInfo.
Referenced by llvm::AArch64CallLowering::lowerCall().
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Definition at line 192 of file AArch64Subtarget.h.
References getInstrInfo(), and llvm::AArch64InstrInfo::getRegisterInfo().
Referenced by AArch64Subtarget(), llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64InstrInfo::buildClearRegister(), llvm::AArch64FrameLowering::canUseAsPrologue(), llvm::AArch64TargetLowering::changeStreamingMode(), emitDefineCFAWithFP(), llvm::AArch64FrameLowering::emitPrologue(), llvm::AArch64InstrInfo::expandPostRAPseudo(), findScratchNonCalleeSaveRegister(), llvm::AArch64TargetLowering::insertCopiesSplitCSR(), InsertSEH(), and llvm::AArch64CallLowering::lowerCall().
Definition at line 440 of file AArch64Subtarget.h.
References isWindowsArm64EC().
Referenced by llvm::AArch64TargetLowering::getSSPStackGuardCheck(), and llvm::AArch64TargetLowering::insertSSPDeclarations().
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Definition at line 182 of file AArch64Subtarget.h.
References TSInfo.
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Definition at line 430 of file AArch64Subtarget.h.
References DefaultSVETFOpts.
Referenced by llvm::AArch64TTIImpl::preferPredicateOverEpilogue().
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Definition at line 188 of file AArch64Subtarget.h.
References TLInfo.
Referenced by AArch64Subtarget(), llvm::AArch64FrameLowering::canUseAsPrologue(), llvm::AArch64FrameLowering::canUseRedZone(), finishStackBlock(), llvm::AArch64RegisterInfo::getCalleeSavedRegs(), llvm::AArch64RegisterInfo::getCallPreservedMask(), llvm::AArch64RegisterInfo::getDarwinCalleeSavedRegs(), llvm::AArch64RegisterInfo::getDarwinCallPreservedMask(), and produceCompactUnwindFrame().
Definition at line 200 of file AArch64Subtarget.h.
References TargetTriple.
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), classifyGlobalFunctionReference(), ClassifyGlobalReference(), llvm::AArch64FrameLowering::emitPrologue(), llvm::AArch64TargetLowering::getSDagStackGuard(), llvm::AArch64TargetLowering::getSSPStackGuardCheck(), llvm::AArch64TargetLowering::insertSSPDeclarations(), llvm::AArch64TargetLowering::shouldInsertTrailingFenceForAtomicStore(), ShouldSignWithBKey(), and swiftAsyncContextIsDynamicallySet().
unsigned AArch64Subtarget::getVectorInsertExtractBaseCost | ( | ) | const |
Definition at line 84 of file AArch64Subtarget.cpp.
References OverrideVectorInsertExtractBaseCost, and VectorInsertExtractBaseCost.
Referenced by llvm::AArch64TTIImpl::getScalarizationOverhead().
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Definition at line 428 of file AArch64Subtarget.h.
References VScaleForTuning.
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Definition at line 251 of file AArch64Subtarget.h.
References llvm::BitVector::any(), and CustomCallSavedXRegs.
Referenced by llvm::AArch64CallLowering::lowerCall().
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Return true if the CPU supports any kind of instruction fusion.
Definition at line 254 of file AArch64Subtarget.h.
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Definition at line 396 of file AArch64Subtarget.h.
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64InstrInfo::copyPhysReg(), llvm::AArch64TTIImpl::getCastInstrCost(), getMaxSVEVectorSizeInBits(), getMinSVEVectorSizeInBits(), llvm::AArch64TargetLowering::isLegalInterleavedAccessType(), llvm::AArch64InstrInfo::loadRegFromStackSlot(), llvm::AArch64TargetLowering::shouldExpandCttzElements(), llvm::AArch64InstrInfo::storeRegToStackSlot(), useSVEForFixedLengthVectors(), and llvm::AArch64TargetLowering::useSVEForFixedLengthVectorVT().
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Definition at line 357 of file AArch64Subtarget.h.
References llvm::CallingConv::C, CC, llvm::CallingConv::Fast, isTargetWindows(), llvm::CallingConv::Swift, and llvm::CallingConv::Win64.
Referenced by analyzeCallOperands(), llvm::AArch64FrameLowering::emitPrologue(), and llvm::AArch64RegisterInfo::isArgumentRegister().
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Definition at line 291 of file AArch64Subtarget.h.
References IsLittle.
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64TargetLowering::optimizeExtendOrTruncateConversion(), and performLOADCombine().
bool AArch64Subtarget::isNeonAvailable | ( | ) | const |
Returns true if the target has NEON and the function at runtime is known to have NEON enabled (e.g.
the function is known not to be in streaming-SVE mode, which disables NEON instructions).
Definition at line 506 of file AArch64Subtarget.cpp.
References isStreaming(), and isStreamingCompatible().
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64InstrInfo::copyPhysReg(), getMinVectorRegisterBitWidth(), llvm::AArch64TTIImpl::getRegisterBitWidth(), llvm::AArch64TargetLowering::isLegalInterleavedAccessType(), llvm::AArch64TargetLowering::isShuffleMaskLegal(), llvm::AArch64TargetLowering::LowerOperation(), performFpToIntCombine(), performIntToFpCombine(), llvm::AArch64TTIImpl::shouldMaximizeVectorBandwidth(), tryAdvSIMDModImm16(), tryAdvSIMDModImm32(), tryCombineToBSL(), and useSVEForFixedLengthVectors().
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Returns true if the function has a streaming body.
Definition at line 215 of file AArch64Subtarget.h.
References StreamingSVEMode.
Referenced by isNeonAvailable(), and isSVEAvailable().
bool AArch64Subtarget::isStreamingCompatible | ( | ) | const |
Returns true if the function has a streaming-compatible body.
Definition at line 502 of file AArch64Subtarget.cpp.
References ForceStreamingCompatibleSVE, and StreamingCompatibleSVEMode.
Referenced by isNeonAvailable(), and isSVEAvailable().
bool AArch64Subtarget::isSVEAvailable | ( | ) | const |
Returns true if the target has SVE and can use the full range of SVE instructions, for example because it knows the function is known not to be in streaming-SVE mode or when the target has FEAT_FA64 enabled.
Definition at line 511 of file AArch64Subtarget.cpp.
References isStreaming(), and isStreamingCompatible().
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), getMinVectorRegisterBitWidth(), and llvm::AArch64TTIImpl::getRegisterBitWidth().
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Definition at line 297 of file AArch64Subtarget.h.
References llvm::Triple::isAndroid(), and TargetTriple.
Referenced by llvm::AArch64TargetLowering::getIRStackGuard(), llvm::AArch64TargetLowering::getSafeStackPointerLocation(), and llvm::AArch64TargetLowering::useLoadStackGuardNode().
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Definition at line 301 of file AArch64Subtarget.h.
References llvm::Triple::isOSBinFormatCOFF(), and TargetTriple.
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Definition at line 293 of file AArch64Subtarget.h.
References llvm::Triple::isOSDarwin(), and TargetTriple.
Referenced by CC_AArch64_Custom_Block(), llvm::AArch64TargetLowering::CCAssignFnForCall(), llvm::AArch64RegisterInfo::getCalleeSavedRegs(), llvm::AArch64RegisterInfo::getCallPreservedMask(), llvm::AArch64RegisterInfo::getDarwinCalleeSavedRegs(), llvm::AArch64RegisterInfo::getDarwinCallPreservedMask(), llvm::AArch64RegisterInfo::getThisReturnPreservedMask(), llvm::AArch64TargetLowering::getVaListSizeInBits(), llvm::AArch64RegisterInfo::isArgumentRegister(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), and llvm::AArch64TargetLowering::preferredShiftLegalizationStrategy().
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Definition at line 302 of file AArch64Subtarget.h.
References llvm::Triple::isOSBinFormatELF(), and TargetTriple.
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Definition at line 298 of file AArch64Subtarget.h.
References llvm::Triple::isOSFuchsia(), and TargetTriple.
Referenced by llvm::AArch64TargetLowering::getIRStackGuard(), llvm::AArch64TargetLowering::getSafeStackPointerLocation(), and llvm::AArch64TargetLowering::useLoadStackGuardNode().
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Definition at line 305 of file AArch64Subtarget.h.
References llvm::Triple::getEnvironment(), llvm::Triple::GNUILP32, llvm::Triple::isArch32Bit(), and TargetTriple.
Referenced by addrSinkUsingGEPs(), CC_AArch64_Custom_Block(), llvm::AArch64TargetLowering::CCAssignFnForCall(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::AArch64FrameLowering::emitPrologue(), llvm::AArch64InstrInfo::expandPostRAPseudo(), llvm::AArch64RegisterInfo::isArgumentRegister(), and llvm::AArch64LegalizerInfo::legalizeIntrinsic().
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Definition at line 294 of file AArch64Subtarget.h.
References llvm::Triple::isiOS(), and TargetTriple.
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Definition at line 295 of file AArch64Subtarget.h.
References llvm::Triple::isOSLinux(), and TargetTriple.
Referenced by llvm::AArch64RegisterInfo::getCustomEHPadPreservedMask().
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Definition at line 303 of file AArch64Subtarget.h.
References llvm::Triple::isOSBinFormatMachO(), and TargetTriple.
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), CC_AArch64_Custom_Block(), classifyGlobalFunctionReference(), ClassifyGlobalReference(), and produceCompactUnwindFrame().
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Definition at line 296 of file AArch64Subtarget.h.
References llvm::Triple::isOSWindows(), and TargetTriple.
Referenced by llvm::AArch64FunctionInfo::AArch64FunctionInfo(), llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64TargetLowering::CCAssignFnForCall(), llvm::AArch64FrameLowering::determineCalleeSaves(), llvm::AArch64RegisterInfo::getCalleeSavedRegs(), llvm::AArch64TargetLowering::getVaListSizeInBits(), llvm::AArch64TargetLowering::hasInlineStackProbe(), llvm::AArch64RegisterInfo::isArgumentRegister(), isCallingConvWin64(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::AArch64TargetLowering::preferredShiftLegalizationStrategy(), and windowsRequiresStackProbe().
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Definition at line 299 of file AArch64Subtarget.h.
References llvm::Triple::isWindowsArm64EC(), and TargetTriple.
Referenced by llvm::AArch64TargetLowering::CCAssignFnForCall(), classifyGlobalFunctionReference(), ClassifyGlobalReference(), llvm::AArch64RegisterInfo::explainReservedReg(), getChkStkName(), getSecurityCheckCookieName(), llvm::AArch64RegisterInfo::getStrictlyReservedRegs(), and llvm::AArch64CallLowering::lowerCall().
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Definition at line 212 of file AArch64Subtarget.h.
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Definition at line 248 of file AArch64Subtarget.h.
References CustomCallSavedXRegs.
Referenced by llvm::AArch64RegisterInfo::UpdateCustomCalleeSavedRegs(), and llvm::AArch64RegisterInfo::UpdateCustomCallPreservedMask().
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Definition at line 240 of file AArch64Subtarget.h.
References ReserveXRegister.
Referenced by llvm::AArch64RegisterInfo::getStrictlyReservedRegs(), and llvm::AArch64FunctionInfo::needsShadowCallStackPrologueEpilogue().
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Definition at line 241 of file AArch64Subtarget.h.
References ReserveXRegisterForRA.
Referenced by llvm::AArch64RegisterInfo::getReservedRegs().
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Definition at line 490 of file AArch64Subtarget.cpp.
References llvm::MachineFrameInfo::computeMaxCallFrameSize(), llvm::MachineFunction::getFrameInfo(), and llvm::MachineFrameInfo::isMaxCallFrameSizeComputed().
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Definition at line 456 of file AArch64Subtarget.cpp.
References llvm::MachineSchedPolicy::DisableLatencyHeuristic, llvm::MachineSchedPolicy::OnlyBottomUp, and llvm::MachineSchedPolicy::OnlyTopDown.
void llvm::AArch64Subtarget::ParseSubtargetFeatures | ( | StringRef | CPU, |
StringRef | TuneCPU, | ||
StringRef | FS | ||
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ParseSubtargetFeatures - Parses features string setting specified subtarget options.
Definition of function is auto generated by tblgen.
bool AArch64Subtarget::supportsAddressTopByteIgnored | ( | ) | const |
CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it.
Definition at line 472 of file AArch64Subtarget.cpp.
References llvm::Triple::getiOSVersion(), llvm::Triple::isDriverKit(), llvm::Triple::isiOS(), TargetTriple, and UseAddressTopByteIgnored.
Referenced by performLOADCombine(), and performSTORECombine().
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Return whether FrameLowering should always set the "extended frame present" bit in FP, or set it based on a symbol in the runtime.
Definition at line 372 of file AArch64Subtarget.h.
References llvm::Triple::Darwin, getTargetTriple(), llvm::Triple::IOS, llvm::Triple::MacOSX, llvm::Triple::TvOS, and llvm::Triple::WatchOS.
Referenced by llvm::AArch64FrameLowering::emitPrologue().
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Definition at line 500 of file AArch64Subtarget.cpp.
References UseAA.
Referenced by addrSinkUsingGEPs().
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Definition at line 318 of file AArch64Subtarget.h.
References llvm::TargetMachine::getCodeModel(), llvm::TargetLoweringBase::getTargetMachine(), llvm::CodeModel::Kernel, llvm::CodeModel::Small, and TLInfo.
Referenced by ClassifyGlobalReference().
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Definition at line 413 of file AArch64Subtarget.h.
References getMinSVEVectorSizeInBits(), hasSVEorSME(), and isNeonAvailable().
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64TTIImpl::areTypesABICompatible(), llvm::AArch64TTIImpl::getCastInstrCost(), llvm::AArch64TargetLowering::getNumRegistersForCallingConv(), llvm::AArch64TargetLowering::getRegisterTypeForCallingConv(), llvm::AArch64TargetLowering::getVectorTypeBreakdownForCallingConv(), llvm::AArch64TargetLowering::isLegalInterleavedAccessType(), llvm::AArch64TargetLowering::mergeStoresAfterLegalization(), llvm::AArch64TargetLowering::optimizeExtendOrTruncateConversion(), performFPExtendCombine(), performSTORECombine(), llvm::AArch64TTIImpl::useNeonVector(), useSVEForFixedLengthVectors(), and llvm::AArch64TargetLowering::useSVEForFixedLengthVectorVT().
Definition at line 421 of file AArch64Subtarget.h.
References llvm::EVT::getFixedSizeInBits(), llvm::EVT::isFixedLengthVector(), isNeonAvailable(), llvm::AArch64::SVEBitsPerBlock, and useSVEForFixedLengthVectors().
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ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
Definition at line 99 of file AArch64Subtarget.h.
Referenced by getProcFamily().
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Definition at line 111 of file AArch64Subtarget.h.
Referenced by getCacheLineSize().
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GlobalISel related APIs.
Definition at line 148 of file AArch64Subtarget.h.
Referenced by AArch64Subtarget(), and getCallLowering().
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Definition at line 128 of file AArch64Subtarget.h.
Referenced by hasCustomCallingConv(), and isXRegCustomCalleeSaved().
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Definition at line 137 of file AArch64Subtarget.h.
Referenced by getSVETailFoldingDefaultOpts().
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Definition at line 142 of file AArch64Subtarget.h.
Referenced by getFrameLowering().
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Definition at line 149 of file AArch64Subtarget.h.
Referenced by AArch64Subtarget(), and getInlineAsmLowering().
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Definition at line 143 of file AArch64Subtarget.h.
Referenced by getInstrInfo().
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Definition at line 150 of file AArch64Subtarget.h.
Referenced by AArch64Subtarget(), and getInstructionSelector().
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Definition at line 130 of file AArch64Subtarget.h.
Referenced by isLittleEndian().
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Definition at line 151 of file AArch64Subtarget.h.
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Definition at line 117 of file AArch64Subtarget.h.
Referenced by getMaxBytesForLoopAlignment().
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Definition at line 109 of file AArch64Subtarget.h.
Referenced by getMaxInterleaveFactor().
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Definition at line 119 of file AArch64Subtarget.h.
Referenced by getMaximumJumpTableSize().
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Definition at line 114 of file AArch64Subtarget.h.
Referenced by getMaxPrefetchIterationsAhead().
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Definition at line 135 of file AArch64Subtarget.h.
Referenced by getMaxSVEVectorSizeInBits().
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Definition at line 118 of file AArch64Subtarget.h.
Referenced by getMinimumJumpTableEntries().
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Definition at line 113 of file AArch64Subtarget.h.
Referenced by getMinPrefetchStride().
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Definition at line 134 of file AArch64Subtarget.h.
Referenced by getMinSVEVectorSizeInBits().
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Definition at line 102 of file AArch64Subtarget.h.
Referenced by getMinVectorRegisterBitWidth().
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Definition at line 112 of file AArch64Subtarget.h.
Referenced by getPrefetchDistance().
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Definition at line 115 of file AArch64Subtarget.h.
Referenced by getPrefFunctionAlignment().
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Definition at line 116 of file AArch64Subtarget.h.
Referenced by getPrefLoopAlignment().
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Definition at line 152 of file AArch64Subtarget.h.
Referenced by AArch64Subtarget(), and getRegBankInfo().
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Definition at line 122 of file AArch64Subtarget.h.
Referenced by AArch64Subtarget(), getNumXRegisterReserved(), and isXRegisterReserved().
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Definition at line 125 of file AArch64Subtarget.h.
Referenced by AArch64Subtarget(), getNumXRegisterReserved(), and isXRegisterReservedForRA().
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Definition at line 133 of file AArch64Subtarget.h.
Referenced by isStreamingCompatible().
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Definition at line 132 of file AArch64Subtarget.h.
Referenced by isStreaming().
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TargetTriple - What processor and OS we're targeting.
Definition at line 140 of file AArch64Subtarget.h.
Referenced by getTargetTriple(), isTargetAndroid(), isTargetCOFF(), isTargetDarwin(), isTargetELF(), isTargetFuchsia(), isTargetILP32(), isTargetIOS(), isTargetLinux(), isTargetMachO(), isTargetWindows(), isWindowsArm64EC(), and supportsAddressTopByteIgnored().
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Definition at line 145 of file AArch64Subtarget.h.
Referenced by getTargetLowering(), and useSmallAddressing().
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Definition at line 144 of file AArch64Subtarget.h.
Referenced by getSelectionDAGInfo().
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Definition at line 110 of file AArch64Subtarget.h.
Referenced by getVectorInsertExtractBaseCost().
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Definition at line 136 of file AArch64Subtarget.h.
Referenced by getVScaleForTuning().