LLVM 17.0.0git
Public Types | Public Member Functions | Protected Attributes | List of all members
llvm::AArch64Subtarget Class Referencefinal

#include "Target/AArch64/AArch64Subtarget.h"

Inheritance diagram for llvm::AArch64Subtarget:
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Public Types

enum  ARMProcFamilyEnum : uint8_t {
  Others , A64FX , Ampere1 , Ampere1A ,
  AppleA7 , AppleA10 , AppleA11 , AppleA12 ,
  AppleA13 , AppleA14 , AppleA15 , AppleA16 ,
  Carmel , CortexA35 , CortexA53 , CortexA55 ,
  CortexA510 , CortexA57 , CortexA65 , CortexA72 ,
  CortexA73 , CortexA75 , CortexA76 , CortexA77 ,
  CortexA78 , CortexA78C , CortexA710 , CortexA715 ,
  CortexR82 , CortexX1 , CortexX1C , CortexX2 ,
  CortexX3 , ExynosM3 , Falkor , Kryo ,
  NeoverseE1 , NeoverseN1 , NeoverseN2 , Neoverse512TVB ,
  NeoverseV1 , NeoverseV2 , Saphira , ThunderX2T99 ,
  ThunderX , ThunderXT81 , ThunderXT83 , ThunderXT88 ,
  ThunderX3T110 , TSV110
}
 

Public Member Functions

 AArch64Subtarget (const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, const TargetMachine &TM, bool LittleEndian, unsigned MinSVEVectorSizeInBitsOverride=0, unsigned MaxSVEVectorSizeInBitsOverride=0, bool StreamingSVEModeDisabled=true)
 This constructor initializes the data members to match that of the specified triple.
 
const AArch64SelectionDAGInfo * getSelectionDAGInfo () const override
 
const AArch64FrameLowering * getFrameLowering () const override
 
const AArch64TargetLowering * getTargetLowering () const override
 
const AArch64InstrInfo * getInstrInfo () const override
 
const AArch64RegisterInfo * getRegisterInfo () const override
 
const CallLowering * getCallLowering () const override
 
const InlineAsmLowering * getInlineAsmLowering () const override
 
InstructionSelector * getInstructionSelector () const override
 
const LegalizerInfo * getLegalizerInfo () const override
 
const RegisterBankInfo * getRegBankInfo () const override
 
const Triple & getTargetTriple () const
 
bool enableMachineScheduler () const override
 
bool enablePostRAScheduler () const override
 
ARMProcFamilyEnum getProcFamily () const
 Returns ARM processor family.
 
bool isXRaySupported () const override
 
unsigned getMinVectorRegisterBitWidth () const
 
bool isXRegisterReserved (size_t i) const
 
bool isXRegisterReservedForRA (size_t i) const
 
unsigned getNumXRegisterReserved () const
 
bool isXRegCustomCalleeSaved (size_t i) const
 
bool hasCustomCallingConv () const
 
bool hasFusion () const
 Return true if the CPU supports any kind of instruction fusion.
 
unsigned getMaxInterleaveFactor () const
 
unsigned getVectorInsertExtractBaseCost () const
 
unsigned getCacheLineSize () const override
 
unsigned getPrefetchDistance () const override
 
unsigned getMinPrefetchStride (unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
 
unsigned getMaxPrefetchIterationsAhead () const override
 
Align getPrefFunctionAlignment () const
 
Align getPrefLoopAlignment () const
 
unsigned getMaxBytesForLoopAlignment () const
 
unsigned getMaximumJumpTableSize () const
 
bool supportsAddressTopByteIgnored () const
 CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it.
 
bool isLittleEndian () const
 
bool isTargetDarwin () const
 
bool isTargetIOS () const
 
bool isTargetLinux () const
 
bool isTargetWindows () const
 
bool isTargetAndroid () const
 
bool isTargetFuchsia () const
 
bool isWindowsArm64EC () const
 
bool isTargetCOFF () const
 
bool isTargetELF () const
 
bool isTargetMachO () const
 
bool isTargetILP32 () const
 
bool useAA () const override
 
bool addrSinkUsingGEPs () const override
 
bool useSmallAddressing () const
 
void ParseSubtargetFeatures (StringRef CPU, StringRef TuneCPU, StringRef FS)
 ParseSubtargetFeatures - Parses features string setting specified subtarget options.
 
unsigned ClassifyGlobalReference (const GlobalValue *GV, const TargetMachine &TM) const
 ClassifyGlobalReference - Find the target operand flags that describe how a global value should be referenced for the current subtarget.
 
unsigned classifyGlobalFunctionReference (const GlobalValue *GV, const TargetMachine &TM) const
 
unsigned char classifyGlobalFunctionReference (const GlobalValue *GV) const override
 This function is design to compatible with the function def in other targets and escape build error about the virtual function def in base class TargetSubtargetInfo.
 
void overrideSchedPolicy (MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
 
bool enableEarlyIfConversion () const override
 
std::unique_ptr< PBQPRAConstraint > getCustomPBQPConstraints () const override
 
bool isCallingConvWin64 (CallingConv::ID CC) const
 
bool swiftAsyncContextIsDynamicallySet () const
 Return whether FrameLowering should always set the "extended frame present" bit in FP, or set it based on a symbol in the runtime.
 
void mirFileLoaded (MachineFunction &MF) const override
 
bool hasSVEorSME () const
 
unsigned getMaxSVEVectorSizeInBits () const
 
unsigned getMinSVEVectorSizeInBits () const
 
bool useSVEForFixedLengthVectors () const
 
bool useSVEForFixedLengthVectors (EVT VT) const
 
bool forceStreamingCompatibleSVE () const
 
unsigned getVScaleForTuning () const
 
TailFoldingOpts getSVETailFoldingDefaultOpts () const
 
const char * getChkStkName () const
 
const char * getSecurityCheckCookieName () const
 
bool isStreamingSVEModeDisabled () const
 

Protected Attributes

ARMProcFamilyEnum ARMProcFamily = Others
 ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
 
unsigned MinVectorRegisterBitWidth = 64
 
uint8_t MaxInterleaveFactor = 2
 
uint8_t VectorInsertExtractBaseCost = 3
 
uint16_t CacheLineSize = 0
 
uint16_t PrefetchDistance = 0
 
uint16_t MinPrefetchStride = 1
 
unsigned MaxPrefetchIterationsAhead = UINT_MAX
 
Align PrefFunctionAlignment
 
Align PrefLoopAlignment
 
unsigned MaxBytesForLoopAlignment = 0
 
unsigned MaxJumpTableSize = 0
 
BitVector ReserveXRegister
 
BitVector ReserveXRegisterForRA
 
BitVector CustomCallSavedXRegs
 
bool IsLittle
 
bool StreamingSVEModeDisabled
 
unsigned MinSVEVectorSizeInBits
 
unsigned MaxSVEVectorSizeInBits
 
unsigned VScaleForTuning = 2
 
TailFoldingOpts DefaultSVETFOpts = TailFoldingOpts::Disabled
 
Triple TargetTriple
 TargetTriple - What processor and OS we're targeting.
 
AArch64FrameLowering FrameLowering
 
AArch64InstrInfo InstrInfo
 
AArch64SelectionDAGInfo TSInfo
 
AArch64TargetLowering TLInfo
 
std::unique_ptr< CallLowering > CallLoweringInfo
 GlobalISel related APIs.
 
std::unique_ptr< InlineAsmLowering > InlineAsmLoweringInfo
 
std::unique_ptr< InstructionSelector > InstSelector
 
std::unique_ptr< LegalizerInfo > Legalizer
 
std::unique_ptr< RegisterBankInfo > RegBankInfo
 

Detailed Description

Definition at line 38 of file AArch64Subtarget.h.

Member Enumeration Documentation

◆ ARMProcFamilyEnum

enum llvm::AArch64Subtarget::ARMProcFamilyEnum : uint8_t
Enumerator
Others 
A64FX 
Ampere1 
Ampere1A 
AppleA7 
AppleA10 
AppleA11 
AppleA12 
AppleA13 
AppleA14 
AppleA15 
AppleA16 
Carmel 
CortexA35 
CortexA53 
CortexA55 
CortexA510 
CortexA57 
CortexA65 
CortexA72 
CortexA73 
CortexA75 
CortexA76 
CortexA77 
CortexA78 
CortexA78C 
CortexA710 
CortexA715 
CortexR82 
CortexX1 
CortexX1C 
CortexX2 
CortexX3 
ExynosM3 
Falkor 
Kryo 
NeoverseE1 
NeoverseN1 
NeoverseN2 
Neoverse512TVB 
NeoverseV1 
NeoverseV2 
Saphira 
ThunderX2T99 
ThunderX 
ThunderXT81 
ThunderXT83 
ThunderXT88 
ThunderX3T110 
TSV110 

Definition at line 40 of file AArch64Subtarget.h.

Constructor & Destructor Documentation

◆ AArch64Subtarget()

AArch64Subtarget::AArch64Subtarget ( const Triple &  TT,
StringRef  CPU,
StringRef  TuneCPU,
StringRef  FS,
const TargetMachine &  TM,
bool  LittleEndian,
unsigned  MinSVEVectorSizeInBitsOverride = 0,
unsigned  MaxSVEVectorSizeInBitsOverride = 0,
bool  StreamingSVEModeDisabled = true 
)

This constructor initializes the data members to match that of the specified triple.

Definition at line 288 of file AArch64Subtarget.cpp.

References CallLoweringInfo, llvm::StringMap< ValueTy, AllocatorTy >::count(), llvm::createAArch64InstructionSelector(), getRegisterInfo(), getTargetLowering(), InlineAsmLoweringInfo, llvm::StringSet< AllocatorTy >::insert(), InstrInfo, InstSelector, llvm::AArch64::isX18ReservedByDefault(), RegBankInfo, ReservedRegsForRA, ReserveXRegister, ReserveXRegisterForRA, llvm::BitVector::set(), TM, and TRI.

Member Function Documentation

◆ addrSinkUsingGEPs()

bool llvm::AArch64Subtarget::addrSinkUsingGEPs ( ) const
inlineoverride

Definition at line 281 of file AArch64Subtarget.h.

References isTargetILP32(), and useAA().

◆ classifyGlobalFunctionReference() [1/2]

unsigned char llvm::AArch64Subtarget::classifyGlobalFunctionReference ( const GlobalValue *  GV) const
inlineoverride

This function is design to compatible with the function def in other targets and escape build error about the virtual function def in base class TargetSubtargetInfo.

Updeate me if AArch64 target need to use it.

Definition at line 315 of file AArch64Subtarget.h.

◆ classifyGlobalFunctionReference() [2/2]

unsigned AArch64Subtarget::classifyGlobalFunctionReference ( const GlobalValue *  GV,
const TargetMachine &  TM 
) const

Definition at line 401 of file AArch64Subtarget.cpp.

References ClassifyGlobalReference(), F, llvm::GlobalValue::getParent(), getTargetTriple(), llvm::GlobalValue::getValueType(), llvm::GlobalValue::hasDLLImportStorageClass(), llvm::GlobalValue::hasInternalLinkage(), llvm::Type::isFunctionTy(), isTargetMachO(), isWindowsArm64EC(), llvm::CodeModel::Large, llvm::AArch64II::MO_DLLIMPORT, llvm::AArch64II::MO_GOT, llvm::AArch64II::MO_NO_FLAG, TM, and UseNonLazyBind.

◆ ClassifyGlobalReference()

unsigned AArch64Subtarget::ClassifyGlobalReference ( const GlobalValue *  GV,
const TargetMachine &  TM 
) const

ClassifyGlobalReference - Find the target operand flags that describe how a global value should be referenced for the current subtarget.

Find the target operand flags that describe how a global value should be referenced for the current subtarget.

Definition at line 359 of file AArch64Subtarget.cpp.

References llvm::GlobalValue::getParent(), getTargetTriple(), llvm::GlobalValue::getValueType(), llvm::GlobalValue::hasDLLImportStorageClass(), llvm::GlobalValue::hasExternalWeakLinkage(), llvm::Type::isFunctionTy(), llvm::GlobalValue::isTagged(), isTargetMachO(), isWindowsArm64EC(), llvm::CodeModel::Large, llvm::AArch64II::MO_COFFSTUB, llvm::AArch64II::MO_DLLIMPORT, llvm::AArch64II::MO_DLLIMPORTAUX, llvm::AArch64II::MO_GOT, llvm::AArch64II::MO_NC, llvm::AArch64II::MO_NO_FLAG, llvm::AArch64II::MO_TAGGED, llvm::CodeModel::Tiny, TM, and useSmallAddressing().

Referenced by classifyGlobalFunctionReference(), llvm::AArch64InstrInfo::expandPostRAPseudo(), matchFoldGlobalOffset(), and performGlobalAddressCombine().

◆ enableEarlyIfConversion()

bool AArch64Subtarget::enableEarlyIfConversion ( ) const
override

Definition at line 442 of file AArch64Subtarget.cpp.

References EnableEarlyIfConvert.

◆ enableMachineScheduler()

bool llvm::AArch64Subtarget::enableMachineScheduler ( ) const
inlineoverride

Definition at line 192 of file AArch64Subtarget.h.

◆ enablePostRAScheduler()

bool llvm::AArch64Subtarget::enablePostRAScheduler ( ) const
inlineoverride

Definition at line 193 of file AArch64Subtarget.h.

◆ forceStreamingCompatibleSVE()

bool AArch64Subtarget::forceStreamingCompatibleSVE ( ) const

Definition at line 476 of file AArch64Subtarget.cpp.

References assert(), ForceStreamingCompatibleSVE, and hasSVEorSME().

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64InstrInfo::copyPhysReg(), llvm::AArch64TargetLowering::isLegalInterleavedAccessType(), llvm::AArch64TargetLowering::isShuffleMaskLegal(), llvm::AArch64TargetLowering::LowerOperation(), performFpToIntCombine(), llvm::AArch64TTIImpl::shouldMaximizeVectorBandwidth(), tryAdvSIMDModImm16(), tryAdvSIMDModImm32(), tryCombineToBSL(), and useSVEForFixedLengthVectors().

◆ getCacheLineSize()

unsigned llvm::AArch64Subtarget::getCacheLineSize ( ) const
inlineoverride

Definition at line 234 of file AArch64Subtarget.h.

References CacheLineSize.

◆ getCallLowering()

const CallLowering * AArch64Subtarget::getCallLowering ( ) const
override

Definition at line 336 of file AArch64Subtarget.cpp.

References CallLoweringInfo.

◆ getChkStkName()

const char * llvm::AArch64Subtarget::getChkStkName ( ) const
inline

Definition at line 405 of file AArch64Subtarget.h.

References isWindowsArm64EC().

Referenced by llvm::AArch64FrameLowering::emitPrologue().

◆ getCustomPBQPConstraints()

std::unique_ptr< PBQPRAConstraint > AArch64Subtarget::getCustomPBQPConstraints ( ) const
override

Definition at line 460 of file AArch64Subtarget.cpp.

◆ getFrameLowering()

const AArch64FrameLowering * llvm::AArch64Subtarget::getFrameLowering ( ) const
inlineoverride

Definition at line 176 of file AArch64Subtarget.h.

References FrameLowering.

◆ getInlineAsmLowering()

const InlineAsmLowering * AArch64Subtarget::getInlineAsmLowering ( ) const
override

Definition at line 340 of file AArch64Subtarget.cpp.

References InlineAsmLoweringInfo.

◆ getInstrInfo()

const AArch64InstrInfo * llvm::AArch64Subtarget::getInstrInfo ( ) const
inlineoverride

Definition at line 182 of file AArch64Subtarget.h.

References InstrInfo.

Referenced by llvm::AArch64FrameLowering::emitEpilogue(), llvm::AArch64TargetLowering::EmitF128CSEL(), llvm::AArch64TargetLowering::EmitFill(), llvm::AArch64TargetLowering::EmitInstrWithCustomInserter(), llvm::AArch64FrameLowering::emitPrologue(), llvm::AArch64TargetLowering::EmitTileLoad(), llvm::AArch64TargetLowering::EmitZAInstr(), llvm::AArch64TargetLowering::EmitZero(), getRegisterInfo(), llvm::AArch64TargetLowering::insertCopiesSplitCSR(), InsertReturnAddressAuth(), llvm::AArch64CallLowering::lowerCall(), and signOutlinedFunction().

◆ getInstructionSelector()

InstructionSelector * AArch64Subtarget::getInstructionSelector ( ) const
override

Definition at line 344 of file AArch64Subtarget.cpp.

References InstSelector.

◆ getLegalizerInfo()

const LegalizerInfo * AArch64Subtarget::getLegalizerInfo ( ) const
override

Definition at line 348 of file AArch64Subtarget.cpp.

◆ getMaxBytesForLoopAlignment()

unsigned llvm::AArch64Subtarget::getMaxBytesForLoopAlignment ( ) const
inline

Definition at line 250 of file AArch64Subtarget.h.

References MaxBytesForLoopAlignment.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getMaximumJumpTableSize()

unsigned llvm::AArch64Subtarget::getMaximumJumpTableSize ( ) const
inline

Definition at line 254 of file AArch64Subtarget.h.

References MaxJumpTableSize.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getMaxInterleaveFactor()

unsigned llvm::AArch64Subtarget::getMaxInterleaveFactor ( ) const
inline

Definition at line 232 of file AArch64Subtarget.h.

References MaxInterleaveFactor.

Referenced by llvm::AArch64TTIImpl::getMaxInterleaveFactor().

◆ getMaxPrefetchIterationsAhead()

unsigned llvm::AArch64Subtarget::getMaxPrefetchIterationsAhead ( ) const
inlineoverride

Definition at line 242 of file AArch64Subtarget.h.

References MaxPrefetchIterationsAhead.

◆ getMaxSVEVectorSizeInBits()

unsigned llvm::AArch64Subtarget::getMaxSVEVectorSizeInBits ( ) const
inline

Definition at line 370 of file AArch64Subtarget.h.

References assert(), hasSVEorSME(), and MaxSVEVectorSizeInBits.

Referenced by findMoreOptimalIndexType(), llvm::AArch64TargetLowering::lowerInterleavedLoad(), and llvm::AArch64TargetLowering::lowerInterleavedStore().

◆ getMinPrefetchStride()

unsigned llvm::AArch64Subtarget::getMinPrefetchStride ( unsigned  NumMemAccesses,
unsigned  NumStridedMemAccesses,
unsigned  NumPrefetches,
bool  HasCall 
) const
inlineoverride

Definition at line 236 of file AArch64Subtarget.h.

References MinPrefetchStride.

◆ getMinSVEVectorSizeInBits()

unsigned llvm::AArch64Subtarget::getMinSVEVectorSizeInBits ( ) const
inline

Definition at line 376 of file AArch64Subtarget.h.

References assert(), hasSVEorSME(), and MinSVEVectorSizeInBits.

Referenced by llvm::AArch64TargetLowering::getNumInterleavedAccesses(), getPredicateForFixedLengthVector(), llvm::AArch64TTIImpl::getRegisterBitWidth(), isAllActivePredicate(), llvm::AArch64TargetLowering::isLegalInterleavedAccessType(), llvm::AArch64TargetLowering::lowerInterleavedLoad(), llvm::AArch64TargetLowering::lowerInterleavedStore(), optimizeWhile(), performFPExtendCombine(), performMSTORECombine(), performSTORECombine(), performUnpackCombine(), useSVEForFixedLengthVectors(), and llvm::AArch64TargetLowering::useSVEForFixedLengthVectorVT().

◆ getMinVectorRegisterBitWidth()

unsigned llvm::AArch64Subtarget::getMinVectorRegisterBitWidth ( ) const
inline

Definition at line 205 of file AArch64Subtarget.h.

References isStreamingSVEModeDisabled(), and MinVectorRegisterBitWidth.

◆ getNumXRegisterReserved()

unsigned llvm::AArch64Subtarget::getNumXRegisterReserved ( ) const
inline

Definition at line 214 of file AArch64Subtarget.h.

References llvm::BitVector::count(), ReserveXRegister, and ReserveXRegisterForRA.

Referenced by llvm::AArch64RegisterInfo::getRegPressureLimit().

◆ getPrefetchDistance()

unsigned llvm::AArch64Subtarget::getPrefetchDistance ( ) const
inlineoverride

Definition at line 235 of file AArch64Subtarget.h.

References PrefetchDistance.

◆ getPrefFunctionAlignment()

Align llvm::AArch64Subtarget::getPrefFunctionAlignment ( ) const
inline

Definition at line 245 of file AArch64Subtarget.h.

References PrefFunctionAlignment.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getPrefLoopAlignment()

Align llvm::AArch64Subtarget::getPrefLoopAlignment ( ) const
inline

Definition at line 248 of file AArch64Subtarget.h.

References PrefLoopAlignment.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getProcFamily()

ARMProcFamilyEnum llvm::AArch64Subtarget::getProcFamily ( ) const
inline

Returns ARM processor family.

Avoid this function! CPU specifics should be kept local to this class and preferably modeled with SubtargetFeatures or properties in initializeProperties().

Definition at line 199 of file AArch64Subtarget.h.

References ARMProcFamily.

Referenced by llvm::AArch64TargetLowering::getTargetMMOFlags(), and llvm::AArch64TTIImpl::getUnrollingPreferences().

◆ getRegBankInfo()

const RegisterBankInfo * AArch64Subtarget::getRegBankInfo ( ) const
override

Definition at line 352 of file AArch64Subtarget.cpp.

References RegBankInfo.

Referenced by llvm::AArch64CallLowering::lowerCall().

◆ getRegisterInfo()

const AArch64RegisterInfo * llvm::AArch64Subtarget::getRegisterInfo ( ) const
inlineoverride

Definition at line 183 of file AArch64Subtarget.h.

References getInstrInfo(), and llvm::AArch64InstrInfo::getRegisterInfo().

Referenced by AArch64Subtarget(), llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64FrameLowering::canUseAsPrologue(), llvm::AArch64TargetLowering::changeStreamingMode(), llvm::AArch64FrameLowering::emitEpilogue(), llvm::AArch64FrameLowering::emitPrologue(), llvm::AArch64InstrInfo::expandPostRAPseudo(), findScratchNonCalleeSaveRegister(), llvm::AArch64TargetLowering::insertCopiesSplitCSR(), InsertSEH(), and llvm::AArch64CallLowering::lowerCall().

◆ getSecurityCheckCookieName()

const char * llvm::AArch64Subtarget::getSecurityCheckCookieName ( ) const
inline

Definition at line 411 of file AArch64Subtarget.h.

References isWindowsArm64EC().

Referenced by llvm::AArch64TargetLowering::getSSPStackGuardCheck(), and llvm::AArch64TargetLowering::insertSSPDeclarations().

◆ getSelectionDAGInfo()

const AArch64SelectionDAGInfo * llvm::AArch64Subtarget::getSelectionDAGInfo ( ) const
inlineoverride

Definition at line 173 of file AArch64Subtarget.h.

References TSInfo.

◆ getSVETailFoldingDefaultOpts()

TailFoldingOpts llvm::AArch64Subtarget::getSVETailFoldingDefaultOpts ( ) const
inline

Definition at line 401 of file AArch64Subtarget.h.

References DefaultSVETFOpts.

Referenced by llvm::AArch64TTIImpl::preferPredicateOverEpilogue().

◆ getTargetLowering()

const AArch64TargetLowering * llvm::AArch64Subtarget::getTargetLowering ( ) const
inlineoverride

Definition at line 179 of file AArch64Subtarget.h.

References TLInfo.

Referenced by AArch64Subtarget(), llvm::AArch64FrameLowering::canUseRedZone(), finishStackBlock(), llvm::AArch64RegisterInfo::getCalleeSavedRegs(), llvm::AArch64RegisterInfo::getCallPreservedMask(), llvm::AArch64RegisterInfo::getDarwinCalleeSavedRegs(), llvm::AArch64RegisterInfo::getDarwinCallPreservedMask(), and produceCompactUnwindFrame().

◆ getTargetTriple()

const Triple & llvm::AArch64Subtarget::getTargetTriple ( ) const
inline

Definition at line 191 of file AArch64Subtarget.h.

References TargetTriple.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), classifyGlobalFunctionReference(), ClassifyGlobalReference(), llvm::AArch64TargetLowering::getSDagStackGuard(), llvm::AArch64TargetLowering::getSSPStackGuardCheck(), llvm::AArch64TargetLowering::insertSSPDeclarations(), llvm::AArch64TargetLowering::shouldInsertTrailingFenceForAtomicStore(), ShouldSignWithBKey(), and swiftAsyncContextIsDynamicallySet().

◆ getVectorInsertExtractBaseCost()

unsigned AArch64Subtarget::getVectorInsertExtractBaseCost ( ) const

Definition at line 71 of file AArch64Subtarget.cpp.

References OverrideVectorInsertExtractBaseCost, and VectorInsertExtractBaseCost.

◆ getVScaleForTuning()

unsigned llvm::AArch64Subtarget::getVScaleForTuning ( ) const
inline

Definition at line 399 of file AArch64Subtarget.h.

References VScaleForTuning.

◆ hasCustomCallingConv()

bool llvm::AArch64Subtarget::hasCustomCallingConv ( ) const
inline

Definition at line 223 of file AArch64Subtarget.h.

References llvm::BitVector::any(), and CustomCallSavedXRegs.

Referenced by llvm::AArch64CallLowering::lowerCall().

◆ hasFusion()

bool llvm::AArch64Subtarget::hasFusion ( ) const
inline

Return true if the CPU supports any kind of instruction fusion.

Definition at line 226 of file AArch64Subtarget.h.

◆ hasSVEorSME()

bool llvm::AArch64Subtarget::hasSVEorSME ( ) const
inline

Definition at line 365 of file AArch64Subtarget.h.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64InstrInfo::copyPhysReg(), forceStreamingCompatibleSVE(), llvm::AArch64TTIImpl::getCastInstrCost(), getMaxSVEVectorSizeInBits(), and getMinSVEVectorSizeInBits().

◆ isCallingConvWin64()

bool llvm::AArch64Subtarget::isCallingConvWin64 ( CallingConv::ID  CC) const
inline

Definition at line 326 of file AArch64Subtarget.h.

References llvm::CallingConv::C, CC, llvm::CallingConv::Fast, isTargetWindows(), llvm::CallingConv::Swift, and llvm::CallingConv::Win64.

Referenced by analyzeCallOperands(), llvm::AArch64FrameLowering::emitEpilogue(), llvm::AArch64FrameLowering::emitPrologue(), and llvm::AArch64RegisterInfo::isArgumentRegister().

◆ isLittleEndian()

bool llvm::AArch64Subtarget::isLittleEndian ( ) const
inline

Definition at line 260 of file AArch64Subtarget.h.

References IsLittle.

Referenced by llvm::AArch64TargetLowering::optimizeExtendOrTruncateConversion(), and performLOADCombine().

◆ isStreamingSVEModeDisabled()

bool llvm::AArch64Subtarget::isStreamingSVEModeDisabled ( ) const
inline

Definition at line 417 of file AArch64Subtarget.h.

References StreamingSVEModeDisabled.

Referenced by getMinVectorRegisterBitWidth(), and llvm::AArch64TTIImpl::getRegisterBitWidth().

◆ isTargetAndroid()

bool llvm::AArch64Subtarget::isTargetAndroid ( ) const
inline

Definition at line 266 of file AArch64Subtarget.h.

References llvm::Triple::isAndroid(), and TargetTriple.

Referenced by llvm::AArch64TargetLowering::getIRStackGuard(), llvm::AArch64TargetLowering::getSafeStackPointerLocation(), and llvm::AArch64TargetLowering::useLoadStackGuardNode().

◆ isTargetCOFF()

bool llvm::AArch64Subtarget::isTargetCOFF ( ) const
inline

Definition at line 270 of file AArch64Subtarget.h.

References llvm::Triple::isOSBinFormatCOFF(), and TargetTriple.

◆ isTargetDarwin()

bool llvm::AArch64Subtarget::isTargetDarwin ( ) const
inline

Definition at line 262 of file AArch64Subtarget.h.

References llvm::Triple::isOSDarwin(), and TargetTriple.

Referenced by CC_AArch64_Custom_Block(), llvm::AArch64TargetLowering::CCAssignFnForCall(), llvm::AArch64RegisterInfo::getCalleeSavedRegs(), llvm::AArch64RegisterInfo::getCallPreservedMask(), llvm::AArch64RegisterInfo::getDarwinCalleeSavedRegs(), llvm::AArch64RegisterInfo::getDarwinCallPreservedMask(), llvm::AArch64RegisterInfo::getThisReturnPreservedMask(), llvm::AArch64TargetLowering::getVaListSizeInBits(), llvm::AArch64RegisterInfo::isArgumentRegister(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), and llvm::AArch64TargetLowering::preferredShiftLegalizationStrategy().

◆ isTargetELF()

bool llvm::AArch64Subtarget::isTargetELF ( ) const
inline

Definition at line 271 of file AArch64Subtarget.h.

References llvm::Triple::isOSBinFormatELF(), and TargetTriple.

◆ isTargetFuchsia()

bool llvm::AArch64Subtarget::isTargetFuchsia ( ) const
inline

Definition at line 267 of file AArch64Subtarget.h.

References llvm::Triple::isOSFuchsia(), and TargetTriple.

Referenced by llvm::AArch64TargetLowering::getIRStackGuard(), llvm::AArch64TargetLowering::getSafeStackPointerLocation(), and llvm::AArch64TargetLowering::useLoadStackGuardNode().

◆ isTargetILP32()

bool llvm::AArch64Subtarget::isTargetILP32 ( ) const
inline

Definition at line 274 of file AArch64Subtarget.h.

References llvm::Triple::getEnvironment(), llvm::Triple::GNUILP32, llvm::Triple::isArch32Bit(), and TargetTriple.

Referenced by addrSinkUsingGEPs(), CC_AArch64_Custom_Block(), llvm::AArch64TargetLowering::CCAssignFnForCall(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::AArch64FrameLowering::emitPrologue(), llvm::AArch64InstrInfo::expandPostRAPseudo(), llvm::AArch64RegisterInfo::isArgumentRegister(), and llvm::AArch64LegalizerInfo::legalizeIntrinsic().

◆ isTargetIOS()

bool llvm::AArch64Subtarget::isTargetIOS ( ) const
inline

Definition at line 263 of file AArch64Subtarget.h.

References llvm::Triple::isiOS(), and TargetTriple.

◆ isTargetLinux()

bool llvm::AArch64Subtarget::isTargetLinux ( ) const
inline

Definition at line 264 of file AArch64Subtarget.h.

References llvm::Triple::isOSLinux(), and TargetTriple.

Referenced by llvm::AArch64RegisterInfo::getCustomEHPadPreservedMask().

◆ isTargetMachO()

bool llvm::AArch64Subtarget::isTargetMachO ( ) const
inline

Definition at line 272 of file AArch64Subtarget.h.

References llvm::Triple::isOSBinFormatMachO(), and TargetTriple.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), CC_AArch64_Custom_Block(), classifyGlobalFunctionReference(), ClassifyGlobalReference(), and produceCompactUnwindFrame().

◆ isTargetWindows()

bool llvm::AArch64Subtarget::isTargetWindows ( ) const
inline

Definition at line 265 of file AArch64Subtarget.h.

References llvm::Triple::isOSWindows(), and TargetTriple.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64TargetLowering::CCAssignFnForCall(), llvm::AArch64FrameLowering::determineCalleeSaves(), llvm::AArch64RegisterInfo::getCalleeSavedRegs(), llvm::AArch64TargetLowering::getVaListSizeInBits(), llvm::AArch64RegisterInfo::isArgumentRegister(), isCallingConvWin64(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::AArch64TargetLowering::preferredShiftLegalizationStrategy(), and windowsRequiresStackProbe().

◆ isWindowsArm64EC()

bool llvm::AArch64Subtarget::isWindowsArm64EC ( ) const
inline

Definition at line 268 of file AArch64Subtarget.h.

References llvm::Triple::isWindowsArm64EC(), and TargetTriple.

Referenced by llvm::AArch64TargetLowering::CCAssignFnForCall(), classifyGlobalFunctionReference(), ClassifyGlobalReference(), llvm::AArch64RegisterInfo::explainReservedReg(), getChkStkName(), getSecurityCheckCookieName(), llvm::AArch64RegisterInfo::getStrictlyReservedRegs(), and llvm::AArch64CallLowering::lowerCall().

◆ isXRaySupported()

bool llvm::AArch64Subtarget::isXRaySupported ( ) const
inlineoverride

Definition at line 203 of file AArch64Subtarget.h.

◆ isXRegCustomCalleeSaved()

bool llvm::AArch64Subtarget::isXRegCustomCalleeSaved ( size_t  i) const
inline

Definition at line 220 of file AArch64Subtarget.h.

References CustomCallSavedXRegs.

Referenced by llvm::AArch64RegisterInfo::UpdateCustomCalleeSavedRegs(), and llvm::AArch64RegisterInfo::UpdateCustomCallPreservedMask().

◆ isXRegisterReserved()

bool llvm::AArch64Subtarget::isXRegisterReserved ( size_t  i) const
inline

Definition at line 212 of file AArch64Subtarget.h.

References ReserveXRegister.

Referenced by llvm::AArch64RegisterInfo::getStrictlyReservedRegs(), and needsShadowCallStackPrologueEpilogue().

◆ isXRegisterReservedForRA()

bool llvm::AArch64Subtarget::isXRegisterReservedForRA ( size_t  i) const
inline

Definition at line 213 of file AArch64Subtarget.h.

References ReserveXRegisterForRA.

Referenced by llvm::AArch64RegisterInfo::getReservedRegs().

◆ mirFileLoaded()

void AArch64Subtarget::mirFileLoaded ( MachineFunction &  MF) const
override

Definition at line 464 of file AArch64Subtarget.cpp.

References llvm::MachineFrameInfo::computeMaxCallFrameSize(), llvm::MachineFunction::getFrameInfo(), and llvm::MachineFrameInfo::isMaxCallFrameSizeComputed().

◆ overrideSchedPolicy()

void AArch64Subtarget::overrideSchedPolicy ( MachineSchedPolicy &  Policy,
unsigned  NumRegionInstrs 
) const
override

Definition at line 430 of file AArch64Subtarget.cpp.

References llvm::MachineSchedPolicy::DisableLatencyHeuristic, llvm::MachineSchedPolicy::OnlyBottomUp, and llvm::MachineSchedPolicy::OnlyTopDown.

◆ ParseSubtargetFeatures()

void llvm::AArch64Subtarget::ParseSubtargetFeatures ( StringRef  CPU,
StringRef  TuneCPU,
StringRef  FS 
)

ParseSubtargetFeatures - Parses features string setting specified subtarget options.

Definition of function is auto generated by tblgen.

◆ supportsAddressTopByteIgnored()

bool AArch64Subtarget::supportsAddressTopByteIgnored ( ) const

CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it.

Definition at line 446 of file AArch64Subtarget.cpp.

References llvm::Triple::getiOSVersion(), llvm::Triple::isDriverKit(), llvm::Triple::isiOS(), TargetTriple, and UseAddressTopByteIgnored.

Referenced by performLOADCombine(), and performSTORECombine().

◆ swiftAsyncContextIsDynamicallySet()

bool llvm::AArch64Subtarget::swiftAsyncContextIsDynamicallySet ( ) const
inline

Return whether FrameLowering should always set the "extended frame present" bit in FP, or set it based on a symbol in the runtime.

Definition at line 341 of file AArch64Subtarget.h.

References llvm::Triple::Darwin, getTargetTriple(), llvm::Triple::IOS, llvm::Triple::MacOSX, llvm::Triple::TvOS, and llvm::Triple::WatchOS.

Referenced by llvm::AArch64FrameLowering::emitPrologue().

◆ useAA()

bool AArch64Subtarget::useAA ( ) const
override

Definition at line 474 of file AArch64Subtarget.cpp.

References UseAA.

Referenced by addrSinkUsingGEPs().

◆ useSmallAddressing()

bool llvm::AArch64Subtarget::useSmallAddressing ( ) const
inline

Definition at line 287 of file AArch64Subtarget.h.

References llvm::TargetMachine::getCodeModel(), llvm::TargetLoweringBase::getTargetMachine(), llvm::CodeModel::Kernel, llvm::CodeModel::Small, and TLInfo.

Referenced by ClassifyGlobalReference().

◆ useSVEForFixedLengthVectors() [1/2]

bool llvm::AArch64Subtarget::useSVEForFixedLengthVectors ( ) const
inline

Definition at line 382 of file AArch64Subtarget.h.

References forceStreamingCompatibleSVE(), and getMinSVEVectorSizeInBits().

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AArch64TTIImpl::getCastInstrCost(), llvm::AArch64TargetLowering::isLegalInterleavedAccessType(), llvm::AArch64TargetLowering::mergeStoresAfterLegalization(), llvm::AArch64TargetLowering::optimizeExtendOrTruncateConversion(), performFPExtendCombine(), performSTORECombine(), llvm::AArch64TTIImpl::useNeonVector(), useSVEForFixedLengthVectors(), and llvm::AArch64TargetLowering::useSVEForFixedLengthVectorVT().

◆ useSVEForFixedLengthVectors() [2/2]

bool llvm::AArch64Subtarget::useSVEForFixedLengthVectors ( EVT  VT) const
inline

Definition at line 390 of file AArch64Subtarget.h.

References forceStreamingCompatibleSVE(), llvm::EVT::getFixedSizeInBits(), llvm::EVT::isFixedLengthVector(), llvm::AArch64::SVEBitsPerBlock, and useSVEForFixedLengthVectors().

Member Data Documentation

◆ ARMProcFamily

ARMProcFamilyEnum llvm::AArch64Subtarget::ARMProcFamily = Others
protected

ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.

Definition at line 95 of file AArch64Subtarget.h.

Referenced by getProcFamily().

◆ CacheLineSize

uint16_t llvm::AArch64Subtarget::CacheLineSize = 0
protected

Definition at line 107 of file AArch64Subtarget.h.

Referenced by getCacheLineSize().

◆ CallLoweringInfo

std::unique_ptr<CallLowering> llvm::AArch64Subtarget::CallLoweringInfo
protected

GlobalISel related APIs.

Definition at line 142 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getCallLowering().

◆ CustomCallSavedXRegs

BitVector llvm::AArch64Subtarget::CustomCallSavedXRegs
protected

Definition at line 123 of file AArch64Subtarget.h.

Referenced by hasCustomCallingConv(), and isXRegCustomCalleeSaved().

◆ DefaultSVETFOpts

TailFoldingOpts llvm::AArch64Subtarget::DefaultSVETFOpts = TailFoldingOpts::Disabled
protected

Definition at line 131 of file AArch64Subtarget.h.

Referenced by getSVETailFoldingDefaultOpts().

◆ FrameLowering

AArch64FrameLowering llvm::AArch64Subtarget::FrameLowering
protected

Definition at line 136 of file AArch64Subtarget.h.

Referenced by getFrameLowering().

◆ InlineAsmLoweringInfo

std::unique_ptr<InlineAsmLowering> llvm::AArch64Subtarget::InlineAsmLoweringInfo
protected

Definition at line 143 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getInlineAsmLowering().

◆ InstrInfo

AArch64InstrInfo llvm::AArch64Subtarget::InstrInfo
protected

Definition at line 137 of file AArch64Subtarget.h.

Referenced by getInstrInfo().

◆ InstSelector

std::unique_ptr<InstructionSelector> llvm::AArch64Subtarget::InstSelector
protected

Definition at line 144 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getInstructionSelector().

◆ IsLittle

bool llvm::AArch64Subtarget::IsLittle
protected

Definition at line 125 of file AArch64Subtarget.h.

Referenced by isLittleEndian().

◆ Legalizer

std::unique_ptr<LegalizerInfo> llvm::AArch64Subtarget::Legalizer
protected

Definition at line 145 of file AArch64Subtarget.h.

◆ MaxBytesForLoopAlignment

unsigned llvm::AArch64Subtarget::MaxBytesForLoopAlignment = 0
protected

Definition at line 113 of file AArch64Subtarget.h.

Referenced by getMaxBytesForLoopAlignment().

◆ MaxInterleaveFactor

uint8_t llvm::AArch64Subtarget::MaxInterleaveFactor = 2
protected

Definition at line 105 of file AArch64Subtarget.h.

Referenced by getMaxInterleaveFactor().

◆ MaxJumpTableSize

unsigned llvm::AArch64Subtarget::MaxJumpTableSize = 0
protected

Definition at line 114 of file AArch64Subtarget.h.

Referenced by getMaximumJumpTableSize().

◆ MaxPrefetchIterationsAhead

unsigned llvm::AArch64Subtarget::MaxPrefetchIterationsAhead = UINT_MAX
protected

Definition at line 110 of file AArch64Subtarget.h.

Referenced by getMaxPrefetchIterationsAhead().

◆ MaxSVEVectorSizeInBits

unsigned llvm::AArch64Subtarget::MaxSVEVectorSizeInBits
protected

Definition at line 129 of file AArch64Subtarget.h.

Referenced by getMaxSVEVectorSizeInBits().

◆ MinPrefetchStride

uint16_t llvm::AArch64Subtarget::MinPrefetchStride = 1
protected

Definition at line 109 of file AArch64Subtarget.h.

Referenced by getMinPrefetchStride().

◆ MinSVEVectorSizeInBits

unsigned llvm::AArch64Subtarget::MinSVEVectorSizeInBits
protected

Definition at line 128 of file AArch64Subtarget.h.

Referenced by getMinSVEVectorSizeInBits().

◆ MinVectorRegisterBitWidth

unsigned llvm::AArch64Subtarget::MinVectorRegisterBitWidth = 64
protected

Definition at line 98 of file AArch64Subtarget.h.

Referenced by getMinVectorRegisterBitWidth().

◆ PrefetchDistance

uint16_t llvm::AArch64Subtarget::PrefetchDistance = 0
protected

Definition at line 108 of file AArch64Subtarget.h.

Referenced by getPrefetchDistance().

◆ PrefFunctionAlignment

Align llvm::AArch64Subtarget::PrefFunctionAlignment
protected

Definition at line 111 of file AArch64Subtarget.h.

Referenced by getPrefFunctionAlignment().

◆ PrefLoopAlignment

Align llvm::AArch64Subtarget::PrefLoopAlignment
protected

Definition at line 112 of file AArch64Subtarget.h.

Referenced by getPrefLoopAlignment().

◆ RegBankInfo

std::unique_ptr<RegisterBankInfo> llvm::AArch64Subtarget::RegBankInfo
protected

Definition at line 146 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getRegBankInfo().

◆ ReserveXRegister

BitVector llvm::AArch64Subtarget::ReserveXRegister
protected

Definition at line 117 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), getNumXRegisterReserved(), and isXRegisterReserved().

◆ ReserveXRegisterForRA

BitVector llvm::AArch64Subtarget::ReserveXRegisterForRA
protected

Definition at line 120 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), getNumXRegisterReserved(), and isXRegisterReservedForRA().

◆ StreamingSVEModeDisabled

bool llvm::AArch64Subtarget::StreamingSVEModeDisabled
protected

Definition at line 127 of file AArch64Subtarget.h.

Referenced by isStreamingSVEModeDisabled().

◆ TargetTriple

Triple llvm::AArch64Subtarget::TargetTriple
protected

TargetTriple - What processor and OS we're targeting.

Definition at line 134 of file AArch64Subtarget.h.

Referenced by getTargetTriple(), isTargetAndroid(), isTargetCOFF(), isTargetDarwin(), isTargetELF(), isTargetFuchsia(), isTargetILP32(), isTargetIOS(), isTargetLinux(), isTargetMachO(), isTargetWindows(), isWindowsArm64EC(), and supportsAddressTopByteIgnored().

◆ TLInfo

AArch64TargetLowering llvm::AArch64Subtarget::TLInfo
protected

Definition at line 139 of file AArch64Subtarget.h.

Referenced by getTargetLowering(), and useSmallAddressing().

◆ TSInfo

AArch64SelectionDAGInfo llvm::AArch64Subtarget::TSInfo
protected

Definition at line 138 of file AArch64Subtarget.h.

Referenced by getSelectionDAGInfo().

◆ VectorInsertExtractBaseCost

uint8_t llvm::AArch64Subtarget::VectorInsertExtractBaseCost = 3
protected

Definition at line 106 of file AArch64Subtarget.h.

Referenced by getVectorInsertExtractBaseCost().

◆ VScaleForTuning

unsigned llvm::AArch64Subtarget::VScaleForTuning = 2
protected

Definition at line 130 of file AArch64Subtarget.h.

Referenced by getVScaleForTuning().

The documentation for this class was generated from the following files:
Generated on Thu Jun 1 2023 19:14:23 for LLVM by doxygen 1.9.6