LLVM  15.0.0git
Public Types | Public Member Functions | Protected Attributes | List of all members
llvm::AArch64Subtarget Class Referencefinal

#include "Target/AArch64/AArch64Subtarget.h"

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Public Types

enum  ARMProcFamilyEnum : uint8_t {
  Others, A64FX, Ampere1, AppleA7,
  AppleA10, AppleA11, AppleA12, AppleA13,
  AppleA14, Carmel, CortexA35, CortexA53,
  CortexA55, CortexA510, CortexA57, CortexA65,
  CortexA72, CortexA73, CortexA75, CortexA76,
  CortexA77, CortexA78, CortexA78C, CortexA710,
  CortexR82, CortexX1, CortexX1C, CortexX2,
  ExynosM3, Falkor, Kryo, NeoverseE1,
  NeoverseN1, NeoverseN2, Neoverse512TVB, NeoverseV1,
  Saphira, ThunderX2T99, ThunderX, ThunderXT81,
  ThunderXT83, ThunderXT88, ThunderX3T110, TSV110
}
 

Public Member Functions

 AArch64Subtarget (const Triple &TT, const std::string &CPU, const std::string &TuneCPU, const std::string &FS, const TargetMachine &TM, bool LittleEndian, unsigned MinSVEVectorSizeInBitsOverride=0, unsigned MaxSVEVectorSizeInBitsOverride=0)
 This constructor initializes the data members to match that of the specified triple. More...
 
const AArch64SelectionDAGInfogetSelectionDAGInfo () const override
 
const AArch64FrameLoweringgetFrameLowering () const override
 
const AArch64TargetLoweringgetTargetLowering () const override
 
const AArch64InstrInfogetInstrInfo () const override
 
const AArch64RegisterInfogetRegisterInfo () const override
 
const CallLoweringgetCallLowering () const override
 
const InlineAsmLoweringgetInlineAsmLowering () const override
 
InstructionSelectorgetInstructionSelector () const override
 
const LegalizerInfogetLegalizerInfo () const override
 
const RegisterBankInfogetRegBankInfo () const override
 
const TriplegetTargetTriple () const
 
bool enableMachineScheduler () const override
 
bool enablePostRAScheduler () const override
 
ARMProcFamilyEnum getProcFamily () const
 Returns ARM processor family. More...
 
bool isXRaySupported () const override
 
unsigned getMinVectorRegisterBitWidth () const
 
bool isXRegisterReserved (size_t i) const
 
unsigned getNumXRegisterReserved () const
 
bool isXRegCustomCalleeSaved (size_t i) const
 
bool hasCustomCallingConv () const
 
bool hasFusion () const
 Return true if the CPU supports any kind of instruction fusion. More...
 
unsigned getMaxInterleaveFactor () const
 
unsigned getVectorInsertExtractBaseCost () const
 
unsigned getCacheLineSize () const override
 
unsigned getPrefetchDistance () const override
 
unsigned getMinPrefetchStride (unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
 
unsigned getMaxPrefetchIterationsAhead () const override
 
unsigned getPrefFunctionLogAlignment () const
 
unsigned getPrefLoopLogAlignment () const
 
unsigned getMaxBytesForLoopAlignment () const
 
unsigned getMaximumJumpTableSize () const
 
bool supportsAddressTopByteIgnored () const
 CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it. More...
 
bool isLittleEndian () const
 
bool isTargetDarwin () const
 
bool isTargetIOS () const
 
bool isTargetLinux () const
 
bool isTargetWindows () const
 
bool isTargetAndroid () const
 
bool isTargetFuchsia () const
 
bool isTargetCOFF () const
 
bool isTargetELF () const
 
bool isTargetMachO () const
 
bool isTargetILP32 () const
 
bool useAA () const override
 
bool addrSinkUsingGEPs () const override
 
bool useSmallAddressing () const
 
void ParseSubtargetFeatures (StringRef CPU, StringRef TuneCPU, StringRef FS)
 ParseSubtargetFeatures - Parses features string setting specified subtarget options. More...
 
unsigned ClassifyGlobalReference (const GlobalValue *GV, const TargetMachine &TM) const
 ClassifyGlobalReference - Find the target operand flags that describe how a global value should be referenced for the current subtarget. More...
 
unsigned classifyGlobalFunctionReference (const GlobalValue *GV, const TargetMachine &TM) const
 
void overrideSchedPolicy (MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
 
bool enableEarlyIfConversion () const override
 
std::unique_ptr< PBQPRAConstraintgetCustomPBQPConstraints () const override
 
bool isCallingConvWin64 (CallingConv::ID CC) const
 
bool swiftAsyncContextIsDynamicallySet () const
 Return whether FrameLowering should always set the "extended frame present" bit in FP, or set it based on a symbol in the runtime. More...
 
void mirFileLoaded (MachineFunction &MF) const override
 
unsigned getMaxSVEVectorSizeInBits () const
 
unsigned getMinSVEVectorSizeInBits () const
 
bool useSVEForFixedLengthVectors () const
 
unsigned getVScaleForTuning () const
 

Protected Attributes

ARMProcFamilyEnum ARMProcFamily = Others
 ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others. More...
 
unsigned MinVectorRegisterBitWidth = 64
 
uint8_t MaxInterleaveFactor = 2
 
uint8_t VectorInsertExtractBaseCost = 3
 
uint16_t CacheLineSize = 0
 
uint16_t PrefetchDistance = 0
 
uint16_t MinPrefetchStride = 1
 
unsigned MaxPrefetchIterationsAhead = UINT_MAX
 
unsigned PrefFunctionLogAlignment = 0
 
unsigned PrefLoopLogAlignment = 0
 
unsigned MaxBytesForLoopAlignment = 0
 
unsigned MaxJumpTableSize = 0
 
BitVector ReserveXRegister
 
BitVector CustomCallSavedXRegs
 
bool IsLittle
 
unsigned MinSVEVectorSizeInBits
 
unsigned MaxSVEVectorSizeInBits
 
unsigned VScaleForTuning = 2
 
Triple TargetTriple
 TargetTriple - What processor and OS we're targeting. More...
 
AArch64FrameLowering FrameLowering
 
AArch64InstrInfo InstrInfo
 
AArch64SelectionDAGInfo TSInfo
 
AArch64TargetLowering TLInfo
 
std::unique_ptr< CallLoweringCallLoweringInfo
 GlobalISel related APIs. More...
 
std::unique_ptr< InlineAsmLoweringInlineAsmLoweringInfo
 
std::unique_ptr< InstructionSelectorInstSelector
 
std::unique_ptr< LegalizerInfoLegalizer
 
std::unique_ptr< RegisterBankInfoRegBankInfo
 

Detailed Description

Definition at line 38 of file AArch64Subtarget.h.

Member Enumeration Documentation

◆ ARMProcFamilyEnum

Enumerator
Others 
A64FX 
Ampere1 
AppleA7 
AppleA10 
AppleA11 
AppleA12 
AppleA13 
AppleA14 
Carmel 
CortexA35 
CortexA53 
CortexA55 
CortexA510 
CortexA57 
CortexA65 
CortexA72 
CortexA73 
CortexA75 
CortexA76 
CortexA77 
CortexA78 
CortexA78C 
CortexA710 
CortexR82 
CortexX1 
CortexX1C 
CortexX2 
ExynosM3 
Falkor 
Kryo 
NeoverseE1 
NeoverseN1 
NeoverseN2 
Neoverse512TVB 
NeoverseV1 
Saphira 
ThunderX2T99 
ThunderX 
ThunderXT81 
ThunderXT83 
ThunderXT88 
ThunderX3T110 
TSV110 

Definition at line 40 of file AArch64Subtarget.h.

Constructor & Destructor Documentation

◆ AArch64Subtarget()

AArch64Subtarget::AArch64Subtarget ( const Triple TT,
const std::string &  CPU,
const std::string &  TuneCPU,
const std::string &  FS,
const TargetMachine TM,
bool  LittleEndian,
unsigned  MinSVEVectorSizeInBitsOverride = 0,
unsigned  MaxSVEVectorSizeInBitsOverride = 0 
)

Member Function Documentation

◆ addrSinkUsingGEPs()

bool llvm::AArch64Subtarget::addrSinkUsingGEPs ( ) const
inlineoverride

Definition at line 260 of file AArch64Subtarget.h.

References isTargetILP32(), and useAA().

◆ classifyGlobalFunctionReference()

unsigned AArch64Subtarget::classifyGlobalFunctionReference ( const GlobalValue GV,
const TargetMachine TM 
) const

◆ ClassifyGlobalReference()

unsigned AArch64Subtarget::ClassifyGlobalReference ( const GlobalValue GV,
const TargetMachine TM 
) const

◆ enableEarlyIfConversion()

bool AArch64Subtarget::enableEarlyIfConversion ( ) const
override

Definition at line 380 of file AArch64Subtarget.cpp.

References EnableEarlyIfConvert.

◆ enableMachineScheduler()

bool llvm::AArch64Subtarget::enableMachineScheduler ( ) const
inlineoverride

Definition at line 181 of file AArch64Subtarget.h.

◆ enablePostRAScheduler()

bool llvm::AArch64Subtarget::enablePostRAScheduler ( ) const
inlineoverride

Definition at line 182 of file AArch64Subtarget.h.

◆ getCacheLineSize()

unsigned llvm::AArch64Subtarget::getCacheLineSize ( ) const
inlineoverride

Definition at line 214 of file AArch64Subtarget.h.

References CacheLineSize.

◆ getCallLowering()

const CallLowering * AArch64Subtarget::getCallLowering ( ) const
override

Definition at line 292 of file AArch64Subtarget.cpp.

References CallLoweringInfo.

◆ getCustomPBQPConstraints()

std::unique_ptr< PBQPRAConstraint > AArch64Subtarget::getCustomPBQPConstraints ( ) const
override

Definition at line 398 of file AArch64Subtarget.cpp.

◆ getFrameLowering()

const AArch64FrameLowering* llvm::AArch64Subtarget::getFrameLowering ( ) const
inlineoverride

Definition at line 165 of file AArch64Subtarget.h.

References FrameLowering.

◆ getInlineAsmLowering()

const InlineAsmLowering * AArch64Subtarget::getInlineAsmLowering ( ) const
override

Definition at line 296 of file AArch64Subtarget.cpp.

References InlineAsmLoweringInfo.

◆ getInstrInfo()

const AArch64InstrInfo* llvm::AArch64Subtarget::getInstrInfo ( ) const
inlineoverride

◆ getInstructionSelector()

InstructionSelector * AArch64Subtarget::getInstructionSelector ( ) const
override

Definition at line 300 of file AArch64Subtarget.cpp.

References InstSelector.

◆ getLegalizerInfo()

const LegalizerInfo * AArch64Subtarget::getLegalizerInfo ( ) const
override

Definition at line 304 of file AArch64Subtarget.cpp.

◆ getMaxBytesForLoopAlignment()

unsigned llvm::AArch64Subtarget::getMaxBytesForLoopAlignment ( ) const
inline

◆ getMaximumJumpTableSize()

unsigned llvm::AArch64Subtarget::getMaximumJumpTableSize ( ) const
inline

Definition at line 234 of file AArch64Subtarget.h.

References MaxJumpTableSize.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getMaxInterleaveFactor()

unsigned llvm::AArch64Subtarget::getMaxInterleaveFactor ( ) const
inline

Definition at line 212 of file AArch64Subtarget.h.

References MaxInterleaveFactor.

◆ getMaxPrefetchIterationsAhead()

unsigned llvm::AArch64Subtarget::getMaxPrefetchIterationsAhead ( ) const
inlineoverride

Definition at line 222 of file AArch64Subtarget.h.

References MaxPrefetchIterationsAhead.

◆ getMaxSVEVectorSizeInBits()

unsigned llvm::AArch64Subtarget::getMaxSVEVectorSizeInBits ( ) const
inline

◆ getMinPrefetchStride()

unsigned llvm::AArch64Subtarget::getMinPrefetchStride ( unsigned  NumMemAccesses,
unsigned  NumStridedMemAccesses,
unsigned  NumPrefetches,
bool  HasCall 
) const
inlineoverride

Definition at line 216 of file AArch64Subtarget.h.

References MinPrefetchStride.

◆ getMinSVEVectorSizeInBits()

unsigned llvm::AArch64Subtarget::getMinSVEVectorSizeInBits ( ) const
inline

◆ getMinVectorRegisterBitWidth()

unsigned llvm::AArch64Subtarget::getMinVectorRegisterBitWidth ( ) const
inline

Definition at line 194 of file AArch64Subtarget.h.

References MinVectorRegisterBitWidth.

◆ getNumXRegisterReserved()

unsigned llvm::AArch64Subtarget::getNumXRegisterReserved ( ) const
inline

◆ getPrefetchDistance()

unsigned llvm::AArch64Subtarget::getPrefetchDistance ( ) const
inlineoverride

Definition at line 215 of file AArch64Subtarget.h.

References PrefetchDistance.

◆ getPrefFunctionLogAlignment()

unsigned llvm::AArch64Subtarget::getPrefFunctionLogAlignment ( ) const
inline

◆ getPrefLoopLogAlignment()

unsigned llvm::AArch64Subtarget::getPrefLoopLogAlignment ( ) const
inline

◆ getProcFamily()

ARMProcFamilyEnum llvm::AArch64Subtarget::getProcFamily ( ) const
inline

Returns ARM processor family.

Avoid this function! CPU specifics should be kept local to this class and preferably modeled with SubtargetFeatures or properties in initializeProperties().

Definition at line 188 of file AArch64Subtarget.h.

References ARMProcFamily.

Referenced by llvm::AArch64TargetLowering::getTargetMMOFlags().

◆ getRegBankInfo()

const RegisterBankInfo * AArch64Subtarget::getRegBankInfo ( ) const
override

Definition at line 308 of file AArch64Subtarget.cpp.

References RegBankInfo.

Referenced by llvm::AArch64CallLowering::lowerCall().

◆ getRegisterInfo()

const AArch64RegisterInfo* llvm::AArch64Subtarget::getRegisterInfo ( ) const
inlineoverride

◆ getSelectionDAGInfo()

const AArch64SelectionDAGInfo* llvm::AArch64Subtarget::getSelectionDAGInfo ( ) const
inlineoverride

Definition at line 162 of file AArch64Subtarget.h.

References TSInfo.

◆ getTargetLowering()

const AArch64TargetLowering* llvm::AArch64Subtarget::getTargetLowering ( ) const
inlineoverride

◆ getTargetTriple()

const Triple& llvm::AArch64Subtarget::getTargetTriple ( ) const
inline

◆ getVectorInsertExtractBaseCost()

unsigned AArch64Subtarget::getVectorInsertExtractBaseCost ( ) const

◆ getVScaleForTuning()

unsigned llvm::AArch64Subtarget::getVScaleForTuning ( ) const
inline

Definition at line 354 of file AArch64Subtarget.h.

References VScaleForTuning.

◆ hasCustomCallingConv()

bool llvm::AArch64Subtarget::hasCustomCallingConv ( ) const
inline

◆ hasFusion()

bool llvm::AArch64Subtarget::hasFusion ( ) const
inline

Return true if the CPU supports any kind of instruction fusion.

Definition at line 206 of file AArch64Subtarget.h.

◆ isCallingConvWin64()

bool llvm::AArch64Subtarget::isCallingConvWin64 ( CallingConv::ID  CC) const
inline

◆ isLittleEndian()

bool llvm::AArch64Subtarget::isLittleEndian ( ) const
inline

Definition at line 240 of file AArch64Subtarget.h.

References IsLittle.

◆ isTargetAndroid()

bool llvm::AArch64Subtarget::isTargetAndroid ( ) const
inline

◆ isTargetCOFF()

bool llvm::AArch64Subtarget::isTargetCOFF ( ) const
inline

Definition at line 249 of file AArch64Subtarget.h.

References llvm::Triple::isOSBinFormatCOFF(), and TargetTriple.

◆ isTargetDarwin()

bool llvm::AArch64Subtarget::isTargetDarwin ( ) const
inline

◆ isTargetELF()

bool llvm::AArch64Subtarget::isTargetELF ( ) const
inline

Definition at line 250 of file AArch64Subtarget.h.

References llvm::Triple::isOSBinFormatELF(), and TargetTriple.

◆ isTargetFuchsia()

bool llvm::AArch64Subtarget::isTargetFuchsia ( ) const
inline

◆ isTargetILP32()

bool llvm::AArch64Subtarget::isTargetILP32 ( ) const
inline

◆ isTargetIOS()

bool llvm::AArch64Subtarget::isTargetIOS ( ) const
inline

Definition at line 243 of file AArch64Subtarget.h.

References llvm::Triple::isiOS(), and TargetTriple.

◆ isTargetLinux()

bool llvm::AArch64Subtarget::isTargetLinux ( ) const
inline

◆ isTargetMachO()

bool llvm::AArch64Subtarget::isTargetMachO ( ) const
inline

◆ isTargetWindows()

bool llvm::AArch64Subtarget::isTargetWindows ( ) const
inline

◆ isXRaySupported()

bool llvm::AArch64Subtarget::isXRaySupported ( ) const
inlineoverride

Definition at line 192 of file AArch64Subtarget.h.

◆ isXRegCustomCalleeSaved()

bool llvm::AArch64Subtarget::isXRegCustomCalleeSaved ( size_t  i) const
inline

◆ isXRegisterReserved()

bool llvm::AArch64Subtarget::isXRegisterReserved ( size_t  i) const
inline

◆ mirFileLoaded()

void AArch64Subtarget::mirFileLoaded ( MachineFunction MF) const
override

◆ overrideSchedPolicy()

void AArch64Subtarget::overrideSchedPolicy ( MachineSchedPolicy Policy,
unsigned  NumRegionInstrs 
) const
override

◆ ParseSubtargetFeatures()

void llvm::AArch64Subtarget::ParseSubtargetFeatures ( StringRef  CPU,
StringRef  TuneCPU,
StringRef  FS 
)

ParseSubtargetFeatures - Parses features string setting specified subtarget options.

Definition of function is auto generated by tblgen.

◆ supportsAddressTopByteIgnored()

bool AArch64Subtarget::supportsAddressTopByteIgnored ( ) const

CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it.

Definition at line 384 of file AArch64Subtarget.cpp.

References llvm::Triple::getiOSVersion(), llvm::Triple::isDriverKit(), llvm::Triple::isiOS(), TargetTriple, and UseAddressTopByteIgnored.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), and performSTORECombine().

◆ swiftAsyncContextIsDynamicallySet()

bool llvm::AArch64Subtarget::swiftAsyncContextIsDynamicallySet ( ) const
inline

Return whether FrameLowering should always set the "extended frame present" bit in FP, or set it based on a symbol in the runtime.

Definition at line 312 of file AArch64Subtarget.h.

References llvm::Triple::Darwin, getTargetTriple(), llvm::Triple::IOS, llvm::Triple::MacOSX, llvm::Triple::TvOS, and llvm::Triple::WatchOS.

Referenced by llvm::AArch64FrameLowering::emitPrologue().

◆ useAA()

bool AArch64Subtarget::useAA ( ) const
override

Definition at line 412 of file AArch64Subtarget.cpp.

References UseAA.

Referenced by addrSinkUsingGEPs().

◆ useSmallAddressing()

bool llvm::AArch64Subtarget::useSmallAddressing ( ) const
inline

◆ useSVEForFixedLengthVectors()

bool llvm::AArch64Subtarget::useSVEForFixedLengthVectors ( ) const
inline

Member Data Documentation

◆ ARMProcFamily

ARMProcFamilyEnum llvm::AArch64Subtarget::ARMProcFamily = Others
protected

ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.

Definition at line 89 of file AArch64Subtarget.h.

Referenced by getProcFamily().

◆ CacheLineSize

uint16_t llvm::AArch64Subtarget::CacheLineSize = 0
protected

Definition at line 101 of file AArch64Subtarget.h.

Referenced by getCacheLineSize().

◆ CallLoweringInfo

std::unique_ptr<CallLowering> llvm::AArch64Subtarget::CallLoweringInfo
protected

GlobalISel related APIs.

Definition at line 131 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getCallLowering().

◆ CustomCallSavedXRegs

BitVector llvm::AArch64Subtarget::CustomCallSavedXRegs
protected

Definition at line 114 of file AArch64Subtarget.h.

Referenced by hasCustomCallingConv(), and isXRegCustomCalleeSaved().

◆ FrameLowering

AArch64FrameLowering llvm::AArch64Subtarget::FrameLowering
protected

Definition at line 125 of file AArch64Subtarget.h.

Referenced by getFrameLowering().

◆ InlineAsmLoweringInfo

std::unique_ptr<InlineAsmLowering> llvm::AArch64Subtarget::InlineAsmLoweringInfo
protected

Definition at line 132 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getInlineAsmLowering().

◆ InstrInfo

AArch64InstrInfo llvm::AArch64Subtarget::InstrInfo
protected

Definition at line 126 of file AArch64Subtarget.h.

Referenced by getInstrInfo().

◆ InstSelector

std::unique_ptr<InstructionSelector> llvm::AArch64Subtarget::InstSelector
protected

Definition at line 133 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getInstructionSelector().

◆ IsLittle

bool llvm::AArch64Subtarget::IsLittle
protected

Definition at line 116 of file AArch64Subtarget.h.

Referenced by isLittleEndian().

◆ Legalizer

std::unique_ptr<LegalizerInfo> llvm::AArch64Subtarget::Legalizer
protected

Definition at line 134 of file AArch64Subtarget.h.

◆ MaxBytesForLoopAlignment

unsigned llvm::AArch64Subtarget::MaxBytesForLoopAlignment = 0
protected

Definition at line 107 of file AArch64Subtarget.h.

Referenced by getMaxBytesForLoopAlignment().

◆ MaxInterleaveFactor

uint8_t llvm::AArch64Subtarget::MaxInterleaveFactor = 2
protected

Definition at line 99 of file AArch64Subtarget.h.

Referenced by getMaxInterleaveFactor().

◆ MaxJumpTableSize

unsigned llvm::AArch64Subtarget::MaxJumpTableSize = 0
protected

Definition at line 108 of file AArch64Subtarget.h.

Referenced by getMaximumJumpTableSize().

◆ MaxPrefetchIterationsAhead

unsigned llvm::AArch64Subtarget::MaxPrefetchIterationsAhead = UINT_MAX
protected

Definition at line 104 of file AArch64Subtarget.h.

Referenced by getMaxPrefetchIterationsAhead().

◆ MaxSVEVectorSizeInBits

unsigned llvm::AArch64Subtarget::MaxSVEVectorSizeInBits
protected

Definition at line 119 of file AArch64Subtarget.h.

Referenced by getMaxSVEVectorSizeInBits().

◆ MinPrefetchStride

uint16_t llvm::AArch64Subtarget::MinPrefetchStride = 1
protected

Definition at line 103 of file AArch64Subtarget.h.

Referenced by getMinPrefetchStride().

◆ MinSVEVectorSizeInBits

unsigned llvm::AArch64Subtarget::MinSVEVectorSizeInBits
protected

Definition at line 118 of file AArch64Subtarget.h.

Referenced by getMinSVEVectorSizeInBits().

◆ MinVectorRegisterBitWidth

unsigned llvm::AArch64Subtarget::MinVectorRegisterBitWidth = 64
protected

Definition at line 92 of file AArch64Subtarget.h.

Referenced by getMinVectorRegisterBitWidth().

◆ PrefetchDistance

uint16_t llvm::AArch64Subtarget::PrefetchDistance = 0
protected

Definition at line 102 of file AArch64Subtarget.h.

Referenced by getPrefetchDistance().

◆ PrefFunctionLogAlignment

unsigned llvm::AArch64Subtarget::PrefFunctionLogAlignment = 0
protected

Definition at line 105 of file AArch64Subtarget.h.

Referenced by getPrefFunctionLogAlignment().

◆ PrefLoopLogAlignment

unsigned llvm::AArch64Subtarget::PrefLoopLogAlignment = 0
protected

Definition at line 106 of file AArch64Subtarget.h.

Referenced by getPrefLoopLogAlignment().

◆ RegBankInfo

std::unique_ptr<RegisterBankInfo> llvm::AArch64Subtarget::RegBankInfo
protected

Definition at line 135 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getRegBankInfo().

◆ ReserveXRegister

BitVector llvm::AArch64Subtarget::ReserveXRegister
protected

◆ TargetTriple

Triple llvm::AArch64Subtarget::TargetTriple
protected

◆ TLInfo

AArch64TargetLowering llvm::AArch64Subtarget::TLInfo
protected

Definition at line 128 of file AArch64Subtarget.h.

Referenced by getTargetLowering(), and useSmallAddressing().

◆ TSInfo

AArch64SelectionDAGInfo llvm::AArch64Subtarget::TSInfo
protected

Definition at line 127 of file AArch64Subtarget.h.

Referenced by getSelectionDAGInfo().

◆ VectorInsertExtractBaseCost

uint8_t llvm::AArch64Subtarget::VectorInsertExtractBaseCost = 3
protected

Definition at line 100 of file AArch64Subtarget.h.

Referenced by getVectorInsertExtractBaseCost().

◆ VScaleForTuning

unsigned llvm::AArch64Subtarget::VScaleForTuning = 2
protected

Definition at line 120 of file AArch64Subtarget.h.

Referenced by getVScaleForTuning().


The documentation for this class was generated from the following files: