#include "Target/AArch64/AArch64Subtarget.h"

Inheritance diagram for llvm::AArch64Subtarget:

Public Types
enum	ARMProcFamilyEnum : uint8_t { Generic }

Public Member Functions
	AArch64Subtarget (const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, const TargetMachine &TM, bool LittleEndian, unsigned MinSVEVectorSizeInBitsOverride=0, unsigned MaxSVEVectorSizeInBitsOverride=0, bool IsStreaming=false, bool IsStreamingCompatible=false, bool HasMinSize=false, bool EnableSRLTSubregToRegMitigation=false)
	This constructor initializes the data members to match that of the specified triple.
const AArch64Options &	getCLOpts () const
const AArch64SelectionDAGInfo *	getSelectionDAGInfo () const override
const AArch64FrameLowering *	getFrameLowering () const override
const AArch64TargetLowering *	getTargetLowering () const override
const AArch64InstrInfo *	getInstrInfo () const override
const AArch64RegisterInfo *	getRegisterInfo () const override
const CallLowering *	getCallLowering () const override
const InlineAsmLowering *	getInlineAsmLowering () const override
InstructionSelector *	getInstructionSelector () const override
const LegalizerInfo *	getLegalizerInfo () const override
const RegisterBankInfo *	getRegBankInfo () const override
const Triple &	getTargetTriple () const
bool	enableMachineScheduler () const override
bool	enablePostRAScheduler () const override
bool	enableSubRegLiveness () const override
bool	enableMachinePipeliner () const override
bool	useDFAforSMS () const override
ARMProcFamilyEnum	getProcFamily () const
	Returns ARM processor family.
bool	isAppleMLike () const
	Returns true if the processor is an Apple M-series or aligned A-series (A14 or newer).
bool	isXRaySupported () const override
bool	isStreaming () const
	Returns true if the function has a streaming body.
bool	isStreamingCompatible () const
	Returns true if the function has a streaming-compatible body.
unsigned	getStreamingHazardSize () const
	Returns the size of memory region that if accessed by both the CPU and the SME unit could result in a hazard.
bool	isNeonAvailable () const
	Returns true if the target has NEON and the function at runtime is known to have NEON enabled (e.g.
bool	isSVEAvailable () const
	Returns true if the target has SVE and can use the full range of SVE instructions, for example because it knows the function is known not to be in streaming-SVE mode or when the target has FEAT_FA64 enabled.
bool	isStreamingSVEAvailable () const
	Returns true if the target has access to the streaming-compatible subset of SVE instructions.
bool	isSVEorStreamingSVEAvailable () const
	Returns true if the target has access to either the full range of SVE instructions, or the streaming-compatible subset of SVE instructions.
bool	isNonStreamingSVEorSME2Available () const
	Returns true if the target has access to either the full range of SVE instructions, or the streaming-compatible subset of SVE instructions available to SME2.
unsigned	getMinVectorRegisterBitWidth () const
bool	isXRegisterReserved (size_t i) const
bool	isXRegisterReservedForRA (size_t i) const
unsigned	getNumXRegisterReserved () const
bool	isLRReservedForRA () const
bool	isXRegCustomCalleeSaved (size_t i) const
bool	hasCustomCallingConv () const
bool	hasFusion () const
	Return true if the CPU supports any kind of instruction fusion.
bool	fusesMOVImmPair (unsigned FirstOpc, unsigned FirstShift, unsigned SecondOpc, unsigned SecondShift) const
	Return true if the subtarget fuses this pair of move immediate instructions.
bool	fusesMOVImmPair (const MachineInstr *FirstMI, const MachineInstr &SecondMI) const
	Return true if the subtarget fuses this pair of move immediate instructions.
unsigned	getEpilogueVectorizationMinVF () const
unsigned	getMaxInterleaveFactor () const
unsigned	getVectorInsertExtractBaseCost () const
unsigned	getCacheLineSize () const override
unsigned	getScatterOverhead () const
unsigned	getGatherOverhead () const
unsigned	getPrefetchDistance () const override
unsigned	getMinPrefetchStride (unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
unsigned	getMaxPrefetchIterationsAhead () const override
Align	getPrefFunctionAlignment () const
Align	getPrefLoopAlignment () const
unsigned	getMaxBytesForLoopAlignment () const
unsigned	getMaximumJumpTableSize () const
unsigned	getMinimumJumpTableEntries () const
unsigned	getFixedLoadLatency () const
bool	supportsAddressTopByteIgnored () const
	CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it.
bool	isLittleEndian () const
bool	isTargetDarwin () const
bool	isTargetIOS () const
bool	isTargetLinux () const
bool	isTargetWindows () const
bool	isTargetAndroid () const
bool	isTargetFuchsia () const
bool	isWindowsArm64EC () const
bool	isLFI () const
bool	isTargetCOFF () const
bool	isTargetELF () const
bool	isTargetMachO () const
bool	isTargetILP32 () const
bool	useAA () const override
bool	addrSinkUsingGEPs () const override
bool	useSmallAddressing () const
bool	isX16X17Safer () const
	Returns whether the operating system makes it safer to store sensitive values in x16 and x17 as opposed to other registers.
void	ParseSubtargetFeatures (StringRef CPU, StringRef TuneCPU, StringRef FS)
	ParseSubtargetFeatures - Parses features string setting specified subtarget options.
unsigned	ClassifyGlobalReference (const GlobalValue *GV, const TargetMachine &TM) const
	ClassifyGlobalReference - Find the target operand flags that describe how a global value should be referenced for the current subtarget.
unsigned	classifyGlobalFunctionReference (const GlobalValue *GV, const TargetMachine &TM) const
unsigned char	classifyGlobalFunctionReference (const GlobalValue *GV) const override
	This function is design to compatible with the function def in other targets and escape build error about the virtual function def in base class TargetSubtargetInfo.
void	overrideSchedPolicy (MachineSchedPolicy &Policy, const SchedRegion &Region) const override
void	adjustSchedDependency (SUnit Def, int DefOpIdx, SUnit Use, int UseOpIdx, SDep &Dep, const TargetSchedModel *SchedModel) const override
bool	enableEarlyIfConversion () const override
std::unique_ptr< PBQPRAConstraint >	getCustomPBQPConstraints () const override
bool	isCallingConvWin64 (CallingConv::ID CC, bool IsVarArg) const
bool	swiftAsyncContextIsDynamicallySet () const
	Return whether FrameLowering should always set the "extended frame present" bit in FP, or set it based on a symbol in the runtime.
void	mirFileLoaded (MachineFunction &MF) const override
unsigned	getMaxSVEVectorSizeInBits () const
unsigned	getMinSVEVectorSizeInBits () const
unsigned	getSVEVectorSizeInBits () const
unsigned	getSVEPredicateSizeInBits () const
bool	useSVEForFixedLengthVectors () const
bool	useSVEForFixedLengthVectors (EVT VT) const
unsigned	getVScaleForTuning () const
TailFoldingOpts	getSVETailFoldingDefaultOpts () const
bool	useScalarIncVL () const
	Returns true to use the addvl/inc/dec instructions, as opposed to separate add + cnt instructions.
bool	enableSRLTSubregToRegMitigation () const
AArch64PAuth::AuthCheckMethod	getAuthenticatedLRCheckMethod (const MachineFunction &MF) const
	Choose a method of checking LR before performing a tail call.
std::optional< uint16_t >	getPtrAuthBlockAddressDiscriminatorIfEnabled (const Function &ParentFn) const
	Compute the integer discriminator for a given BlockAddress constant, if blockaddress signing is enabled, or std::nullopt otherwise.
bool	enableAggressiveInterleaving () const

Protected Attributes
ARMProcFamilyEnum	ARMProcFamily = Generic
	ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
unsigned	MinVectorRegisterBitWidth = 64
unsigned	EpilogueVectorizationMinVF = 16
uint8_t	MaxInterleaveFactor = 2
uint8_t	VectorInsertExtractBaseCost = 2
uint16_t	CacheLineSize = 64
unsigned	ScatterOverhead = 10
unsigned	GatherOverhead = 10
uint16_t	PrefetchDistance = 0
uint16_t	MinPrefetchStride = 1
unsigned	MaxPrefetchIterationsAhead = UINT_MAX
Align	PrefFunctionAlignment
Align	PrefLoopAlignment
unsigned	MaxBytesForLoopAlignment = 0
unsigned	MinimumJumpTableEntries = 4
unsigned	MaxJumpTableSize = 0
unsigned	FixedLoadLatency = 0
BitVector	ReserveXRegister
BitVector	ReserveXRegisterForRA
BitVector	CustomCallSavedXRegs
bool	IsLittle
bool	IsStreaming
bool	IsStreamingCompatible
unsigned	MinSVEVectorSizeInBits
unsigned	MaxSVEVectorSizeInBits
bool	EnableSRLTSubregToRegMitigation
unsigned	VScaleForTuning = 1
TailFoldingOpts	DefaultSVETFOpts = TailFoldingOpts::Disabled
bool	EnableSubregLiveness
Triple	TargetTriple
	TargetTriple - What processor and OS we're targeting.
AArch64FrameLowering	FrameLowering
AArch64InstrInfo	InstrInfo
AArch64SelectionDAGInfo	TSInfo
AArch64TargetLowering	TLInfo
std::unique_ptr< CallLowering >	CallLoweringInfo
	GlobalISel related APIs.
std::unique_ptr< InlineAsmLowering >	InlineAsmLoweringInfo
std::unique_ptr< InstructionSelector >	InstSelector
std::unique_ptr< LegalizerInfo >	Legalizer
std::unique_ptr< RegisterBankInfo >	RegBankInfo

Detailed Description

Definition at line 57 of file AArch64Subtarget.h.

Member Enumeration Documentation

◆ ARMProcFamilyEnum

enum llvm::AArch64Subtarget::ARMProcFamilyEnum : uint8_t

Enumerator
Generic

Definition at line 61 of file AArch64Subtarget.h.

Constructor & Destructor Documentation

◆ AArch64Subtarget()

AArch64Subtarget::AArch64Subtarget	(	const Triple &	TT,
		StringRef	CPU,
		StringRef	TuneCPU,
		StringRef	FS,
		const TargetMachine &	TM,
		bool	LittleEndian,
		unsigned	MinSVEVectorSizeInBitsOverride = 0,
		unsigned	MaxSVEVectorSizeInBitsOverride = 0,
		bool	IsStreaming = false,
		bool	IsStreamingCompatible = false,
		bool	HasMinSize = false,
		bool	EnableSRLTSubregToRegMitigation = false )

This constructor initializes the data members to match that of the specified triple.

Definition at line 297 of file AArch64Subtarget.cpp.

References CallLoweringInfo, const, llvm::StringMap< ValueTy, AllocatorTy >::count(), llvm::createAArch64InstructionSelector(), CustomCallSavedXRegs, EnableSRLTSubregToRegMitigation, EnableSubregLiveness, llvm::from_range, getCLOpts(), getRegisterInfo(), getTargetLowering(), InlineAsmLoweringInfo, InstrInfo, InstSelector, IsLittle, IsStreaming, IsStreamingCompatible, llvm::AArch64::isX18ReservedByDefault(), Legalizer, MaxSVEVectorSizeInBits, MinSVEVectorSizeInBits, RegBankInfo, ReservedRegsForRA, ReserveXRegister, ReserveXRegisterForRA, TargetTriple, TLInfo, and TRI.

Member Function Documentation

◆ addrSinkUsingGEPs()

bool llvm::AArch64Subtarget::addrSinkUsingGEPs ( ) const

inlineoverride

Definition at line 364 of file AArch64Subtarget.h.

References isTargetILP32(), and useAA().

◆ adjustSchedDependency()

void AArch64Subtarget::adjustSchedDependency	(	SUnit *	Def,
		int	DefOpIdx,
		SUnit *	Use,
		int	UseOpIdx,
		SDep &	Dep,
		const TargetSchedModel *	SchedModel ) const

override

Definition at line 469 of file AArch64Subtarget.cpp.

References llvm::TargetSchedModel::computeOperandLatency(), llvm::const_mi_bundle_ops(), llvm::SDep::Data, DefMI, llvm::SDep::getKind(), llvm::SDep::getReg(), llvm::SDep::setLatency(), and UseMI.

◆ classifyGlobalFunctionReference() [1/2]

unsigned char llvm::AArch64Subtarget::classifyGlobalFunctionReference ( const GlobalValue * GV ) const

inlineoverride

This function is design to compatible with the function def in other targets and escape build error about the virtual function def in base class TargetSubtargetInfo.

Updeate me if AArch64 target need to use it.

Definition at line 402 of file AArch64Subtarget.h.

◆ classifyGlobalFunctionReference() [2/2]

unsigned AArch64Subtarget::classifyGlobalFunctionReference	(	const GlobalValue *	GV,
		const TargetMachine &	TM ) const

◆ ClassifyGlobalReference()

unsigned AArch64Subtarget::ClassifyGlobalReference	(	const GlobalValue *	GV,
		const TargetMachine &	TM ) const

ClassifyGlobalReference - Find the target operand flags that describe how a global value should be referenced for the current subtarget.

Find the target operand flags that describe how a global value should be referenced for the current subtarget.

Definition at line 381 of file AArch64Subtarget.cpp.

References llvm::TargetMachine::getCodeModel(), getTargetTriple(), llvm::GlobalValue::getValueType(), llvm::GlobalValue::hasDLLImportStorageClass(), llvm::GlobalValue::hasExternalWeakLinkage(), llvm::isa(), llvm::GlobalValue::isTagged(), isTargetMachO(), llvm::CodeModel::Large, llvm::AArch64II::MO_COFFSTUB, llvm::AArch64II::MO_DLLIMPORT, llvm::AArch64II::MO_GOT, llvm::AArch64II::MO_NC, llvm::AArch64II::MO_NO_FLAG, llvm::AArch64II::MO_TAGGED, llvm::TargetMachine::shouldAssumeDSOLocal(), llvm::CodeModel::Tiny, and useSmallAddressing().

Referenced by classifyGlobalFunctionReference(), and performGlobalAddressCombine().

◆ enableAggressiveInterleaving()

bool llvm::AArch64Subtarget::enableAggressiveInterleaving ( ) const

inline

Definition at line 533 of file AArch64Subtarget.h.

◆ enableEarlyIfConversion()

bool AArch64Subtarget::enableEarlyIfConversion ( ) const

override

Definition at line 508 of file AArch64Subtarget.cpp.

◆ enableMachinePipeliner()

bool AArch64Subtarget::enableMachinePipeliner ( ) const

override

Definition at line 591 of file AArch64Subtarget.cpp.

◆ enableMachineScheduler()

bool llvm::AArch64Subtarget::enableMachineScheduler ( ) const

inlineoverride

Definition at line 182 of file AArch64Subtarget.h.

◆ enablePostRAScheduler()

bool llvm::AArch64Subtarget::enablePostRAScheduler ( ) const

inlineoverride

Definition at line 183 of file AArch64Subtarget.h.

◆ enableSRLTSubregToRegMitigation()

bool llvm::AArch64Subtarget::enableSRLTSubregToRegMitigation ( ) const

inline

Definition at line 515 of file AArch64Subtarget.h.

References EnableSRLTSubregToRegMitigation.

Referenced by llvm::AArch64RegisterInfo::shouldCoalesce().

◆ enableSubRegLiveness()

bool llvm::AArch64Subtarget::enableSubRegLiveness ( ) const

inlineoverride

Definition at line 184 of file AArch64Subtarget.h.

References EnableSubregLiveness.

◆ fusesMOVImmPair() [1/2]

bool AArch64Subtarget::fusesMOVImmPair	(	const MachineInstr *	FirstMI,
		const MachineInstr &	SecondMI ) const

Return true if the subtarget fuses this pair of move immediate instructions.

The 1st instruction is a wildcard when it is nullptr, which tells whether the 2nd one can be fused at all.

Definition at line 634 of file AArch64Subtarget.cpp.

References fusesMOVImmPairImpl(), getMOVKShiftImm(), and llvm::MachineInstr::getOpcode().

◆ fusesMOVImmPair() [2/2]

bool AArch64Subtarget::fusesMOVImmPair	(	unsigned	FirstOpc,
		unsigned	FirstShift,
		unsigned	SecondOpc,
		unsigned	SecondShift ) const

Return true if the subtarget fuses this pair of move immediate instructions.

Definition at line 627 of file AArch64Subtarget.cpp.

References fusesMOVImmPairImpl().

◆ getAuthenticatedLRCheckMethod()

AArch64PAuth::AuthCheckMethod AArch64Subtarget::getAuthenticatedLRCheckMethod ( const MachineFunction & MF ) const

Choose a method of checking LR before performing a tail call.

Definition at line 561 of file AArch64Subtarget.cpp.

References llvm::MachineFunction::getFunction(), llvm::Function::hasFnAttribute(), llvm::AArch64PAuth::HighBitsNoTBI, and llvm::AArch64PAuth::None.

◆ getCacheLineSize()

unsigned llvm::AArch64Subtarget::getCacheLineSize ( ) const

inlineoverride

Definition at line 309 of file AArch64Subtarget.h.

References CacheLineSize.

◆ getCallLowering()

const CallLowering * AArch64Subtarget::getCallLowering ( ) const

override

Definition at line 358 of file AArch64Subtarget.cpp.

References CallLoweringInfo.

◆ getCLOpts()

const AArch64Options & llvm::AArch64Subtarget::getCLOpts ( ) const

inline

Definition at line 156 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), llvm::AArch64FrameLowering::canUseRedZone(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemmove(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemset(), enableMultiVectorSpillFill(), getCheckMode(), isOrXorChain(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), llvm::AArch64FrameLowering::orderFrameObjects(), performSignExtendInRegCombine(), and performSVEAndCombine().

◆ getCustomPBQPConstraints()

std::unique_ptr< PBQPRAConstraint > AArch64Subtarget::getCustomPBQPConstraints ( ) const

override

Definition at line 526 of file AArch64Subtarget.cpp.

◆ getEpilogueVectorizationMinVF()

unsigned llvm::AArch64Subtarget::getEpilogueVectorizationMinVF ( ) const

inline

Definition at line 304 of file AArch64Subtarget.h.

References EpilogueVectorizationMinVF.

◆ getFixedLoadLatency()

unsigned llvm::AArch64Subtarget::getFixedLoadLatency ( ) const

inline

Definition at line 336 of file AArch64Subtarget.h.

References FixedLoadLatency.

◆ getFrameLowering()

const AArch64FrameLowering * llvm::AArch64Subtarget::getFrameLowering ( ) const

inlineoverride

Definition at line 166 of file AArch64Subtarget.h.

References FrameLowering.

Referenced by llvm::AArch64FunctionInfo::AArch64FunctionInfo().

◆ getGatherOverhead()

unsigned llvm::AArch64Subtarget::getGatherOverhead ( ) const

inline

Definition at line 311 of file AArch64Subtarget.h.

References GatherOverhead.

◆ getInlineAsmLowering()

const InlineAsmLowering * AArch64Subtarget::getInlineAsmLowering ( ) const

override

Definition at line 362 of file AArch64Subtarget.cpp.

References InlineAsmLoweringInfo.

◆ getInstrInfo()

const AArch64InstrInfo * llvm::AArch64Subtarget::getInstrInfo ( ) const

inlineoverride

Definition at line 172 of file AArch64Subtarget.h.

References InstrInfo.

Referenced by llvm::AArch64FrameLowering::eliminateCallFramePseudoInstr(), llvm::AArch64FrameLowering::emitPacRetPlusLeafHardening(), getRegisterInfo(), llvm::AArch64CallLowering::lowerCall(), and llvm::AArch64FrameLowering::spillCalleeSavedRegisters().

◆ getInstructionSelector()

InstructionSelector * AArch64Subtarget::getInstructionSelector ( ) const

override

Definition at line 366 of file AArch64Subtarget.cpp.

References InstSelector.

◆ getLegalizerInfo()

const LegalizerInfo * AArch64Subtarget::getLegalizerInfo ( ) const

override

Definition at line 370 of file AArch64Subtarget.cpp.

References Legalizer.

◆ getMaxBytesForLoopAlignment()

unsigned llvm::AArch64Subtarget::getMaxBytesForLoopAlignment ( ) const

inline

Definition at line 327 of file AArch64Subtarget.h.

References MaxBytesForLoopAlignment.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getMaximumJumpTableSize()

unsigned llvm::AArch64Subtarget::getMaximumJumpTableSize ( ) const

inline

Definition at line 331 of file AArch64Subtarget.h.

References MaxJumpTableSize.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getMaxInterleaveFactor()

unsigned llvm::AArch64Subtarget::getMaxInterleaveFactor ( ) const

inline

Definition at line 307 of file AArch64Subtarget.h.

References MaxInterleaveFactor.

◆ getMaxPrefetchIterationsAhead()

unsigned llvm::AArch64Subtarget::getMaxPrefetchIterationsAhead ( ) const

inlineoverride

Definition at line 319 of file AArch64Subtarget.h.

References MaxPrefetchIterationsAhead.

◆ getMaxSVEVectorSizeInBits()

unsigned llvm::AArch64Subtarget::getMaxSVEVectorSizeInBits ( ) const

inline

Definition at line 462 of file AArch64Subtarget.h.

References assert(), isSVEorStreamingSVEAvailable(), and MaxSVEVectorSizeInBits.

Referenced by findMoreOptimalIndexType(), and GenerateFixedLengthSVETBL().

◆ getMinimumJumpTableEntries()

unsigned llvm::AArch64Subtarget::getMinimumJumpTableEntries ( ) const

inline

Definition at line 332 of file AArch64Subtarget.h.

References MinimumJumpTableEntries.

◆ getMinPrefetchStride()

unsigned llvm::AArch64Subtarget::getMinPrefetchStride	(	unsigned	NumMemAccesses,
		unsigned	NumStridedMemAccesses,
		unsigned	NumPrefetches,
		bool	HasCall ) const

inlineoverride

Definition at line 313 of file AArch64Subtarget.h.

References MinPrefetchStride.

◆ getMinSVEVectorSizeInBits()

unsigned llvm::AArch64Subtarget::getMinSVEVectorSizeInBits ( ) const

inline

Definition at line 468 of file AArch64Subtarget.h.

References assert(), isSVEorStreamingSVEAvailable(), and MinSVEVectorSizeInBits.

Referenced by GenerateFixedLengthSVETBL(), optimizeIncrementingWhile(), performFPExtendCombine(), performMSTORECombine(), performUnpackCombine(), and useSVEForFixedLengthVectors().

◆ getMinVectorRegisterBitWidth()

unsigned llvm::AArch64Subtarget::getMinVectorRegisterBitWidth ( ) const

inline

Definition at line 261 of file AArch64Subtarget.h.

References isNeonAvailable(), isSVEAvailable(), and MinVectorRegisterBitWidth.

◆ getNumXRegisterReserved()

unsigned llvm::AArch64Subtarget::getNumXRegisterReserved ( ) const

inline

Definition at line 273 of file AArch64Subtarget.h.

References llvm::BitVector::count(), ReserveXRegister, and ReserveXRegisterForRA.

◆ getPrefetchDistance()

unsigned llvm::AArch64Subtarget::getPrefetchDistance ( ) const

inlineoverride

Definition at line 312 of file AArch64Subtarget.h.

References PrefetchDistance.

◆ getPrefFunctionAlignment()

Align llvm::AArch64Subtarget::getPrefFunctionAlignment ( ) const

inline

Definition at line 322 of file AArch64Subtarget.h.

References PrefFunctionAlignment.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getPrefLoopAlignment()

Align llvm::AArch64Subtarget::getPrefLoopAlignment ( ) const

inline

Definition at line 325 of file AArch64Subtarget.h.

References PrefLoopAlignment.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getProcFamily()

ARMProcFamilyEnum llvm::AArch64Subtarget::getProcFamily ( ) const

inline

Returns ARM processor family.

Avoid this function! CPU specifics should be kept local to this class and preferably modeled with SubtargetFeatures or properties in initializeProperties().

Definition at line 193 of file AArch64Subtarget.h.

References ARMProcFamily.

◆ getPtrAuthBlockAddressDiscriminatorIfEnabled()

std::optional< uint16_t > AArch64Subtarget::getPtrAuthBlockAddressDiscriminatorIfEnabled ( const Function & ParentFn ) const

Compute the integer discriminator for a given BlockAddress constant, if blockaddress signing is enabled, or std::nullopt otherwise.

Blockaddress signing is controlled by the function attribute "ptrauth-indirect-gotos" on the parent function. Note that this assumes the discriminator is independent of the indirect goto branch site itself, i.e., it's the same for all BlockAddresses in a function.

Definition at line 575 of file AArch64Subtarget.cpp.

References llvm::Value::getName(), llvm::getPointerAuthStableSipHash(), and llvm::Function::hasFnAttribute().

◆ getRegBankInfo()

const RegisterBankInfo * AArch64Subtarget::getRegBankInfo ( ) const

override

Definition at line 374 of file AArch64Subtarget.cpp.

References RegBankInfo.

Referenced by llvm::AArch64CallLowering::lowerCall().

◆ getRegisterInfo()

const AArch64RegisterInfo * llvm::AArch64Subtarget::getRegisterInfo ( ) const

inlineoverride

Definition at line 173 of file AArch64Subtarget.h.

References getInstrInfo(), and llvm::AArch64InstrInfo::getRegisterInfo().

Referenced by AArch64Subtarget(), llvm::AArch64FrameLowering::canUseAsPrologue(), llvm::AArch64FrameLowering::determineCalleeSaves(), llvm::AArch64RegisterBankInfo::getInstrMapping(), and llvm::AArch64CallLowering::lowerCall().

◆ getScatterOverhead()

unsigned llvm::AArch64Subtarget::getScatterOverhead ( ) const

inline

Definition at line 310 of file AArch64Subtarget.h.

References ScatterOverhead.

◆ getSelectionDAGInfo()

const AArch64SelectionDAGInfo * llvm::AArch64Subtarget::getSelectionDAGInfo ( ) const

inlineoverride

Definition at line 163 of file AArch64Subtarget.h.

References TSInfo.

◆ getStreamingHazardSize()

unsigned llvm::AArch64Subtarget::getStreamingHazardSize ( ) const

inline

Returns the size of memory region that if accessed by both the CPU and the SME unit could result in a hazard.

0 = disabled.

Definition at line 223 of file AArch64Subtarget.h.

◆ getSVEPredicateSizeInBits()

unsigned llvm::AArch64Subtarget::getSVEPredicateSizeInBits ( ) const

inline

Definition at line 486 of file AArch64Subtarget.h.

References getSVEVectorSizeInBits().

Referenced by performPredicateLoadCombine().

◆ getSVETailFoldingDefaultOpts()

TailFoldingOpts llvm::AArch64Subtarget::getSVETailFoldingDefaultOpts ( ) const

inline

Definition at line 507 of file AArch64Subtarget.h.

References DefaultSVETFOpts.

◆ getSVEVectorSizeInBits()

unsigned llvm::AArch64Subtarget::getSVEVectorSizeInBits ( ) const

inline

Definition at line 476 of file AArch64Subtarget.h.

References assert(), isSVEorStreamingSVEAvailable(), MaxSVEVectorSizeInBits, and MinSVEVectorSizeInBits.

Referenced by getPTrue(), and getSVEPredicateSizeInBits().

◆ getTargetLowering()

const AArch64TargetLowering * llvm::AArch64Subtarget::getTargetLowering ( ) const

inlineoverride

Definition at line 169 of file AArch64Subtarget.h.

References TLInfo.

Referenced by AArch64Subtarget(), llvm::AArch64FrameLowering::canUseAsPrologue(), llvm::AArch64FrameLowering::canUseRedZone(), llvm::AArch64FrameLowering::eliminateCallFramePseudoInstr(), llvm::AArch64SelectionDAGInfo::EmitStreamingCompatibleMemLibCall(), finishStackBlock(), llvm::AArch64RegisterInfo::getCallPreservedMask(), llvm::AArch64RegisterInfo::getDarwinCallPreservedMask(), preferGPRForFPImm(), produceCompactUnwindFrame(), and llvm::AArch64FrameLowering::spillCalleeSavedRegisters().

◆ getTargetTriple()

const Triple & llvm::AArch64Subtarget::getTargetTriple ( ) const

inline

Definition at line 181 of file AArch64Subtarget.h.

References TargetTriple.

Referenced by classifyGlobalFunctionReference(), ClassifyGlobalReference(), hasELFSignedGOTHelper(), ShouldSignWithBKey(), and swiftAsyncContextIsDynamicallySet().

◆ getVectorInsertExtractBaseCost()

unsigned AArch64Subtarget::getVectorInsertExtractBaseCost ( ) const

Definition at line 51 of file AArch64Subtarget.cpp.

References VectorInsertExtractBaseCost.

◆ getVScaleForTuning()

unsigned llvm::AArch64Subtarget::getVScaleForTuning ( ) const

inline

Definition at line 505 of file AArch64Subtarget.h.

References VScaleForTuning.

◆ hasCustomCallingConv()

bool llvm::AArch64Subtarget::hasCustomCallingConv ( ) const

inline

Definition at line 283 of file AArch64Subtarget.h.

References CustomCallSavedXRegs.

Referenced by llvm::AArch64CallLowering::lowerCall().

◆ hasFusion()

bool llvm::AArch64Subtarget::hasFusion ( ) const

inline

Return true if the CPU supports any kind of instruction fusion.

Definition at line 286 of file AArch64Subtarget.h.

◆ isAppleMLike()

bool llvm::AArch64Subtarget::isAppleMLike ( ) const

inline

Returns true if the processor is an Apple M-series or aligned A-series (A14 or newer).

Definition at line 199 of file AArch64Subtarget.h.

References ARMProcFamily.

◆ isCallingConvWin64()

bool llvm::AArch64Subtarget::isCallingConvWin64	(	CallingConv::ID	CC,
		bool	IsVarArg ) const

inline

Definition at line 417 of file AArch64Subtarget.h.

References llvm::CallingConv::C, llvm::CallingConv::Fast, isTargetWindows(), llvm::CallingConv::PreserveNone, llvm::CallingConv::Swift, llvm::CallingConv::SwiftTail, and llvm::CallingConv::Win64.

Referenced by analyzeCallOperands(), and llvm::AArch64RegisterInfo::isArgumentRegister().

◆ isLFI()

bool llvm::AArch64Subtarget::isLFI ( ) const

inline

Definition at line 351 of file AArch64Subtarget.h.

References TargetTriple.

Referenced by llvm::AArch64RegisterInfo::getStrictlyReservedRegs().

◆ isLittleEndian()

bool llvm::AArch64Subtarget::isLittleEndian ( ) const

inline

Definition at line 342 of file AArch64Subtarget.h.

References IsLittle.

Referenced by DecodeNEONSplat(), isNVCastToHalfWidthElements(), performExtractVectorEltCombine(), and performNVCASTCombine().

◆ isLRReservedForRA()

bool llvm::AArch64Subtarget::isLRReservedForRA ( ) const

inline

Definition at line 279 of file AArch64Subtarget.h.

Referenced by llvm::AArch64RegisterInfo::getReservedRegs().

◆ isNeonAvailable()

bool llvm::AArch64Subtarget::isNeonAvailable ( ) const

inline

Returns true if the target has NEON and the function at runtime is known to have NEON enabled (e.g.

the function is known not to be in streaming-SVE mode, which disables NEON instructions).

Definition at line 231 of file AArch64Subtarget.h.

References isStreaming(), and isStreamingCompatible().

Referenced by llvm::AArch64FrameLowering::canUseRedZone(), foldMaskedShiftToUSHL(), GenerateFixedLengthSVETBL(), getMinVectorRegisterBitWidth(), isEligibleForSmallVectorLoadOpt(), performBuildVectorCombine(), performExtendToBoolVectorLoadCombine(), performIntToFpCombine(), performLegalizedVectorDeinterleaveCombine(), performVectorDeinterleaveCombine(), tryAdvSIMDModImm16(), tryAdvSIMDModImm32(), useSVEForFixedLengthVectors(), and useSVEForFixedLengthVectors().

◆ isNonStreamingSVEorSME2Available()

bool llvm::AArch64Subtarget::isNonStreamingSVEorSME2Available ( ) const

inline

Returns true if the target has access to either the full range of SVE instructions, or the streaming-compatible subset of SVE instructions available to SME2.

Definition at line 257 of file AArch64Subtarget.h.

References isSVEAvailable(), and isSVEorStreamingSVEAvailable().

◆ isStreaming()

bool llvm::AArch64Subtarget::isStreaming ( ) const

inline

Returns true if the function has a streaming body.

Definition at line 216 of file AArch64Subtarget.h.

References IsStreaming.

Referenced by enableMultiVectorSpillFill(), hasSVEMultiVectorOps(), INITIALIZE_PASS(), isNeonAvailable(), isStreamingSVEAvailable(), isSVEAvailable(), and tryToReplaceScalarFPConversionWithSVE().

◆ isStreamingCompatible()

bool llvm::AArch64Subtarget::isStreamingCompatible ( ) const

inline

Returns true if the function has a streaming-compatible body.

Definition at line 219 of file AArch64Subtarget.h.

References IsStreamingCompatible.

Referenced by isNeonAvailable(), isSVEAvailable(), and tryToReplaceScalarFPConversionWithSVE().

◆ isStreamingSVEAvailable()

bool llvm::AArch64Subtarget::isStreamingSVEAvailable ( ) const

inline

Returns true if the target has access to the streaming-compatible subset of SVE instructions.

Definition at line 246 of file AArch64Subtarget.h.

References isStreaming().

Referenced by isSVEorStreamingSVEAvailable().

◆ isSVEAvailable()

bool llvm::AArch64Subtarget::isSVEAvailable ( ) const

inline

Returns true if the target has SVE and can use the full range of SVE instructions, for example because it knows the function is known not to be in streaming-SVE mode or when the target has FEAT_FA64 enabled.

Definition at line 239 of file AArch64Subtarget.h.

References isStreaming(), and isStreamingCompatible().

Referenced by foldMaskedShiftToUSHL(), getMinVectorRegisterBitWidth(), and isNonStreamingSVEorSME2Available().

◆ isSVEorStreamingSVEAvailable()

bool llvm::AArch64Subtarget::isSVEorStreamingSVEAvailable ( ) const

inline

Returns true if the target has access to either the full range of SVE instructions, or the streaming-compatible subset of SVE instructions.

Definition at line 250 of file AArch64Subtarget.h.

References isStreamingSVEAvailable().

Referenced by getMaxSVEVectorSizeInBits(), getMinSVEVectorSizeInBits(), getSVEVectorSizeInBits(), hasSVEMultiVectorOps(), isNonStreamingSVEorSME2Available(), performDUPCombine(), performExtractLastActiveCombine(), performLegalizedVectorDeinterleaveCombine(), performPredicateLoadCombine(), tryToReplaceScalarFPConversionWithSVE(), and useSVEForFixedLengthVectors().

◆ isTargetAndroid()

bool llvm::AArch64Subtarget::isTargetAndroid ( ) const

inline

Definition at line 348 of file AArch64Subtarget.h.

References TargetTriple.

◆ isTargetCOFF()

bool llvm::AArch64Subtarget::isTargetCOFF ( ) const

inline

Definition at line 353 of file AArch64Subtarget.h.

References TargetTriple.

◆ isTargetDarwin()

bool llvm::AArch64Subtarget::isTargetDarwin ( ) const

inline

Definition at line 344 of file AArch64Subtarget.h.

References TargetTriple.

Referenced by CC_AArch64_Custom_Block(), llvm::AArch64RegisterInfo::getCallPreservedMask(), llvm::AArch64RegisterInfo::getDarwinCallPreservedMask(), llvm::AArch64RegisterInfo::getThisReturnPreservedMask(), llvm::AArch64RegisterInfo::isArgumentRegister(), and isX16X17Safer().

◆ isTargetELF()

bool llvm::AArch64Subtarget::isTargetELF ( ) const

inline

Definition at line 354 of file AArch64Subtarget.h.

References TargetTriple.

◆ isTargetFuchsia()

bool llvm::AArch64Subtarget::isTargetFuchsia ( ) const

inline

Definition at line 349 of file AArch64Subtarget.h.

References TargetTriple.

◆ isTargetILP32()

bool llvm::AArch64Subtarget::isTargetILP32 ( ) const

inline

Definition at line 357 of file AArch64Subtarget.h.

References llvm::Triple::GNUILP32, and TargetTriple.

Referenced by addrSinkUsingGEPs(), CC_AArch64_Custom_Block(), and llvm::AArch64RegisterInfo::isArgumentRegister().

◆ isTargetIOS()

bool llvm::AArch64Subtarget::isTargetIOS ( ) const

inline

Definition at line 345 of file AArch64Subtarget.h.

References TargetTriple.

◆ isTargetLinux()

bool llvm::AArch64Subtarget::isTargetLinux ( ) const

inline

Definition at line 346 of file AArch64Subtarget.h.

References TargetTriple.

Referenced by llvm::AArch64RegisterInfo::getCustomEHPadPreservedMask().

◆ isTargetMachO()

bool llvm::AArch64Subtarget::isTargetMachO ( ) const

inline

Definition at line 355 of file AArch64Subtarget.h.

References TargetTriple.

Referenced by CC_AArch64_Custom_Block(), classifyGlobalFunctionReference(), ClassifyGlobalReference(), and produceCompactUnwindFrame().

◆ isTargetWindows()

bool llvm::AArch64Subtarget::isTargetWindows ( ) const

inline

Definition at line 347 of file AArch64Subtarget.h.

References TargetTriple.

Referenced by llvm::AArch64FunctionInfo::AArch64FunctionInfo(), llvm::AArch64FrameLowering::determineCalleeSaves(), llvm::AArch64RegisterInfo::isArgumentRegister(), and isCallingConvWin64().

◆ isWindowsArm64EC()

bool llvm::AArch64Subtarget::isWindowsArm64EC ( ) const

inline

Definition at line 350 of file AArch64Subtarget.h.

References TargetTriple.

Referenced by classifyGlobalFunctionReference(), llvm::AArch64RegisterInfo::explainReservedReg(), llvm::AArch64RegisterInfo::getStrictlyReservedRegs(), and llvm::AArch64CallLowering::lowerCall().

◆ isX16X17Safer()

bool AArch64Subtarget::isX16X17Safer ( ) const

Returns whether the operating system makes it safer to store sensitive values in x16 and x17 as opposed to other registers.

Definition at line 585 of file AArch64Subtarget.cpp.

References isTargetDarwin().

◆ isXRaySupported()

bool llvm::AArch64Subtarget::isXRaySupported ( ) const

inlineoverride

Definition at line 213 of file AArch64Subtarget.h.

◆ isXRegCustomCalleeSaved()

bool llvm::AArch64Subtarget::isXRegCustomCalleeSaved ( size_t i ) const

inline

Definition at line 280 of file AArch64Subtarget.h.

References CustomCallSavedXRegs.

Referenced by llvm::AArch64RegisterInfo::UpdateCustomCalleeSavedRegs(), and llvm::AArch64RegisterInfo::UpdateCustomCallPreservedMask().

◆ isXRegisterReserved()

bool llvm::AArch64Subtarget::isXRegisterReserved ( size_t i ) const

inline

Definition at line 271 of file AArch64Subtarget.h.

References ReserveXRegister.

Referenced by llvm::AArch64RegisterInfo::getStrictlyReservedRegs(), llvm::AArch64RegisterInfo::getUserReservedRegs(), llvm::AArch64RegisterInfo::isAnyArgRegReserved(), and llvm::AArch64FunctionInfo::needsShadowCallStackPrologueEpilogue().

◆ isXRegisterReservedForRA()

bool llvm::AArch64Subtarget::isXRegisterReservedForRA ( size_t i ) const

inline

Definition at line 272 of file AArch64Subtarget.h.

References ReserveXRegisterForRA.

Referenced by llvm::AArch64RegisterInfo::getReservedRegs().

◆ mirFileLoaded()

void AArch64Subtarget::mirFileLoaded ( MachineFunction & MF ) const

override

Definition at line 530 of file AArch64Subtarget.cpp.

References llvm::MachineFrameInfo::computeMaxCallFrameSize(), llvm::MachineFunction::getFrameInfo(), and llvm::MachineFrameInfo::isMaxCallFrameSizeComputed().

◆ overrideSchedPolicy()

void AArch64Subtarget::overrideSchedPolicy	(	MachineSchedPolicy &	Policy,
		const SchedRegion &	Region ) const

override

Definition at line 457 of file AArch64Subtarget.cpp.

References llvm::MachineSchedPolicy::DisableLatencyHeuristic, llvm::MachineSchedPolicy::OnlyBottomUp, and llvm::MachineSchedPolicy::OnlyTopDown.

◆ ParseSubtargetFeatures()

void llvm::AArch64Subtarget::ParseSubtargetFeatures	(	StringRef	CPU,
		StringRef	TuneCPU,
		StringRef	FS )

ParseSubtargetFeatures - Parses features string setting specified subtarget options.

Definition of function is auto generated by tblgen.

◆ supportsAddressTopByteIgnored()

bool AArch64Subtarget::supportsAddressTopByteIgnored ( ) const

CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it.

Definition at line 512 of file AArch64Subtarget.cpp.

References TargetTriple.

◆ swiftAsyncContextIsDynamicallySet()

bool llvm::AArch64Subtarget::swiftAsyncContextIsDynamicallySet ( ) const

inline

Return whether FrameLowering should always set the "extended frame present" bit in FP, or set it based on a symbol in the runtime.

Definition at line 435 of file AArch64Subtarget.h.

References llvm::Triple::Darwin, getTargetTriple(), llvm::Triple::IOS, llvm::Triple::MacOSX, llvm::Triple::TvOS, and llvm::Triple::WatchOS.

◆ useAA()

bool AArch64Subtarget::useAA ( ) const

override

Definition at line 540 of file AArch64Subtarget.cpp.

Referenced by addrSinkUsingGEPs().

◆ useDFAforSMS()

bool llvm::AArch64Subtarget::useDFAforSMS ( ) const

inlineoverride

Definition at line 187 of file AArch64Subtarget.h.

◆ useScalarIncVL()

bool AArch64Subtarget::useScalarIncVL ( ) const

Returns true to use the addvl/inc/dec instructions, as opposed to separate add + cnt instructions.

Definition at line 542 of file AArch64Subtarget.cpp.

References llvm::valueOr().

◆ useSmallAddressing()

bool llvm::AArch64Subtarget::useSmallAddressing ( ) const

inline

Definition at line 370 of file AArch64Subtarget.h.

References llvm::CodeModel::Kernel, llvm::CodeModel::Small, and TLInfo.

Referenced by ClassifyGlobalReference().

◆ useSVEForFixedLengthVectors() [1/2]

bool llvm::AArch64Subtarget::useSVEForFixedLengthVectors ( ) const

inline

Definition at line 490 of file AArch64Subtarget.h.

References getMinSVEVectorSizeInBits(), isNeonAvailable(), and isSVEorStreamingSVEAvailable().

Referenced by performFPExtendCombine(), and useSVEForFixedLengthVectors().

◆ useSVEForFixedLengthVectors() [2/2]

bool llvm::AArch64Subtarget::useSVEForFixedLengthVectors ( EVT VT ) const

inline

Definition at line 498 of file AArch64Subtarget.h.

References llvm::EVT::getFixedSizeInBits(), llvm::EVT::isFixedLengthVector(), isNeonAvailable(), llvm::AArch64::SVEBitsPerBlock, and useSVEForFixedLengthVectors().

Member Data Documentation

◆ ARMProcFamily

ARMProcFamilyEnum llvm::AArch64Subtarget::ARMProcFamily = Generic

protected

ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.

Definition at line 70 of file AArch64Subtarget.h.

Referenced by getProcFamily(), and isAppleMLike().

◆ CacheLineSize

uint16_t llvm::AArch64Subtarget::CacheLineSize = 64

protected

Definition at line 83 of file AArch64Subtarget.h.

Referenced by getCacheLineSize().

◆ CallLoweringInfo

std::unique_ptr<CallLowering> llvm::AArch64Subtarget::CallLoweringInfo

protected

GlobalISel related APIs.

Definition at line 127 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getCallLowering().

◆ CustomCallSavedXRegs

BitVector llvm::AArch64Subtarget::CustomCallSavedXRegs

protected

Definition at line 104 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), hasCustomCallingConv(), and isXRegCustomCalleeSaved().

◆ DefaultSVETFOpts

TailFoldingOpts llvm::AArch64Subtarget::DefaultSVETFOpts = TailFoldingOpts::Disabled

protected

Definition at line 114 of file AArch64Subtarget.h.

Referenced by getSVETailFoldingDefaultOpts().

◆ EnableSRLTSubregToRegMitigation

bool llvm::AArch64Subtarget::EnableSRLTSubregToRegMitigation

protected

Definition at line 112 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and enableSRLTSubregToRegMitigation().

◆ EnableSubregLiveness

bool llvm::AArch64Subtarget::EnableSubregLiveness

protected

Definition at line 116 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and enableSubRegLiveness().

◆ EpilogueVectorizationMinVF

unsigned llvm::AArch64Subtarget::EpilogueVectorizationMinVF = 16

protected

Definition at line 80 of file AArch64Subtarget.h.

Referenced by getEpilogueVectorizationMinVF().

◆ FixedLoadLatency

unsigned llvm::AArch64Subtarget::FixedLoadLatency = 0

protected

Definition at line 95 of file AArch64Subtarget.h.

Referenced by getFixedLoadLatency().

◆ FrameLowering

AArch64FrameLowering llvm::AArch64Subtarget::FrameLowering

protected

Definition at line 121 of file AArch64Subtarget.h.

Referenced by getFrameLowering().

◆ GatherOverhead

unsigned llvm::AArch64Subtarget::GatherOverhead = 10

protected

Definition at line 86 of file AArch64Subtarget.h.

Referenced by getGatherOverhead().

◆ InlineAsmLoweringInfo

std::unique_ptr<InlineAsmLowering> llvm::AArch64Subtarget::InlineAsmLoweringInfo

protected

Definition at line 128 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getInlineAsmLowering().

◆ InstrInfo

AArch64InstrInfo llvm::AArch64Subtarget::InstrInfo

protected

Definition at line 122 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getInstrInfo().

◆ InstSelector

std::unique_ptr<InstructionSelector> llvm::AArch64Subtarget::InstSelector

protected

Definition at line 129 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getInstructionSelector().

◆ IsLittle

bool llvm::AArch64Subtarget::IsLittle

protected

Definition at line 106 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and isLittleEndian().

◆ IsStreaming

bool llvm::AArch64Subtarget::IsStreaming

protected

Definition at line 108 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and isStreaming().

◆ IsStreamingCompatible

bool llvm::AArch64Subtarget::IsStreamingCompatible

protected

Definition at line 109 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and isStreamingCompatible().

◆ Legalizer

std::unique_ptr<LegalizerInfo> llvm::AArch64Subtarget::Legalizer

protected

Definition at line 130 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getLegalizerInfo().

◆ MaxBytesForLoopAlignment

unsigned llvm::AArch64Subtarget::MaxBytesForLoopAlignment = 0

protected

Definition at line 92 of file AArch64Subtarget.h.

Referenced by getMaxBytesForLoopAlignment().

◆ MaxInterleaveFactor

uint8_t llvm::AArch64Subtarget::MaxInterleaveFactor = 2

protected

Definition at line 81 of file AArch64Subtarget.h.

Referenced by getMaxInterleaveFactor().

◆ MaxJumpTableSize

unsigned llvm::AArch64Subtarget::MaxJumpTableSize = 0

protected

Definition at line 94 of file AArch64Subtarget.h.

Referenced by getMaximumJumpTableSize().

◆ MaxPrefetchIterationsAhead

unsigned llvm::AArch64Subtarget::MaxPrefetchIterationsAhead = UINT_MAX

protected

Definition at line 89 of file AArch64Subtarget.h.

Referenced by getMaxPrefetchIterationsAhead().

◆ MaxSVEVectorSizeInBits

unsigned llvm::AArch64Subtarget::MaxSVEVectorSizeInBits

protected

Definition at line 111 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), getMaxSVEVectorSizeInBits(), and getSVEVectorSizeInBits().

◆ MinimumJumpTableEntries

unsigned llvm::AArch64Subtarget::MinimumJumpTableEntries = 4

protected

Definition at line 93 of file AArch64Subtarget.h.

Referenced by getMinimumJumpTableEntries().

◆ MinPrefetchStride

uint16_t llvm::AArch64Subtarget::MinPrefetchStride = 1

protected

Definition at line 88 of file AArch64Subtarget.h.

Referenced by getMinPrefetchStride().

◆ MinSVEVectorSizeInBits

unsigned llvm::AArch64Subtarget::MinSVEVectorSizeInBits

protected

Definition at line 110 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), getMinSVEVectorSizeInBits(), and getSVEVectorSizeInBits().

◆ MinVectorRegisterBitWidth

unsigned llvm::AArch64Subtarget::MinVectorRegisterBitWidth = 64

protected

Definition at line 73 of file AArch64Subtarget.h.

Referenced by getMinVectorRegisterBitWidth().

◆ PrefetchDistance

uint16_t llvm::AArch64Subtarget::PrefetchDistance = 0

protected

Definition at line 87 of file AArch64Subtarget.h.

Referenced by getPrefetchDistance().

◆ PrefFunctionAlignment

Align llvm::AArch64Subtarget::PrefFunctionAlignment

protected

Definition at line 90 of file AArch64Subtarget.h.

Referenced by getPrefFunctionAlignment().

◆ PrefLoopAlignment

Align llvm::AArch64Subtarget::PrefLoopAlignment

protected

Definition at line 91 of file AArch64Subtarget.h.

Referenced by getPrefLoopAlignment().

◆ RegBankInfo

std::unique_ptr<RegisterBankInfo> llvm::AArch64Subtarget::RegBankInfo

protected

Definition at line 131 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getRegBankInfo().

◆ ReserveXRegister

BitVector llvm::AArch64Subtarget::ReserveXRegister

protected

Definition at line 98 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), getNumXRegisterReserved(), and isXRegisterReserved().

◆ ReserveXRegisterForRA

BitVector llvm::AArch64Subtarget::ReserveXRegisterForRA

protected

Definition at line 101 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), getNumXRegisterReserved(), and isXRegisterReservedForRA().

◆ ScatterOverhead

unsigned llvm::AArch64Subtarget::ScatterOverhead = 10

protected

Definition at line 85 of file AArch64Subtarget.h.

Referenced by getScatterOverhead().

◆ TargetTriple

Triple llvm::AArch64Subtarget::TargetTriple

protected

TargetTriple - What processor and OS we're targeting.

Definition at line 119 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), getTargetTriple(), isLFI(), isTargetAndroid(), isTargetCOFF(), isTargetDarwin(), isTargetELF(), isTargetFuchsia(), isTargetILP32(), isTargetIOS(), isTargetLinux(), isTargetMachO(), isTargetWindows(), isWindowsArm64EC(), and supportsAddressTopByteIgnored().

◆ TLInfo

AArch64TargetLowering llvm::AArch64Subtarget::TLInfo

protected

Definition at line 124 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), getTargetLowering(), and useSmallAddressing().

◆ TSInfo

AArch64SelectionDAGInfo llvm::AArch64Subtarget::TSInfo

protected

Definition at line 123 of file AArch64Subtarget.h.

Referenced by getSelectionDAGInfo().

◆ VectorInsertExtractBaseCost

uint8_t llvm::AArch64Subtarget::VectorInsertExtractBaseCost = 2

protected

Definition at line 82 of file AArch64Subtarget.h.

Referenced by getVectorInsertExtractBaseCost().

◆ VScaleForTuning

unsigned llvm::AArch64Subtarget::VScaleForTuning = 1

protected

Definition at line 113 of file AArch64Subtarget.h.

Referenced by getVScaleForTuning().

The documentation for this class was generated from the following files:

lib/Target/AArch64/AArch64Subtarget.h
lib/Target/AArch64/AArch64Subtarget.cpp

Public Types

Public Member Functions

Protected Attributes

Detailed Description

Member Enumeration Documentation

◆ ARMProcFamilyEnum

Constructor & Destructor Documentation

◆ AArch64Subtarget()

Member Function Documentation

◆ addrSinkUsingGEPs()

◆ adjustSchedDependency()

◆ classifyGlobalFunctionReference() [1/2]

◆ classifyGlobalFunctionReference() [2/2]

◆ ClassifyGlobalReference()

◆ enableAggressiveInterleaving()

◆ enableEarlyIfConversion()

◆ enableMachinePipeliner()

◆ enableMachineScheduler()

◆ enablePostRAScheduler()

◆ enableSRLTSubregToRegMitigation()

◆ enableSubRegLiveness()

◆ fusesMOVImmPair() [1/2]

◆ fusesMOVImmPair() [2/2]

◆ getAuthenticatedLRCheckMethod()

◆ getCacheLineSize()

◆ getCallLowering()

◆ getCLOpts()

◆ getCustomPBQPConstraints()

◆ getEpilogueVectorizationMinVF()

◆ getFixedLoadLatency()

◆ getFrameLowering()

◆ getGatherOverhead()

◆ getInlineAsmLowering()

◆ getInstrInfo()

◆ getInstructionSelector()

◆ getLegalizerInfo()

◆ getMaxBytesForLoopAlignment()

◆ getMaximumJumpTableSize()

◆ getMaxInterleaveFactor()

◆ getMaxPrefetchIterationsAhead()

◆ getMaxSVEVectorSizeInBits()

◆ getMinimumJumpTableEntries()

◆ getMinPrefetchStride()

◆ getMinSVEVectorSizeInBits()

◆ getMinVectorRegisterBitWidth()

◆ getNumXRegisterReserved()

◆ getPrefetchDistance()

◆ getPrefFunctionAlignment()

◆ getPrefLoopAlignment()

◆ getProcFamily()

◆ getPtrAuthBlockAddressDiscriminatorIfEnabled()

◆ getRegBankInfo()

◆ getRegisterInfo()

◆ getScatterOverhead()

◆ getSelectionDAGInfo()

◆ getStreamingHazardSize()

◆ getSVEPredicateSizeInBits()

◆ getSVETailFoldingDefaultOpts()

◆ getSVEVectorSizeInBits()

◆ getTargetLowering()

◆ getTargetTriple()

◆ getVectorInsertExtractBaseCost()

◆ getVScaleForTuning()

◆ hasCustomCallingConv()

◆ hasFusion()

◆ isAppleMLike()

◆ isCallingConvWin64()

◆ isLFI()

◆ isLittleEndian()

◆ isLRReservedForRA()

◆ isNeonAvailable()

◆ isNonStreamingSVEorSME2Available()

◆ isStreaming()

◆ isStreamingCompatible()

◆ isStreamingSVEAvailable()

◆ isSVEAvailable()

◆ isSVEorStreamingSVEAvailable()

◆ isTargetAndroid()

◆ isTargetCOFF()

◆ isTargetDarwin()