LLVM  13.0.0git
Public Member Functions | List of all members
llvm::AArch64TTIImpl Class Reference

#include "Target/AArch64/AArch64TargetTransformInfo.h"

Inheritance diagram for llvm::AArch64TTIImpl:
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Collaboration diagram for llvm::AArch64TTIImpl:
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Public Member Functions

 AArch64TTIImpl (const AArch64TargetMachine *TM, const Function &F)
 
bool areInlineCompatible (const Function *Caller, const Function *Callee) const
 
Scalar TTI Implementations
int getIntImmCost (int64_t Val)
 Calculate the cost of materializing a 64-bit value. More...
 
int getIntImmCost (const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
 Calculate the cost of materializing the given constant. More...
 
int getIntImmCostInst (unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr)
 
int getIntImmCostIntrin (Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
 
TTI::PopcntSupportKind getPopcntSupport (unsigned TyWidth)
 
Vector TTI Implementations
bool enableInterleavedAccessVectorization ()
 
unsigned getNumberOfRegisters (unsigned ClassID) const
 
unsigned getIntrinsicInstrCost (const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
 
unsigned getRegisterBitWidth (bool Vector) const
 
unsigned getMinVectorRegisterBitWidth ()
 
Optional< unsigned > getMaxVScale () const
 
unsigned getMaxInterleaveFactor (unsigned VF)
 
unsigned getGatherScatterOpCost (unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
 
int getCastInstrCost (unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
 
int getExtractWithExtendCost (unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index)
 
unsigned getCFInstrCost (unsigned Opcode, TTI::TargetCostKind CostKind)
 
int getVectorInstrCost (unsigned Opcode, Type *Val, unsigned Index)
 
int getMinMaxReductionCost (VectorType *Ty, VectorType *CondTy, bool IsPairwise, bool IsUnsigned, TTI::TargetCostKind CostKind)
 
int getArithmeticReductionCostSVE (unsigned Opcode, VectorType *ValTy, bool IsPairwiseForm, TTI::TargetCostKind CostKind)
 
int getArithmeticInstrCost (unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, TTI::OperandValueKind Opd1Info=TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info=TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo=TTI::OP_None, TTI::OperandValueProperties Opd2PropInfo=TTI::OP_None, ArrayRef< const Value * > Args=ArrayRef< const Value * >(), const Instruction *CxtI=nullptr)
 
int getAddressComputationCost (Type *Ty, ScalarEvolution *SE, const SCEV *Ptr)
 
int getCmpSelInstrCost (unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
 
TTI::MemCmpExpansionOptions enableMemCmpExpansion (bool OptSize, bool IsZeroCmp) const
 
bool useNeonVector (const Type *Ty) const
 
int getMemoryOpCost (unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
 
int getCostOfKeepingLiveOverCall (ArrayRef< Type * > Tys)
 
void getUnrollingPreferences (Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP)
 
void getPeelingPreferences (Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP)
 
Value * getOrCreateResultFromMemIntrinsic (IntrinsicInst *Inst, Type *ExpectedType)
 
bool getTgtMemIntrinsic (IntrinsicInst *Inst, MemIntrinsicInfo &Info)
 
bool isLegalElementTypeForSVE (Type *Ty) const
 
bool isLegalMaskedLoadStore (Type *DataType, Align Alignment)
 
bool isLegalMaskedLoad (Type *DataType, Align Alignment)
 
bool isLegalMaskedStore (Type *DataType, Align Alignment)
 
bool isLegalMaskedGatherScatter (Type *DataType) const
 
bool isLegalMaskedGather (Type *DataType, Align Alignment) const
 
bool isLegalMaskedScatter (Type *DataType, Align Alignment) const
 
bool isLegalNTStore (Type *DataType, Align Alignment)
 
int getInterleavedMemoryOpCost (unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, bool UseMaskForCond=false, bool UseMaskForGaps=false)
 
bool shouldConsiderAddressTypePromotion (const Instruction &I, bool &AllowPromotionWithoutCommonHeader)
 See if I should be considered for address type promotion. More...
 
bool shouldExpandReduction (const IntrinsicInst *II) const
 
unsigned getGISelRematGlobalCost () const
 
bool supportsScalableVectors () const
 
bool isLegalToVectorizeReduction (RecurrenceDescriptor RdxDesc, ElementCount VF) const
 
int getArithmeticReductionCost (unsigned Opcode, VectorType *Ty, bool IsPairwiseForm, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput)
 
int getShuffleCost (TTI::ShuffleKind Kind, VectorType *Tp, int Index, VectorType *SubTp)
 
- Public Member Functions inherited from llvm::BasicTTIImplBase< AArch64TTIImpl >
bool allowsMisalignedMemoryAccesses (LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, bool *Fast) const
 
bool hasBranchDivergence ()
 
bool useGPUDivergenceAnalysis ()
 
bool isSourceOfDivergence (const Value *V)
 
bool isAlwaysUniform (const Value *V)
 
unsigned getFlatAddressSpace ()
 
bool collectFlatAddressOperands (SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const
 
bool isNoopAddrSpaceCast (unsigned FromAS, unsigned ToAS) const
 
unsigned getAssumedAddrSpace (const Value *V) const
 
Value * rewriteIntrinsicWithAddressSpace (IntrinsicInst *II, Value *OldV, Value *NewV) const
 
bool isLegalAddImmediate (int64_t imm)
 
bool isLegalICmpImmediate (int64_t imm)
 
bool isLegalAddressingMode (Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr)
 
bool isIndexedLoadLegal (TTI::MemIndexedMode M, Type *Ty, const DataLayout &DL) const
 
bool isIndexedStoreLegal (TTI::MemIndexedMode M, Type *Ty, const DataLayout &DL) const
 
bool isLSRCostLess (TTI::LSRCost C1, TTI::LSRCost C2)
 
bool isNumRegsMajorCostOfLSR ()
 
bool isProfitableLSRChainElement (Instruction *I)
 
int getScalingFactorCost (Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace)
 
bool isTruncateFree (Type *Ty1, Type *Ty2)
 
bool isProfitableToHoist (Instruction *I)
 
bool useAA () const
 
bool isTypeLegal (Type *Ty)
 
unsigned getRegUsageForType (Type *Ty)
 
int getGEPCost (Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands)
 
unsigned getEstimatedNumberOfCaseClusters (const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI)
 
bool shouldBuildLookupTables ()
 
bool haveFastSqrt (Type *Ty)
 
bool isFCmpOrdCheaperThanFCmpZero (Type *Ty)
 
unsigned getFPOpCost (Type *Ty)
 
unsigned getInliningThresholdMultiplier ()
 
unsigned adjustInliningThreshold (const CallBase *CB)
 
int getInlinerVectorBonusPercent ()
 
void getUnrollingPreferences (Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP)
 
void getPeelingPreferences (Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP)
 
bool isHardwareLoopProfitable (Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo)
 
bool preferPredicateOverEpilogue (Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *TLI, DominatorTree *DT, const LoopAccessInfo *LAI)
 
bool emitGetActiveLaneMask ()
 
Optional< Instruction * > instCombineIntrinsic (InstCombiner &IC, IntrinsicInst &II)
 
Optional< Value * > simplifyDemandedUseBitsIntrinsic (InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed)
 
Optional< Value * > simplifyDemandedVectorEltsIntrinsic (InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp)
 
int getInstructionLatency (const Instruction *I)
 
virtual Optional< unsigned > getCacheSize (TargetTransformInfo::CacheLevel Level) const
 
virtual Optional< unsigned > getCacheAssociativity (TargetTransformInfo::CacheLevel Level) const
 
virtual unsigned getCacheLineSize () const
 
virtual unsigned getPrefetchDistance () const
 
virtual unsigned getMinPrefetchStride (unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const
 
virtual unsigned getMaxPrefetchIterationsAhead () const
 
virtual bool enableWritePrefetching () const
 
unsigned getRegisterBitWidth (bool Vector) const
 
Optional< unsigned > getMaxVScale () const
 
unsigned getScalarizationOverhead (VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract)
 Estimate the overhead of scalarizing an instruction. More...
 
unsigned getScalarizationOverhead (VectorType *InTy, bool Insert, bool Extract)
 Helper wrapper for the DemandedElts variant of getScalarizationOverhead. More...
 
unsigned getScalarizationOverhead (VectorType *RetTy, ArrayRef< const Value * > Args, ArrayRef< Type * > Tys)
 Estimate the overhead of scalarizing the inputs and outputs of an instruction, with return type RetTy and arguments Args of type Tys. More...
 
unsigned getOperandsScalarizationOverhead (ArrayRef< const Value * > Args, ArrayRef< Type * > Tys)
 Estimate the overhead of scalarizing an instructions unique non-constant operands. More...
 
unsigned getMaxInterleaveFactor (unsigned VF)
 
unsigned getArithmeticInstrCost (unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, TTI::OperandValueKind Opd1Info=TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info=TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo=TTI::OP_None, TTI::OperandValueProperties Opd2PropInfo=TTI::OP_None, ArrayRef< const Value * > Args=ArrayRef< const Value * >(), const Instruction *CxtI=nullptr)
 
unsigned getShuffleCost (TTI::ShuffleKind Kind, VectorType *Tp, int Index, VectorType *SubTp)
 
unsigned getCastInstrCost (unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
 
unsigned getExtractWithExtendCost (unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index)
 
unsigned getCFInstrCost (unsigned Opcode, TTI::TargetCostKind CostKind)
 
unsigned getCmpSelInstrCost (unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
 
unsigned getVectorInstrCost (unsigned Opcode, Type *Val, unsigned Index)
 
unsigned getMemoryOpCost (unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
 
unsigned getGatherScatterOpCost (unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
 
unsigned getInterleavedMemoryOpCost (unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false)
 
unsigned getIntrinsicInstrCost (const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
 Get intrinsic cost based on arguments. More...
 
unsigned getTypeBasedIntrinsicInstrCost (const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
 Get intrinsic cost based on argument types. More...
 
unsigned getCallInstrCost (Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency)
 Compute a cost of the given call instruction. More...
 
unsigned getNumberOfParts (Type *Tp)
 
unsigned getAddressComputationCost (Type *Ty, ScalarEvolution *, const SCEV *)
 
unsigned getArithmeticReductionCost (unsigned Opcode, VectorType *Ty, bool IsPairwise, TTI::TargetCostKind CostKind)
 Try to calculate arithmetic and shuffle op costs for reduction operations. More...
 
unsigned getMinMaxReductionCost (VectorType *Ty, VectorType *CondTy, bool IsPairwise, bool IsUnsigned, TTI::TargetCostKind CostKind)
 Try to calculate op costs for min/max reduction operations. More...
 
InstructionCost getExtendedAddReductionCost (bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind)
 
unsigned getVectorSplitCost ()
 
- Public Member Functions inherited from llvm::TargetTransformInfoImplCRTPBase< AArch64TTIImpl >
int getGEPCost (Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency)
 
int getGEPCost (Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency) const
 
int getUserCost (const User *U, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind)
 
int getInstructionLatency (const Instruction *I)
 
- Public Member Functions inherited from llvm::TargetTransformInfoImplBase
 TargetTransformInfoImplBase (const TargetTransformInfoImplBase &Arg)
 
 TargetTransformInfoImplBase (TargetTransformInfoImplBase &&Arg)
 
const DataLayout & getDataLayout () const
 
int getGEPCost (Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency) const
 
unsigned getEstimatedNumberOfCaseClusters (const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
 
unsigned getInliningThresholdMultiplier () const
 
unsigned adjustInliningThreshold (const CallBase *CB) const
 
int getInlinerVectorBonusPercent () const
 
unsigned getMemcpyCost (const Instruction *I) const
 
bool hasBranchDivergence () const
 
bool useGPUDivergenceAnalysis () const
 
bool isSourceOfDivergence (const Value *V) const
 
bool isAlwaysUniform (const Value *V) const
 
unsigned getFlatAddressSpace () const
 
bool collectFlatAddressOperands (SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const
 
bool isNoopAddrSpaceCast (unsigned, unsigned) const
 
unsigned getAssumedAddrSpace (const Value *V) const
 
Value * rewriteIntrinsicWithAddressSpace (IntrinsicInst *II, Value *OldV, Value *NewV) const
 
bool isLoweredToCall (const Function *F) const
 
bool isHardwareLoopProfitable (Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
 
bool preferPredicateOverEpilogue (Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *TLI, DominatorTree *DT, const LoopAccessInfo *LAI) const
 
bool emitGetActiveLaneMask () const
 
Optional< Instruction * > instCombineIntrinsic (InstCombiner &IC, IntrinsicInst &II) const
 
Optional< Value * > simplifyDemandedUseBitsIntrinsic (InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
 
Optional< Value * > simplifyDemandedVectorEltsIntrinsic (InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
 
void getUnrollingPreferences (Loop *, ScalarEvolution &, TTI::UnrollingPreferences &) const
 
void getPeelingPreferences (Loop *, ScalarEvolution &, TTI::PeelingPreferences &) const
 
bool isLegalAddImmediate (int64_t Imm) const
 
bool isLegalICmpImmediate (int64_t Imm) const
 
bool isLegalAddressingMode (Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr) const
 
bool isLSRCostLess (TTI::LSRCost &C1, TTI::LSRCost &C2) const
 
bool isNumRegsMajorCostOfLSR () const
 
bool isProfitableLSRChainElement (Instruction *I) const
 
bool canMacroFuseCmp () const
 
bool canSaveCmp (Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo) const
 
TTI::AddressingModeKind getPreferredAddressingMode (const Loop *L, ScalarEvolution *SE) const
 
bool isLegalMaskedStore (Type *DataType, Align Alignment) const
 
bool isLegalMaskedLoad (Type *DataType, Align Alignment) const
 
bool isLegalNTStore (Type *DataType, Align Alignment) const
 
bool isLegalNTLoad (Type *DataType, Align Alignment) const
 
bool isLegalMaskedScatter (Type *DataType, Align Alignment) const
 
bool isLegalMaskedGather (Type *DataType, Align Alignment) const
 
bool isLegalMaskedCompressStore (Type *DataType) const
 
bool isLegalMaskedExpandLoad (Type *DataType) const
 
bool hasDivRemOp (Type *DataType, bool IsSigned) const
 
bool hasVolatileVariant (Instruction *I, unsigned AddrSpace) const
 
bool prefersVectorizedAddressing () const
 
int getScalingFactorCost (Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace) const
 
bool LSRWithInstrQueries () const
 
bool isTruncateFree (Type *Ty1, Type *Ty2) const
 
bool isProfitableToHoist (Instruction *I) const
 
bool useAA () const
 
bool isTypeLegal (Type *Ty) const
 
unsigned getRegUsageForType (Type *Ty) const
 
bool shouldBuildLookupTables () const
 
bool shouldBuildLookupTablesForConstant (Constant *C) const
 
bool useColdCCForColdCall (Function &F) const
 
unsigned getScalarizationOverhead (VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract) const
 
unsigned getOperandsScalarizationOverhead (ArrayRef< const Value * > Args, ArrayRef< Type * > Tys) const
 
bool supportsEfficientVectorElementLoadStore () const
 
bool enableAggressiveInterleaving (bool LoopHasReductions) const
 
TTI::MemCmpExpansionOptions enableMemCmpExpansion (bool OptSize, bool IsZeroCmp) const
 
bool enableInterleavedAccessVectorization () const
 
bool enableMaskedInterleavedAccessVectorization () const
 
bool isFPVectorizationPotentiallyUnsafe () const
 
bool allowsMisalignedMemoryAccesses (LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, bool *Fast) const
 
TTI::PopcntSupportKind getPopcntSupport (unsigned IntTyWidthInBit) const
 
bool haveFastSqrt (Type *Ty) const
 
bool isFCmpOrdCheaperThanFCmpZero (Type *Ty) const
 
unsigned getFPOpCost (Type *Ty) const
 
int getIntImmCodeSizeCost (unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty) const
 
unsigned getIntImmCost (const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const
 
unsigned getIntImmCostInst (unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr) const
 
unsigned getIntImmCostIntrin (Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const
 
unsigned getNumberOfRegisters (unsigned ClassID) const
 
unsigned getRegisterClassForType (bool Vector, Type *Ty=nullptr) const
 
const char * getRegisterClassName (unsigned ClassID) const
 
unsigned getRegisterBitWidth (bool Vector) const
 
unsigned getMinVectorRegisterBitWidth () const
 
Optional< unsigned > getMaxVScale () const
 
bool shouldMaximizeVectorBandwidth (bool OptSize) const
 
ElementCount getMinimumVF (unsigned ElemWidth, bool IsScalable) const
 
unsigned getMaximumVF (unsigned ElemWidth, unsigned Opcode) const
 
bool shouldConsiderAddressTypePromotion (const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const
 
unsigned getCacheLineSize () const
 
llvm::Optional< unsigned > getCacheSize (TargetTransformInfo::CacheLevel Level) const
 
llvm::Optional< unsigned > getCacheAssociativity (TargetTransformInfo::CacheLevel Level) const
 
unsigned getPrefetchDistance () const
 
unsigned getMinPrefetchStride (unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const
 
unsigned getMaxPrefetchIterationsAhead () const
 
bool enableWritePrefetching () const
 
unsigned getMaxInterleaveFactor (unsigned VF) const
 
unsigned getArithmeticInstrCost (unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Opd1Info, TTI::OperandValueKind Opd2Info, TTI::OperandValueProperties Opd1PropInfo, TTI::OperandValueProperties Opd2PropInfo, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr) const
 
unsigned getShuffleCost (TTI::ShuffleKind Kind, VectorType *Ty, int Index, VectorType *SubTp) const
 
unsigned getCastInstrCost (unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I) const
 
unsigned getExtractWithExtendCost (unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const
 
unsigned getCFInstrCost (unsigned Opcode, TTI::TargetCostKind CostKind) const
 
unsigned getCmpSelInstrCost (unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I) const
 
unsigned getVectorInstrCost (unsigned Opcode, Type *Val, unsigned Index) const
 
unsigned getMemoryOpCost (unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I) const
 
unsigned getMaskedMemoryOpCost (unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind) const
 
unsigned getGatherScatterOpCost (unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const
 
unsigned getInterleavedMemoryOpCost (unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond, bool UseMaskForGaps) const
 
unsigned getIntrinsicInstrCost (const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
 
unsigned getCallInstrCost (Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
 
unsigned getNumberOfParts (Type *Tp) const
 
unsigned getAddressComputationCost (Type *Tp, ScalarEvolution *, const SCEV *) const
 
unsigned getArithmeticReductionCost (unsigned, VectorType *, bool, TTI::TargetCostKind) const
 
unsigned getMinMaxReductionCost (VectorType *, VectorType *, bool, bool, TTI::TargetCostKind) const
 
InstructionCost getExtendedAddReductionCost (bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
 
unsigned getCostOfKeepingLiveOverCall (ArrayRef< Type * > Tys) const
 
bool getTgtMemIntrinsic (IntrinsicInst *Inst, MemIntrinsicInfo &Info) const
 
unsigned getAtomicMemIntrinsicMaxElementSize () const
 
Value * getOrCreateResultFromMemIntrinsic (IntrinsicInst *Inst, Type *ExpectedType) const
 
Type * getMemcpyLoopLoweringType (LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign) const
 
void getMemcpyLoopResidualLoweringType (SmallVectorImpl< Type * > &OpsOut, LLVMContext &Context, unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign) const
 
bool areInlineCompatible (const Function *Caller, const Function *Callee) const
 
bool areFunctionArgsABICompatible (const Function *Caller, const Function *Callee, SmallPtrSetImpl< Argument * > &Args) const
 
bool isIndexedLoadLegal (TTI::MemIndexedMode Mode, Type *Ty, const DataLayout &DL) const
 
bool isIndexedStoreLegal (TTI::MemIndexedMode Mode, Type *Ty, const DataLayout &DL) const
 
unsigned getLoadStoreVecRegBitWidth (unsigned AddrSpace) const
 
bool isLegalToVectorizeLoad (LoadInst *LI) const
 
bool isLegalToVectorizeStore (StoreInst *SI) const
 
bool isLegalToVectorizeLoadChain (unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
 
bool isLegalToVectorizeStoreChain (unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
 
bool isLegalToVectorizeReduction (RecurrenceDescriptor RdxDesc, ElementCount VF) const
 
unsigned getLoadVectorFactor (unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
 
unsigned getStoreVectorFactor (unsigned VF, unsigned StoreSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
 
bool preferInLoopReduction (unsigned Opcode, Type *Ty, TTI::ReductionFlags Flags) const
 
bool preferPredicatedReductionSelect (unsigned Opcode, Type *Ty, TTI::ReductionFlags Flags) const
 
bool shouldExpandReduction (const IntrinsicInst *II) const
 
unsigned getGISelRematGlobalCost () const
 
bool supportsScalableVectors () const
 
bool hasActiveVectorLength () const
 

Additional Inherited Members

- Protected Types inherited from llvm::TargetTransformInfoImplBase
typedef TargetTransformInfo TTI
 
- Protected Member Functions inherited from llvm::BasicTTIImplBase< AArch64TTIImpl >
 BasicTTIImplBase (const TargetMachine *TM, const DataLayout &DL)
 
virtual ~BasicTTIImplBase ()=default
 
- Protected Member Functions inherited from llvm::TargetTransformInfoImplCRTPBase< AArch64TTIImpl >
 TargetTransformInfoImplCRTPBase (const DataLayout &DL)
 
- Protected Member Functions inherited from llvm::TargetTransformInfoImplBase
 TargetTransformInfoImplBase (const DataLayout &DL)
 
unsigned minRequiredElementSize (const Value *Val, bool &isSigned) const
 
bool isStridedAccess (const SCEV *Ptr) const
 
const SCEVConstant * getConstantStrideStep (ScalarEvolution *SE, const SCEV *Ptr) const
 
bool isConstantStridedAccessLessThan (ScalarEvolution *SE, const SCEV *Ptr, int64_t MergeDistance) const
 
- Protected Attributes inherited from llvm::BasicTTIImplBase< AArch64TTIImpl >
const DataLayout & DL
 
- Protected Attributes inherited from llvm::TargetTransformInfoImplBase
const DataLayout & DL
 

Detailed Description

Definition at line 41 of file AArch64TargetTransformInfo.h.

Constructor & Destructor Documentation

◆ AArch64TTIImpl()

llvm::AArch64TTIImpl::AArch64TTIImpl ( const AArch64TargetMachine *  TM,
const Function &  F 
)
inlineexplicit

Definition at line 63 of file AArch64TargetTransformInfo.h.

Member Function Documentation

◆ areInlineCompatible()

bool AArch64TTIImpl::areInlineCompatible ( const Function *  Caller,
const Function *  Callee 
) const

Definition at line 30 of file AArch64TargetTransformInfo.cpp.

References llvm::SystemZISD::TM.

◆ enableInterleavedAccessVectorization()

bool llvm::AArch64TTIImpl::enableInterleavedAccessVectorization ( )
inline

Definition at line 88 of file AArch64TargetTransformInfo.h.

◆ enableMemCmpExpansion()

AArch64TTIImpl::TTI::MemCmpExpansionOptions AArch64TTIImpl::enableMemCmpExpansion ( bool  OptSize,
bool  IsZeroCmp 
) const

Definition at line 783 of file AArch64TargetTransformInfo.cpp.

References llvm::TargetTransformInfo::MemCmpExpansionOptions::AllowOverlappingLoads, llvm::TargetTransformInfo::MemCmpExpansionOptions::LoadSizes, llvm::TargetTransformInfo::MemCmpExpansionOptions::MaxNumLoads, llvm::TargetTransformInfo::MemCmpExpansionOptions::NumLoadsPerBlock, and llvm::ARM_MB::ST.

◆ getAddressComputationCost()

int AArch64TTIImpl::getAddressComputationCost ( Type *  Ty,
ScalarEvolution *  SE,
const SCEV *  Ptr 
)

Definition at line 705 of file AArch64TargetTransformInfo.cpp.

References llvm::Type::isVectorTy().

◆ getArithmeticInstrCost()

int AArch64TTIImpl::getArithmeticInstrCost ( unsigned  Opcode,
Type *  Ty,
TTI::TargetCostKind  CostKind = TTI::TCK_RecipThroughput,
TTI::OperandValueKind  Opd1Info = TTI::OK_AnyValue,
TTI::OperandValueKind  Opd2Info = TTI::OK_AnyValue,
TTI::OperandValueProperties  Opd1PropInfo = TTI::OP_None,
TTI::OperandValueProperties  Opd2PropInfo = TTI::OP_None,
ArrayRef< const Value * >  Args = ArrayRef<const Value *>(),
const Instruction *  CxtI = nullptr 
)

Definition at line 573 of file AArch64TargetTransformInfo.cpp.

References llvm::MCID::Add, llvm::ISD::ADD, llvm::ISD::AND, llvm::AMDGPU::HSAMD::Kernel::Key::Args, CostKind, DL, llvm::ISD::FADD, llvm::Type::getScalarType(), llvm::Type::isFP128Ty(), llvm::Type::isVectorTy(), LLVM_FALLTHROUGH, llvm::AArch64CC::LT, llvm::ISD::MUL, llvm::ISD::MULHU, llvm::TargetTransformInfo::OK_UniformConstantValue, llvm::TargetTransformInfo::OP_None, llvm::TargetTransformInfo::OP_PowerOf2, llvm::ISD::OR, llvm::ISD::SDIV, llvm::MCID::Select, llvm::ARM_MB::ST, llvm::TargetTransformInfo::TCK_RecipThroughput, llvm::ISD::UDIV, llvm::MVT::v2i64, and llvm::ISD::XOR.

◆ getArithmeticReductionCost()

int AArch64TTIImpl::getArithmeticReductionCost ( unsigned  Opcode,
VectorType *  Ty,
bool  IsPairwiseForm,
TTI::TargetCostKind  CostKind = TTI::TCK_RecipThroughput 
)

Definition at line 1184 of file AArch64TargetTransformInfo.cpp.

References llvm::ISD::ADD, assert(), CostKind, DL, llvm::AArch64CC::LT, llvm::MVT::v16i8, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v8i16, and llvm::MVT::v8i8.

◆ getArithmeticReductionCostSVE()

int AArch64TTIImpl::getArithmeticReductionCostSVE ( unsigned  Opcode,
VectorType *  ValTy,
bool  IsPairwiseForm,
TTI::TargetCostKind  CostKind 
)

Definition at line 1154 of file AArch64TargetTransformInfo.cpp.

References llvm::ISD::ADD, llvm::ISD::AND, assert(), CostKind, DL, llvm::ISD::FADD, llvm::Type::getContext(), llvm::EVT::getTypeForEVT(), llvm::AArch64CC::LT, llvm::ISD::OR, and llvm::ISD::XOR.

◆ getCastInstrCost()

int AArch64TTIImpl::getCastInstrCost ( unsigned  Opcode,
Type *  Dst,
Type *  Src,
TTI::CastContextHint  CCH,
TTI::TargetCostKind  CostKind,
const Instruction *  I = nullptr 
)

Definition at line 333 of file AArch64TargetTransformInfo.cpp.

References assert(), CostKind, DL, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, I, llvm::EVT::isSimple(), Operands, llvm::ISD::SIGN_EXTEND, llvm::ISD::SINT_TO_FP, llvm::TargetTransformInfo::TCK_RecipThroughput, llvm::ISD::TRUNCATE, llvm::ISD::UINT_TO_FP, llvm::MVT::v16f32, llvm::MVT::v16i16, llvm::MVT::v16i32, llvm::MVT::v16i8, llvm::MVT::v2f32, llvm::MVT::v2f64, llvm::MVT::v2i16, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v2i8, llvm::MVT::v4f32, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v4i64, llvm::MVT::v4i8, llvm::MVT::v8f32, llvm::MVT::v8i16, llvm::MVT::v8i32, llvm::MVT::v8i64, llvm::MVT::v8i8, and llvm::ISD::ZERO_EXTEND.

◆ getCFInstrCost()

unsigned AArch64TTIImpl::getCFInstrCost ( unsigned  Opcode,
TTI::TargetCostKind  CostKind 
)

Definition at line 539 of file AArch64TargetTransformInfo.cpp.

References assert(), CostKind, and llvm::TargetTransformInfo::TCK_RecipThroughput.

◆ getCmpSelInstrCost()

int AArch64TTIImpl::getCmpSelInstrCost ( unsigned  Opcode,
Type *  ValTy,
Type *  CondTy,
CmpInst::Predicate  VecPred,
TTI::TargetCostKind  CostKind,
const Instruction *  I = nullptr 
)

Definition at line 723 of file AArch64TargetTransformInfo.cpp.

References llvm::any_of(), llvm::CmpInst::BAD_ICMP_PREDICATE, CostKind, DL, I, llvm::CmpInst::isIntPredicate(), llvm::EVT::isSimple(), llvm::AArch64CC::LT, M, llvm::PatternMatch::m_Cmp(), llvm::PatternMatch::m_Select(), llvm::PatternMatch::m_Value(), llvm::PatternMatch::match(), llvm::ISD::SELECT, llvm::TargetTransformInfo::TCK_RecipThroughput, llvm::MVT::v16i1, llvm::MVT::v16i16, llvm::MVT::v16i32, llvm::MVT::v16i64, llvm::MVT::v16i8, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v4i1, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v4i64, llvm::MVT::v8i1, llvm::MVT::v8i16, llvm::MVT::v8i32, llvm::MVT::v8i64, and llvm::MVT::v8i8.

◆ getCostOfKeepingLiveOverCall()

int AArch64TTIImpl::getCostOfKeepingLiveOverCall ( ArrayRef< Type * >  Tys)

Definition at line 899 of file AArch64TargetTransformInfo.cpp.

References Align, CostKind, I, llvm::SPII::Load, llvm::SPII::Store, and llvm::TargetTransformInfo::TCK_RecipThroughput.

◆ getExtractWithExtendCost()

int AArch64TTIImpl::getExtractWithExtendCost ( unsigned  Opcode,
Type *  Dst,
VectorType *  VecTy,
unsigned  Index 
)

Definition at line 480 of file AArch64TargetTransformInfo.cpp.

References assert(), CostKind, DL, llvm::VectorType::getElementType(), Index, llvm_unreachable, llvm::TargetTransformInfo::None, and llvm::TargetTransformInfo::TCK_RecipThroughput.

◆ getGatherScatterOpCost()

unsigned AArch64TTIImpl::getGatherScatterOpCost ( unsigned  Opcode,
Type *  DataTy,
const Value *  Ptr,
bool  VariableMask,
Align  Alignment,
TTI::TargetCostKind  CostKind,
const Instruction *  I = nullptr 
)

Definition at line 800 of file AArch64TargetTransformInfo.cpp.

References assert(), CostKind, DL, llvm::LinearPolySize< LeafTy >::getKnownMinValue(), llvm::Optional< T >::getValue(), I, and llvm::AArch64CC::LT.

◆ getGISelRematGlobalCost()

unsigned llvm::AArch64TTIImpl::getGISelRematGlobalCost ( ) const
inline

Definition at line 265 of file AArch64TargetTransformInfo.h.

◆ getInterleavedMemoryOpCost()

int AArch64TTIImpl::getInterleavedMemoryOpCost ( unsigned  Opcode,
Type *  VecTy,
unsigned  Factor,
ArrayRef< unsigned >  Indices,
Align  Alignment,
unsigned  AddressSpace,
TTI::TargetCostKind  CostKind = TTI::TCK_SizeAndLatency,
bool  UseMaskForCond = false,
bool  UseMaskForGaps = false 
)

Definition at line 873 of file AArch64TargetTransformInfo.cpp.

References assert(), CostKind, DL, llvm::FixedVectorType::get(), and llvm::Type::getScalarType().

◆ getIntImmCost() [1/2]

int AArch64TTIImpl::getIntImmCost ( const APInt &  Imm,
Type *  Ty,
TTI::TargetCostKind  CostKind 
)

Calculate the cost of materializing the given constant.

Definition at line 62 of file AArch64TargetTransformInfo.cpp.

References llvm::APInt::ashr(), assert(), llvm::Type::getPrimitiveSizeInBits(), llvm::APInt::getSExtValue(), llvm::Type::isIntegerTy(), llvm::max(), llvm::APInt::sext(), and llvm::APInt::sextOrTrunc().

◆ getIntImmCost() [2/2]

int AArch64TTIImpl::getIntImmCost ( int64_t  Val)

Calculate the cost of materializing a 64-bit value.

This helper method might only calculate a fraction of a larger immediate. Therefore it is valid to return a cost of ZERO.

Definition at line 47 of file AArch64TargetTransformInfo.cpp.

References llvm::AArch64_IMM::expandMOVImm(), and llvm::AArch64_AM::isLogicalImmediate().

Referenced by getIntImmCostInst(), and getIntImmCostIntrin().

◆ getIntImmCostInst()

int AArch64TTIImpl::getIntImmCostInst ( unsigned  Opcode,
unsigned  Idx,
const APInt &  Imm,
Type *  Ty,
TTI::TargetCostKind  CostKind,
Instruction *  Inst = nullptr 
)

Definition at line 87 of file AArch64TargetTransformInfo.cpp.

References llvm::MCID::Add, assert(), llvm::MCID::Call, CostKind, getIntImmCost(), llvm::Type::getPrimitiveSizeInBits(), llvm::Type::isIntegerTy(), llvm::SPII::Load, llvm::MipsISD::Ret, llvm::MCID::Select, llvm::SPII::Store, llvm::TargetTransformInfo::TCC_Basic, and llvm::TargetTransformInfo::TCC_Free.

◆ getIntImmCostIntrin()

int AArch64TTIImpl::getIntImmCostIntrin ( Intrinsic::ID  IID,
unsigned  Idx,
const APInt &  Imm,
Type *  Ty,
TTI::TargetCostKind  CostKind 
)

Definition at line 155 of file AArch64TargetTransformInfo.cpp.

References assert(), CostKind, llvm::APInt::getBitWidth(), getIntImmCost(), llvm::Type::getPrimitiveSizeInBits(), llvm::APInt::getSExtValue(), llvm::Type::isIntegerTy(), llvm::TargetTransformInfo::TCC_Basic, and llvm::TargetTransformInfo::TCC_Free.

◆ getIntrinsicInstrCost()

unsigned AArch64TTIImpl::getIntrinsicInstrCost ( const IntrinsicCostAttributes &  ICA,
TTI::TargetCostKind  CostKind 
)

Definition at line 216 of file AArch64TargetTransformInfo.cpp.

References llvm::abs(), llvm::any_of(), CostKind, DL, llvm::IntrinsicCostAttributes::getID(), llvm::IntrinsicCostAttributes::getReturnType(), LLVM_FALLTHROUGH, llvm::AArch64CC::LT, M, llvm::APIntOps::smax(), llvm::APIntOps::smin(), llvm::APIntOps::umax(), llvm::APIntOps::umin(), llvm::MVT::v16i8, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v8i16, and llvm::MVT::v8i8.

◆ getMaxInterleaveFactor()

unsigned AArch64TTIImpl::getMaxInterleaveFactor ( unsigned  VF)

Definition at line 913 of file AArch64TargetTransformInfo.cpp.

References llvm::ARM_MB::ST.

◆ getMaxVScale()

Optional<unsigned> llvm::AArch64TTIImpl::getMaxVScale ( ) const
inline

Definition at line 118 of file AArch64TargetTransformInfo.h.

References llvm::BasicTTIImplBase< AArch64TTIImpl >::getMaxVScale(), llvm::AArch64::SVEBitsPerBlock, and llvm::AArch64::SVEMaxBitsPerVector.

◆ getMemoryOpCost()

int AArch64TTIImpl::getMemoryOpCost ( unsigned  Opcode,
Type *  Src,
MaybeAlign  Alignment,
unsigned  AddressSpace,
TTI::TargetCostKind  CostKind,
const Instruction *  I = nullptr 
)

Definition at line 824 of file AArch64TargetTransformInfo.cpp.

References CostKind, DL, llvm::AArch64CC::LT, llvm::MVT::Other, llvm::ARM_MB::ST, llvm::SPII::Store, and llvm::TargetTransformInfo::TCK_RecipThroughput.

◆ getMinMaxReductionCost()

int AArch64TTIImpl::getMinMaxReductionCost ( VectorType *  Ty,
VectorType *  CondTy,
bool  IsPairwise,
bool  IsUnsigned,
TTI::TargetCostKind  CostKind 
)

Definition at line 1128 of file AArch64TargetTransformInfo.cpp.

References assert(), llvm::CmpInst::BAD_ICMP_PREDICATE, CostKind, DL, llvm::Type::getContext(), llvm::EVT::getTypeForEVT(), llvm::Type::isFPOrFPVectorTy(), llvm::AArch64CC::LT, and llvm::MCID::Select.

◆ getMinVectorRegisterBitWidth()

unsigned llvm::AArch64TTIImpl::getMinVectorRegisterBitWidth ( )
inline

Definition at line 114 of file AArch64TargetTransformInfo.h.

◆ getNumberOfRegisters()

unsigned llvm::AArch64TTIImpl::getNumberOfRegisters ( unsigned  ClassID) const
inline

Definition at line 90 of file AArch64TargetTransformInfo.h.

References Vector.

◆ getOrCreateResultFromMemIntrinsic()

Value * AArch64TTIImpl::getOrCreateResultFromMemIntrinsic ( IntrinsicInst *  Inst,
Type *  ExpectedType 
)

Definition at line 993 of file AArch64TargetTransformInfo.cpp.

References Builder, llvm::numbers::e, llvm::UndefValue::get(), llvm::CallBase::getArgOperand(), llvm::IntrinsicInst::getIntrinsicID(), llvm::CallBase::getNumArgOperands(), llvm::Value::getType(), i, and llvm::ARM_MB::ST.

◆ getPeelingPreferences()

void AArch64TTIImpl::getPeelingPreferences ( Loop *  L,
ScalarEvolution &  SE,
TTI::PeelingPreferences &  PP 
)

Definition at line 988 of file AArch64TargetTransformInfo.cpp.

◆ getPopcntSupport()

TargetTransformInfo::PopcntSupportKind AArch64TTIImpl::getPopcntSupport ( unsigned  TyWidth)

Definition at line 207 of file AArch64TargetTransformInfo.cpp.

References assert(), llvm::isPowerOf2_32(), llvm::TargetTransformInfo::PSK_FastHardware, and llvm::TargetTransformInfo::PSK_Software.

◆ getRegisterBitWidth()

unsigned llvm::AArch64TTIImpl::getRegisterBitWidth ( bool  Vector) const
inline

Definition at line 103 of file AArch64TargetTransformInfo.h.

References llvm::max(), and Vector.

◆ getShuffleCost()

int AArch64TTIImpl::getShuffleCost ( TTI::ShuffleKind  Kind,
VectorType *  Tp,
int  Index,
VectorType *  SubTp 
)

Definition at line 1219 of file AArch64TargetTransformInfo.cpp.

References DL, llvm::AArch64CC::LT, llvm::MVT::nxv16i1, llvm::MVT::nxv16i8, llvm::MVT::nxv2f64, llvm::MVT::nxv2i1, llvm::MVT::nxv2i64, llvm::MVT::nxv4f32, llvm::MVT::nxv4i1, llvm::MVT::nxv4i32, llvm::MVT::nxv8bf16, llvm::MVT::nxv8f16, llvm::MVT::nxv8i1, llvm::MVT::nxv8i16, llvm::TargetTransformInfo::SK_Broadcast, llvm::TargetTransformInfo::SK_PermuteSingleSrc, llvm::TargetTransformInfo::SK_Reverse, llvm::TargetTransformInfo::SK_Select, llvm::TargetTransformInfo::SK_Transpose, llvm::MVT::v16i8, llvm::MVT::v2f32, llvm::MVT::v2f64, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v4f32, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v8i16, and llvm::MVT::v8i8.

◆ getTgtMemIntrinsic()

bool AArch64TTIImpl::getTgtMemIntrinsic ( IntrinsicInst *  Inst,
MemIntrinsicInfo &  Info 
)

Definition at line 1029 of file AArch64TargetTransformInfo.cpp.

References llvm::CallBase::getArgOperand(), llvm::IntrinsicInst::getIntrinsicID(), llvm::CallBase::getNumArgOperands(), and Info.

◆ getUnrollingPreferences()

void AArch64TTIImpl::getUnrollingPreferences ( Loop *  L,
ScalarEvolution &  SE,
TTI::UnrollingPreferences &  UP 
)

Definition at line 969 of file AArch64TargetTransformInfo.cpp.

References EnableFalkorHWPFUnrollFix, llvm::AArch64Subtarget::Falkor, getFalkorUnrollingPreferences(), llvm::LoopBase< BlockT, LoopT >::getLoopDepth(), llvm::TargetTransformInfo::UnrollingPreferences::PartialOptSizeThreshold, llvm::TargetTransformInfo::UnrollingPreferences::PartialThreshold, and llvm::ARM_MB::ST.

◆ getVectorInstrCost()

int AArch64TTIImpl::getVectorInstrCost ( unsigned  Opcode,
Type *  Val,
unsigned  Index 
)

Definition at line 548 of file AArch64TargetTransformInfo.cpp.

References assert(), DL, Index, llvm::Type::isVectorTy(), llvm::AArch64CC::LT, and llvm::ARM_MB::ST.

◆ isLegalElementTypeForSVE()

bool llvm::AArch64TTIImpl::isLegalElementTypeForSVE ( Type *  Ty) const
inline

Definition at line 189 of file AArch64TargetTransformInfo.h.

References llvm::Type::isBFloatTy(), llvm::Type::isDoubleTy(), llvm::Type::isFloatTy(), llvm::Type::isHalfTy(), llvm::Type::isIntegerTy(), and llvm::Type::isPointerTy().

Referenced by isLegalMaskedGatherScatter(), and isLegalMaskedLoadStore().

◆ isLegalMaskedGather()

bool llvm::AArch64TTIImpl::isLegalMaskedGather ( Type *  DataType,
Align  Alignment 
) const
inline

Definition at line 228 of file AArch64TargetTransformInfo.h.

References isLegalMaskedGatherScatter().

◆ isLegalMaskedGatherScatter()

bool llvm::AArch64TTIImpl::isLegalMaskedGatherScatter ( Type *  DataType) const
inline

Definition at line 221 of file AArch64TargetTransformInfo.h.

References llvm::Type::getScalarType(), and isLegalElementTypeForSVE().

Referenced by isLegalMaskedGather(), and isLegalMaskedScatter().

◆ isLegalMaskedLoad()

bool llvm::AArch64TTIImpl::isLegalMaskedLoad ( Type *  DataType,
Align  Alignment 
)
inline

Definition at line 213 of file AArch64TargetTransformInfo.h.

References isLegalMaskedLoadStore().

◆ isLegalMaskedLoadStore()

bool llvm::AArch64TTIImpl::isLegalMaskedLoadStore ( Type *  DataType,
Align  Alignment 
)
inline

Definition at line 206 of file AArch64TargetTransformInfo.h.

References llvm::Type::getScalarType(), and isLegalElementTypeForSVE().

Referenced by isLegalMaskedLoad(), and isLegalMaskedStore().

◆ isLegalMaskedScatter()

bool llvm::AArch64TTIImpl::isLegalMaskedScatter ( Type *  DataType,
Align  Alignment 
) const
inline

Definition at line 231 of file AArch64TargetTransformInfo.h.

References isLegalMaskedGatherScatter().

◆ isLegalMaskedStore()

bool llvm::AArch64TTIImpl::isLegalMaskedStore ( Type *  DataType,
Align  Alignment 
)
inline

Definition at line 217 of file AArch64TargetTransformInfo.h.

References isLegalMaskedLoadStore().

◆ isLegalNTStore()

bool llvm::AArch64TTIImpl::isLegalNTStore ( Type *  DataType,
Align  Alignment 
)
inline

Definition at line 235 of file AArch64TargetTransformInfo.h.

References llvm::TargetTransformInfoImplBase::isLegalNTStore(), and llvm::isPowerOf2_64().

◆ isLegalToVectorizeReduction()

bool AArch64TTIImpl::isLegalToVectorizeReduction ( RecurrenceDescriptor  RdxDesc,
ElementCount  VF 
) const

Definition at line 1101 of file AArch64TargetTransformInfo.cpp.

References llvm::Add, llvm::And, llvm::FAdd, llvm::FMax, llvm::FMin, llvm::RecurrenceDescriptor::getRecurrenceKind(), llvm::RecurrenceDescriptor::getRecurrenceType(), llvm::Type::isBFloatTy(), llvm::LinearPolySize< LeafTy >::isScalable(), llvm::Or, llvm::SMax, llvm::SMin, llvm::UMax, llvm::UMin, and llvm::Xor.

◆ shouldConsiderAddressTypePromotion()

bool AArch64TTIImpl::shouldConsiderAddressTypePromotion ( const Instruction &  I,
bool &  AllowPromotionWithoutCommonHeader 
)

See if I should be considered for address type promotion.

We check if I is a sext with right type and used in memory accesses. If it used in a "complex" getelementptr, we allow it to be promoted without finding other sext instructions that sign extended the same initial value. A getelementptr is considered as "complex" if it has more than 2 operands.

Definition at line 1074 of file AArch64TargetTransformInfo.cpp.

References llvm::Type::getInt64Ty(), and I.

◆ shouldExpandReduction()

bool llvm::AArch64TTIImpl::shouldExpandReduction ( const IntrinsicInst *  II) const
inline

Definition at line 263 of file AArch64TargetTransformInfo.h.

◆ supportsScalableVectors()

bool llvm::AArch64TTIImpl::supportsScalableVectors ( ) const
inline

Definition at line 269 of file AArch64TargetTransformInfo.h.

◆ useNeonVector()

bool AArch64TTIImpl::useNeonVector ( const Type *  Ty) const

Definition at line 820 of file AArch64TargetTransformInfo.cpp.

References llvm::ARM_MB::ST.

The documentation for this class was generated from the following files:
Generated on Fri Mar 5 2021 22:26:43 for LLVM by   doxygen 1.8.17