LLVM 17.0.0git
InstructionSelector.cpp
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1//===- llvm/CodeGen/GlobalISel/InstructionSelector.cpp --------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file implements the InstructionSelector class.
11//
12//===----------------------------------------------------------------------===//
13
19
20#define DEBUG_TYPE "instructionselector"
21
22using namespace llvm;
23
25 : Renderers(MaxRenderers) {}
26
28
30 const MachineOperand &MO, int64_t Value,
31 const MachineRegisterInfo &MRI) const {
32 if (MO.isReg() && MO.getReg())
33 if (auto VRegVal = getIConstantVRegValWithLookThrough(MO.getReg(), MRI))
34 return VRegVal->Value.getSExtValue() == Value;
35 return false;
36}
37
39 const MachineOperand &Root, const MachineRegisterInfo &MRI) const {
40 if (!Root.isReg())
41 return false;
42
43 MachineInstr *RootI = MRI.getVRegDef(Root.getReg());
44 if (RootI->getOpcode() != TargetOpcode::G_PTR_ADD)
45 return false;
46
47 MachineOperand &RHS = RootI->getOperand(2);
48 MachineInstr *RHSI = MRI.getVRegDef(RHS.getReg());
49 if (RHSI->getOpcode() != TargetOpcode::G_CONSTANT)
50 return false;
51
52 return true;
53}
54
56 MachineInstr &IntoMI) const {
57 // Immediate neighbours are already folded.
58 if (MI.getParent() == IntoMI.getParent() &&
59 std::next(MI.getIterator()) == IntoMI.getIterator())
60 return true;
61
62 // Convergent instructions cannot be moved in the CFG.
63 if (MI.isConvergent() && MI.getParent() != IntoMI.getParent())
64 return false;
65
66 return !MI.mayLoadOrStore() && !MI.mayRaiseFPException() &&
67 !MI.hasUnmodeledSideEffects() && MI.implicit_operands().empty();
68}
unsigned const MachineRegisterInfo * MRI
IRTranslator LLVM IR MI
Value * RHS
bool isOperandImmEqual(const MachineOperand &MO, int64_t Value, const MachineRegisterInfo &MRI) const
bool isBaseWithConstantOffset(const MachineOperand &Root, const MachineRegisterInfo &MRI) const
Return true if the specified operand is a G_PTR_ADD with a G_CONSTANT on the right-hand side.
bool isObviouslySafeToFold(MachineInstr &MI, MachineInstr &IntoMI) const
Return true if MI can obviously be folded into IntoMI.
Representation of each machine instruction.
Definition: MachineInstr.h:68
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:516
const MachineBasicBlock * getParent() const
Definition: MachineInstr.h:313
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:526
MachineOperand class - Representation of each machine instruction operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
LLVM Value Representation.
Definition: Value.h:74
self_iterator getIterator()
Definition: ilist_node.h:82
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
std::optional< ValueAndVReg > getIConstantVRegValWithLookThrough(Register VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs=true)
If VReg is defined by a statically evaluable chain of instructions rooted on a G_CONSTANT returns its...
Definition: Utils.cpp:409