LLVM 18.0.0git
X86RegisterBankInfo.h
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1//===- X86RegisterBankInfo ---------------------------------------*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file
9/// This file declares the targeting of the RegisterBankInfo class for X86.
10/// \todo This should be generated by TableGen.
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_X86_X86REGISTERBANKINFO_H
14#define LLVM_LIB_TARGET_X86_X86REGISTERBANKINFO_H
15
17
18#define GET_REGBANK_DECLARATIONS
19#include "X86GenRegisterBank.inc"
20
21namespace llvm {
22
23class LLT;
24
26protected:
27#define GET_TARGET_REGBANK_CLASS
28#include "X86GenRegisterBank.inc"
29#define GET_TARGET_REGBANK_INFO_CLASS
30#include "X86GenRegisterBankInfo.def"
31
34
35 static PartialMappingIdx getPartialMappingIdx(const LLT &Ty, bool isFP);
37 getValueMapping(PartialMappingIdx Idx, unsigned NumOperands);
38};
39
41
42/// This class provides the information for the target register banks.
44private:
45 /// Get an instruction mapping.
46 /// \return An InstructionMappings with a statically allocated
47 /// OperandsMapping.
48 const InstructionMapping &getSameOperandsMapping(const MachineInstr &MI,
49 bool isFP) const;
50
51 /// Track the bank of each instruction operand(register)
52 static void
53 getInstrPartialMappingIdxs(const MachineInstr &MI,
54 const MachineRegisterInfo &MRI, const bool isFP,
56
57 /// Construct the instruction ValueMapping from PartialMappingIdxs
58 /// \return true if mapping succeeded.
59 static bool
60 getInstrValueMapping(const MachineInstr &MI,
61 const SmallVectorImpl<PartialMappingIdx> &OpRegBankIdx,
63
64public:
66
68 LLT) const override;
69
71 getInstrAlternativeMappings(const MachineInstr &MI) const override;
72
73 /// See RegisterBankInfo::applyMapping.
75 const OperandsMapper &OpdMapper) const override;
76
77 const InstructionMapping &
78 getInstrMapping(const MachineInstr &MI) const override;
79};
80
81} // namespace llvm
82#endif
unsigned const MachineRegisterInfo * MRI
assume Assume Builder
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
IRTranslator LLVM IR MI
unsigned const TargetRegisterInfo * TRI
Helper class to build MachineInstr.
Representation of each machine instruction.
Definition: MachineInstr.h:68
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Helper class that represents how the value of an instruction may be mapped and what is the related co...
Helper class used to get/create the virtual registers that will be used to replace the MachineOperand...
Holds all the information related to register banks.
This class implements the register bank concept.
Definition: RegisterBank.h:28
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:577
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1200
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
static RegisterBankInfo::PartialMapping PartMappings[]
static PartialMappingIdx getPartialMappingIdx(const LLT &Ty, bool isFP)
static RegisterBankInfo::ValueMapping ValMappings[]
static const RegisterBankInfo::ValueMapping * getValueMapping(PartialMappingIdx Idx, unsigned NumOperands)
This class provides the information for the target register banks.
InstructionMappings getInstrAlternativeMappings(const MachineInstr &MI) const override
Get the alternative mappings for MI.
const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC, LLT) const override
Get a register bank that covers RC.
const InstructionMapping & getInstrMapping(const MachineInstr &MI) const override
Get the mapping of the different operands of MI on the register bank.
void applyMappingImpl(MachineIRBuilder &Builder, const OperandsMapper &OpdMapper) const override
See RegisterBankInfo::applyMapping.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
Helper struct that represents how a value is partially mapped into a register.
Helper struct that represents how a value is mapped through different register banks.