LLVM  10.0.0svn
llvm::VirtRegMap Member List

This is the complete list of members for llvm::VirtRegMap, including all inherited members.

assignPassManager(PMStack &PMS, PassManagerType T) overridellvm::FunctionPassvirtual
assignVirt2Phys(Register virtReg, MCPhysReg physReg)llvm::VirtRegMap
assignVirt2StackSlot(Register virtReg)llvm::VirtRegMap
assignVirt2StackSlot(Register virtReg, int SS)llvm::VirtRegMap
clearAllVirt()llvm::VirtRegMapinline
clearVirt(Register virtReg)llvm::VirtRegMapinline
createPass(AnalysisID ID)llvm::Passstatic
doFinalization(Module &)llvm::Passinlinevirtual
doInitialization(Module &) overridellvm::MachineFunctionPassinlinevirtual
dump() constllvm::VirtRegMap
dumpPassStructure(unsigned Offset=0)llvm::Passvirtual
FunctionPass(char &pid)llvm::FunctionPassinlineexplicit
getAdjustedAnalysisPointer(AnalysisID ID)llvm::Passvirtual
getAnalysis() constllvm::Pass
getAnalysis(Function &F)llvm::Pass
getAnalysisID(AnalysisID PI) constllvm::Pass
getAnalysisID(AnalysisID PI, Function &F)llvm::Pass
getAnalysisIfAvailable() constllvm::Pass
getAnalysisUsage(AnalysisUsage &AU) const overridellvm::VirtRegMapinlinevirtual
getAsImmutablePass()llvm::Passvirtual
getAsPMDataManager()llvm::Passvirtual
getClearedProperties() constllvm::MachineFunctionPassinlineprotectedvirtual
getMachineFunction() constllvm::VirtRegMapinline
getOriginal(unsigned VirtReg) constllvm::VirtRegMapinline
getPassID() constllvm::Passinline
getPassKind() constllvm::Passinline
getPassName() constllvm::Passvirtual
getPhys(Register virtReg) constllvm::VirtRegMapinline
getPotentialPassManagerType() const overridellvm::FunctionPassvirtual
getPreSplitReg(Register virtReg) constllvm::VirtRegMapinline
getRegInfo() constllvm::VirtRegMapinline
getRequiredProperties() constllvm::MachineFunctionPassinlineprotectedvirtual
getResolver() constllvm::Passinline
getSetProperties() constllvm::MachineFunctionPassinlineprotectedvirtual
getStackSlot(Register virtReg) constllvm::VirtRegMapinline
getTargetRegInfo() constllvm::VirtRegMapinline
grow()llvm::VirtRegMap
hasKnownPreference(Register VirtReg)llvm::VirtRegMap
hasPhys(Register virtReg) constllvm::VirtRegMapinline
hasPreferredPhys(Register VirtReg)llvm::VirtRegMap
IDllvm::VirtRegMapstatic
isAssignedReg(Register virtReg) constllvm::VirtRegMapinline
lookupPassInfo(const void *TI)llvm::Passstatic
lookupPassInfo(StringRef Arg)llvm::Passstatic
MachineFunctionPass(char &ID)llvm::MachineFunctionPassinlineexplicitprotected
MAX_STACK_SLOT enum valuellvm::VirtRegMap
mustPreserveAnalysisID(char &AID) constllvm::Pass
NO_PHYS_REG enum valuellvm::VirtRegMap
NO_STACK_SLOT enum valuellvm::VirtRegMap
operator=(const VirtRegMap &)=deletellvm::VirtRegMap
llvm::MachineFunctionPass::operator=(const Pass &)=deletellvm::Pass
Pass(PassKind K, char &pid)llvm::Passinlineexplicit
Pass(const Pass &)=deletellvm::Pass
preparePassManager(PMStack &)llvm::Passvirtual
print(raw_ostream &OS, const Module *M=nullptr) const overridellvm::VirtRegMapvirtual
releaseMemory()llvm::Passvirtual
runOnMachineFunction(MachineFunction &MF) overridellvm::VirtRegMapvirtual
setIsSplitFromReg(Register virtReg, unsigned SReg)llvm::VirtRegMapinline
setResolver(AnalysisResolver *AR)llvm::Pass
skipFunction(const Function &F) constllvm::FunctionPassprotected
verifyAnalysis() constllvm::Passvirtual
VirtRegMap()llvm::VirtRegMapinline
VirtRegMap(const VirtRegMap &)=deletellvm::VirtRegMap
~Pass()llvm::Passvirtual