LLVM  6.0.0svn
Namespaces | Functions | Variables
AMDGPUISelDAGToDAG.cpp File Reference

Defines an instruction selector for the AMDGPU target. More...

#include "AMDGPU.h"
#include "AMDGPUArgumentUsageInfo.h"
#include "AMDGPUISelLowering.h"
#include "AMDGPUInstrInfo.h"
#include "AMDGPURegisterInfo.h"
#include "AMDGPUSubtarget.h"
#include "AMDGPUTargetMachine.h"
#include "SIDefines.h"
#include "SIISelLowering.h"
#include "SIInstrInfo.h"
#include "SIMachineFunctionInfo.h"
#include "SIRegisterInfo.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/CodeGen/FunctionLoweringInfo.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/Instruction.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include <cassert>
#include <cstdint>
#include <new>
#include <vector>
#include "AMDGPUGenDAGISel.inc"
Include dependency graph for AMDGPUISelDAGToDAG.cpp:

Go to the source code of this file.

Namespaces

 llvm
 Compute iterated dominance frontiers using a linear time algorithm.
 

Functions

 INITIALIZE_PASS_BEGIN (AMDGPUDAGToDAGISel, "isel", "AMDGPU DAG->DAG Pattern Instruction Selection", false, false) INITIALIZE_PASS_END(AMDGPUDAGToDAGISel
 
static unsigned selectSGPRVectorRegClassID (unsigned NumVectorElts)
 
static bool getConstantValue (SDValue N, uint32_t &Out)
 
static bool isStackPtrRelative (const MachinePointerInfo &PtrInfo)
 
static SDValue stripBitcast (SDValue Val)
 
static bool isExtractHiElt (SDValue In, SDValue &Out)
 
static SDValue stripExtractLoElt (SDValue In)
 

Variables

 isel
 
AMDGPU DAG DAG Pattern Instruction Selection
 
AMDGPU DAG DAG Pattern Instruction false
 

Detailed Description

Defines an instruction selector for the AMDGPU target.

Definition in file AMDGPUISelDAGToDAG.cpp.

Function Documentation

◆ getConstantValue()

static bool getConstantValue ( SDValue  N,
uint32_t Out 
)
static

Definition at line 380 of file AMDGPUISelDAGToDAG.cpp.

References llvm::ISD::ADD, llvm::ISD::ADDC, llvm::ISD::ADDE, llvm::AMDGPUInstrInfo::AMDGPUASI, llvm::ISD::AND, llvm::AMDGPU::HSAMD::Kernel::Key::Args, assert(), llvm::AMDGPUISD::ATOMIC_CMP_SWAP, llvm::AMDGPUISD::ATOMIC_DEC, llvm::AMDGPUISD::ATOMIC_INC, llvm::AMDGPUISD::BFE_I32, llvm::AMDGPUISD::BFE_U32, llvm::EVT::bitsEq(), llvm::ISD::BRCOND, llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, C, llvm::ISD::Constant, AMDGPUAS::CONSTANT_ADDRESS, AMDGPUAS::CONSTANT_BUFFER_0, llvm::ISD::ConstantFP, llvm::ISD::CopyToReg, llvm::AMDGPUISD::DIV_SCALE, llvm::AMDGPUISD::DWORDADDR, llvm::dyn_cast(), llvm::MVT::f32, llvm::MVT::f64, llvm::AMDGPUISD::FMA_W_CHAIN, llvm::ISD::FMAD, llvm::AMDGPUISD::FMUL_W_CHAIN, llvm::MemSDNode::getAddressSpace(), llvm::Instruction::getMetadata(), llvm::SDValue::getNode(), llvm::SDNode::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::ConstantSDNode::getSExtValue(), llvm::EVT::getSizeInBits(), llvm::AMDGPURegisterInfo::getSubRegFromChannel(), llvm::BasicBlock::getTerminator(), llvm::SDNode::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::SDNode::getVTList(), llvm::ConstantSDNode::getZExtValue(), llvm::MVT::Glue, llvm::MipsISD::Hi, llvm::MVT::i1, llvm::MVT::i128, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::i8, llvm::SIInstrInfo::isLegalMUBUFImmOffset(), llvm::SDNode::isMachineOpcode(), llvm::isUInt< 16 >(), llvm::isUInt< 32 >(), llvm::isUInt< 8 >(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm_unreachable, llvm::MipsISD::Lo, llvm::ISD::LOAD, Lowering, llvm::AMDGPUISD::MAD_I64_I32, llvm::AMDGPUISD::MAD_U64_U32, N, llvm::ISD::OR, llvm::MemSDNode::readMem(), llvm::MCID::RegSequence, llvm::ISD::SCALAR_TO_VECTOR, llvm::AMDGPUSubtarget::SEA_ISLANDS, llvm::MCID::Select, selectSGPRVectorRegClassID(), llvm::SDNode::setNodeId(), llvm::ISD::SIGN_EXTEND_INREG, Signed, llvm::ISD::SRA, llvm::ISD::SRL, llvm::ISD::STORE, llvm::ISD::SUB, llvm::ISD::SUBC, llvm::ISD::SUBE, llvm::ISD::UADDO, llvm::ISD::USUBO, llvm::MVT::v2f16, llvm::MVT::v2i16, llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS, and llvm::SITargetLowering::wrapAddr64Rsrc().

Referenced by llvm::ExecutionEngine::ExecutionEngine(), llvm::ExecutionEngine::getConstantValue(), and llvm::ExecutionEngine::InitializeMemory().

◆ INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN ( AMDGPUDAGToDAGISel  ,
"isel"  ,
"AMDGPU DAG->DAG Pattern Instruction Selection ,
false  ,
false   
)

◆ isExtractHiElt()

static bool isExtractHiElt ( SDValue  In,
SDValue Out 
)
static

◆ isStackPtrRelative()

static bool isStackPtrRelative ( const MachinePointerInfo PtrInfo)
static

Definition at line 1099 of file AMDGPUISelDAGToDAG.cpp.

References llvm::SISrcMods::ABS, llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Align, llvm::alignDown(), llvm::MachineFunction::allocateMemRefsArray(), llvm::AMDGPUInstrInfo::AMDGPUASI, llvm::ISD::AND, AS, assert(), B, llvm::ISD::BRCOND, llvm::SITargetLowering::buildRSRC(), C, llvm::ISD::CopyToReg, llvm::countPopulation(), llvm::PointerUnion< PT1, PT2 >::dyn_cast(), llvm::dyn_cast(), llvm::MVT::f32, llvm::ISD::FABS, AMDGPUAS::FLAT_ADDRESS, llvm::ISD::FNEG, llvm::MemSDNode::getAddressSpace(), llvm::APInt::getAllOnesValue(), llvm::MemSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::SIInstrInfo::getDefaultRsrcDataFormat(), llvm::SIMachineFunctionInfo::getFrameOffsetReg(), llvm::MachineFunction::getInfo(), llvm::MemSDNode::getMemOperand(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::SIMachineFunctionInfo::getScratchRSrcReg(), llvm::SIMachineFunctionInfo::getScratchWaveOffsetReg(), llvm::ConstantSDNode::getSExtValue(), llvm::SDValue::getSimpleValueType(), llvm::SDNode::getSimpleValueType(), llvm::AMDGPU::getSMRDEncodedOffset(), llvm::SIMachineFunctionInfo::getStackPtrOffsetReg(), llvm::SDValue::getValue(), llvm::SDNode::getVTList(), llvm::ConstantSDNode::getZExtValue(), llvm::APInt::getZExtValue(), llvm::SDValue::hasOneUse(), llvm::SDNode::hasOneUse(), High, llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::tgtok::In, llvm::SIInstrInfo::isLegalMUBUFImmOffset(), llvm::AMDGPU::isLegalSMRDImmOffset(), llvm::isMask_32(), llvm::PseudoSourceValue::isStack(), llvm::isUInt< 32 >(), llvm::SDValue::isUndef(), Lowering, llvm::BitmaskEnumDetail::Mask(), N, llvm::SISrcMods::NEG, llvm::MVT::Other, llvm::AMDGPUSubtarget::SEA_ISLANDS, llvm::ISD::SETCC, llvm::ISD::SETEQ, llvm::MachineSDNode::setMemRefs(), llvm::ISD::SETNE, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND_INREG, Signed, llvm::ISD::SRA, llvm::ISD::SRL, SubReg, TII, llvm::MachinePointerInfo::V, and llvm::MVT::v4i32.

◆ selectSGPRVectorRegClassID()

static unsigned selectSGPRVectorRegClassID ( unsigned  NumVectorElts)
static

Definition at line 363 of file AMDGPUISelDAGToDAG.cpp.

References llvm_unreachable.

Referenced by getConstantValue().

◆ stripBitcast()

static SDValue stripBitcast ( SDValue  Val)
static

◆ stripExtractLoElt()

static SDValue stripExtractLoElt ( SDValue  In)
static

Variable Documentation

◆ false

AMDGPU DAG DAG Pattern Instruction false

Definition at line 245 of file AMDGPUISelDAGToDAG.cpp.

◆ isel

isel

Definition at line 245 of file AMDGPUISelDAGToDAG.cpp.

◆ Selection

AMDGPU DAG DAG Pattern Instruction Selection