LLVM  6.0.0svn
Public Member Functions | Protected Member Functions | Protected Attributes | List of all members
llvm::ScheduleDAGMI Class Reference

ScheduleDAGMI is an implementation of ScheduleDAGInstrs that simply schedules machine instructions according to the given MachineSchedStrategy without much extra book-keeping. More...

#include "llvm/CodeGen/MachineScheduler.h"

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Public Member Functions

 ScheduleDAGMI (MachineSchedContext *C, std::unique_ptr< MachineSchedStrategy > S, bool RemoveKillFlags)
 
 ~ScheduleDAGMI () override
 
bool doMBBSchedRegionsTopDown () const override
 If this method returns true, handling of the scheduling regions themselves (in case of a scheduling boundary in MBB) will be done beginning with the topmost region of MBB. More...
 
LiveIntervalsgetLIS () const
 
virtual bool hasVRegLiveness () const
 Return true if this DAG supports VReg liveness and RegPressure. More...
 
void addMutation (std::unique_ptr< ScheduleDAGMutation > Mutation)
 Add a postprocessing step to the DAG builder. More...
 
bool canAddEdge (SUnit *SuccSU, SUnit *PredSU)
 True if an edge can be added from PredSU to SuccSU without creating a cycle. More...
 
bool addEdge (SUnit *SuccSU, const SDep &PredDep)
 Add a DAG edge to the given SU with the given predecessor dependence data. More...
 
MachineBasicBlock::iterator top () const
 
MachineBasicBlock::iterator bottom () const
 
void enterRegion (MachineBasicBlock *bb, MachineBasicBlock::iterator begin, MachineBasicBlock::iterator end, unsigned regioninstrs) override
 Implement the ScheduleDAGInstrs interface for handling the next scheduling region. More...
 
void schedule () override
 Implement ScheduleDAGInstrs interface for scheduling a sequence of reorderable instructions. More...
 
void startBlock (MachineBasicBlock *bb) override
 Prepares to perform scheduling in the given block. More...
 
void finishBlock () override
 Cleans up after scheduling in the given block. More...
 
void moveInstruction (MachineInstr *MI, MachineBasicBlock::iterator InsertPos)
 Change the position of an instruction within the basic block and update live ranges and region boundary iterators. More...
 
const SUnitgetNextClusterPred () const
 
const SUnitgetNextClusterSucc () const
 
void viewGraph (const Twine &Name, const Twine &Title) override
 viewGraph - Pop up a ghostview window with the reachable parts of the DAG rendered using 'dot'. More...
 
void viewGraph () override
 Out-of-line implementation with no arguments is handy for gdb. More...
 
- Public Member Functions inherited from llvm::ScheduleDAGInstrs
 ScheduleDAGInstrs (MachineFunction &mf, const MachineLoopInfo *mli, bool RemoveKillFlags=false)
 
 ~ScheduleDAGInstrs () override=default
 
const TargetSchedModelgetSchedModel () const
 Gets the machine model for instruction scheduling. More...
 
const MCSchedClassDescgetSchedClass (SUnit *SU) const
 Resolves and cache a resolved scheduling class for an SUnit. More...
 
MachineBasicBlock::iterator begin () const
 Returns an iterator to the top of the current scheduling region. More...
 
MachineBasicBlock::iterator end () const
 Returns an iterator to the bottom of the current scheduling region. More...
 
SUnitnewSUnit (MachineInstr *MI)
 Creates a new SUnit and return a ptr to it. More...
 
SUnitgetSUnit (MachineInstr *MI) const
 Returns an existing SUnit for this MI, or nullptr. More...
 
virtual void exitRegion ()
 Called when the scheduler has finished scheduling the current region. More...
 
void buildSchedGraph (AliasAnalysis *AA, RegPressureTracker *RPTracker=nullptr, PressureDiffs *PDiffs=nullptr, LiveIntervals *LIS=nullptr, bool TrackLaneMasks=false)
 Builds SUnits for the current region. More...
 
void addSchedBarrierDeps ()
 Adds dependencies from instructions in the current list of instructions being scheduled to scheduling barrier. More...
 
virtual void finalizeSchedule ()
 Allow targets to perform final scheduling actions at the level of the whole MachineFunction. More...
 
void dumpNode (const SUnit *SU) const override
 
std::string getGraphNodeLabel (const SUnit *SU) const override
 Returns a label for a DAG node that points to an instruction. More...
 
std::string getDAGName () const override
 Returns a label for the region of code covered by the DAG. More...
 
void fixupKills (MachineBasicBlock &MBB)
 Fixes register kill flags that scheduling has made invalid. More...
 
- Public Member Functions inherited from llvm::ScheduleDAG
 ScheduleDAG (MachineFunction &mf)
 
virtual ~ScheduleDAG ()
 
void clearDAG ()
 Clears the DAG state (between regions). More...
 
const MCInstrDescgetInstrDesc (const SUnit *SU) const
 Returns the MCInstrDesc of this SUnit. More...
 
virtual void addCustomGraphFeatures (GraphWriter< ScheduleDAG *> &) const
 Adds custom features for a visualization of the ScheduleDAG. More...
 
unsigned VerifyScheduledDAG (bool isBottomUp)
 Verifies that all SUnits were scheduled and that their state is consistent. More...
 

Protected Member Functions

void postprocessDAG ()
 Apply each ScheduleDAGMutation step in order. More...
 
void initQueues (ArrayRef< SUnit *> TopRoots, ArrayRef< SUnit *> BotRoots)
 Release ExitSU predecessors and setup scheduler queues. More...
 
void updateQueues (SUnit *SU, bool IsTopNode)
 Update scheduler DAG and queues after scheduling an instruction. More...
 
void placeDebugValues ()
 Reinsert debug_values recorded in ScheduleDAGInstrs::DbgValues. More...
 
void dumpSchedule () const
 dump the scheduled Sequence. More...
 
bool checkSchedLimit ()
 
void findRootsAndBiasEdges (SmallVectorImpl< SUnit *> &TopRoots, SmallVectorImpl< SUnit *> &BotRoots)
 
void releaseSucc (SUnit *SU, SDep *SuccEdge)
 ReleaseSucc - Decrement the NumPredsLeft count of a successor. More...
 
void releaseSuccessors (SUnit *SU)
 releaseSuccessors - Call releaseSucc on each of SU's successors. More...
 
void releasePred (SUnit *SU, SDep *PredEdge)
 ReleasePred - Decrement the NumSuccsLeft count of a predecessor. More...
 
void releasePredecessors (SUnit *SU)
 releasePredecessors - Call releasePred on each of SU's predecessors. More...
 
- Protected Member Functions inherited from llvm::ScheduleDAGInstrs
void reduceHugeMemNodeMaps (Value2SUsMap &stores, Value2SUsMap &loads, unsigned N)
 Reduces maps in FIFO order, by N SUs. More...
 
void addChainDependency (SUnit *SUa, SUnit *SUb, unsigned Latency=0)
 Adds a chain edge between SUa and SUb, but only if both AliasAnalysis and Target fail to deny the dependency. More...
 
void addChainDependencies (SUnit *SU, SUList &SUs, unsigned Latency)
 Adds dependencies as needed from all SUs in list to SU. More...
 
void addChainDependencies (SUnit *SU, Value2SUsMap &Val2SUsMap)
 Adds dependencies as needed from all SUs in map, to SU. More...
 
void addChainDependencies (SUnit *SU, Value2SUsMap &Val2SUsMap, ValueType V)
 Adds dependencies as needed to SU, from all SUs mapped to V. More...
 
void addBarrierChain (Value2SUsMap &map)
 Adds barrier chain edges from all SUs in map, and then clear the map. More...
 
void insertBarrierChain (Value2SUsMap &map)
 Inserts a barrier chain in a huge region, far below current SU. More...
 
void initSUnits ()
 Creates an SUnit for each real instruction, numbered in top-down topological order. More...
 
void addPhysRegDataDeps (SUnit *SU, unsigned OperIdx)
 MO is an operand of SU's instruction that defines a physical register. More...
 
void addPhysRegDeps (SUnit *SU, unsigned OperIdx)
 Adds register dependencies (data, anti, and output) from this SUnit to following instructions in the same scheduling region that depend the physical register referenced at OperIdx. More...
 
void addVRegDefDeps (SUnit *SU, unsigned OperIdx)
 Adds register output and data dependencies from this SUnit to instructions that occur later in the same scheduling region if they read from or write to the virtual register defined at OperIdx. More...
 
void addVRegUseDeps (SUnit *SU, unsigned OperIdx)
 Adds a register data dependency if the instruction that defines the virtual register used at OperIdx is mapped to an SUnit. More...
 
void startBlockForKills (MachineBasicBlock *BB)
 Initializes register live-range state for updating kills. More...
 
void toggleKillFlag (MachineInstr &MI, MachineOperand &MO)
 Toggles a register operand kill flag. More...
 
LaneBitmask getLaneMaskForMO (const MachineOperand &MO) const
 Returns a mask for which lanes get read/written by the given (register) machine operand. More...
 

Protected Attributes

AliasAnalysisAA
 
LiveIntervalsLIS
 
std::unique_ptr< MachineSchedStrategySchedImpl
 
ScheduleDAGTopologicalSort Topo
 Topo - A topological ordering for SUnits which permits fast IsReachable and similar queries. More...
 
std::vector< std::unique_ptr< ScheduleDAGMutation > > Mutations
 Ordered list of DAG postprocessing steps. More...
 
MachineBasicBlock::iterator CurrentTop
 The top of the unscheduled zone. More...
 
MachineBasicBlock::iterator CurrentBottom
 The bottom of the unscheduled zone. More...
 
const SUnitNextClusterPred = nullptr
 Record the next node in a scheduled cluster. More...
 
const SUnitNextClusterSucc = nullptr
 
unsigned NumInstrsScheduled = 0
 The number of instructions scheduled so far. More...
 
- Protected Attributes inherited from llvm::ScheduleDAGInstrs
const MachineLoopInfoMLI
 
const MachineFrameInfoMFI
 
TargetSchedModel SchedModel
 TargetSchedModel provides an interface to the machine model. More...
 
bool RemoveKillFlags
 True if the DAG builder should remove kill flags (in preparation for rescheduling). More...
 
bool CanHandleTerminators = false
 The standard DAG builder does not normally include terminators as DAG nodes because it does not create the necessary dependencies to prevent reordering. More...
 
bool TrackLaneMasks = false
 Whether lane masks should get tracked. More...
 
MachineBasicBlockBB
 The block in which to insert instructions. More...
 
MachineBasicBlock::iterator RegionBegin
 The beginning of the range to be scheduled. More...
 
MachineBasicBlock::iterator RegionEnd
 The end of the range to be scheduled. More...
 
unsigned NumRegionInstrs
 Instructions in this region (distance(RegionBegin, RegionEnd)). More...
 
DenseMap< MachineInstr *, SUnit * > MISUnitMap
 After calling BuildSchedGraph, each machine instruction in the current scheduling region is mapped to an SUnit. More...
 
Reg2SUnitsMap Defs
 Defs, Uses - Remember where defs and uses of each register are as we iterate upward through the instructions. More...
 
Reg2SUnitsMap Uses
 
VReg2SUnitMultiMap CurrentVRegDefs
 Tracks the last instruction(s) in this region defining each virtual register. More...
 
VReg2SUnitOperIdxMultiMap CurrentVRegUses
 Tracks the last instructions in this region using each virtual register. More...
 
AliasAnalysisAAForDep = nullptr
 
SUnitBarrierChain = nullptr
 Remember a generic side-effecting instruction as we proceed. More...
 
UndefValueUnknownValue
 For an unanalyzable memory access, this Value is used in maps. More...
 
DbgValueVector DbgValues
 Remember instruction that precedes DBG_VALUE. More...
 
MachineInstrFirstDbgValue = nullptr
 
LivePhysRegs LiveRegs
 Set of live physical registers for updating kill flags. More...
 

Additional Inherited Members

- Public Types inherited from llvm::ScheduleDAGInstrs
using SUList = std::list< SUnit * >
 A list of SUnits, used in Value2SUsMap, during DAG construction. More...
 
- Public Attributes inherited from llvm::ScheduleDAG
const TargetMachineTM
 Target processor. More...
 
const TargetInstrInfoTII
 Target instruction information. More...
 
const TargetRegisterInfoTRI
 Target processor register info. More...
 
MachineFunctionMF
 Machine function. More...
 
MachineRegisterInfoMRI
 Virtual/real register map. More...
 
std::vector< SUnitSUnits
 The scheduling units. More...
 
SUnit EntrySU
 Special node for the region entry. More...
 
SUnit ExitSU
 Special node for the region exit. More...
 
bool StressSched
 
- Protected Types inherited from llvm::ScheduleDAGInstrs
using DbgValueVector = std::vector< std::pair< MachineInstr *, MachineInstr * > >
 

Detailed Description

ScheduleDAGMI is an implementation of ScheduleDAGInstrs that simply schedules machine instructions according to the given MachineSchedStrategy without much extra book-keeping.

This is the common functionality between PreRA and PostRA MachineScheduler.

Definition at line 260 of file MachineScheduler.h.

Constructor & Destructor Documentation

◆ ScheduleDAGMI()

llvm::ScheduleDAGMI::ScheduleDAGMI ( MachineSchedContext C,
std::unique_ptr< MachineSchedStrategy S,
bool  RemoveKillFlags 
)
inline

Definition at line 290 of file MachineScheduler.h.

◆ ~ScheduleDAGMI()

ScheduleDAGMI::~ScheduleDAGMI ( )
overridedefault

Referenced by llvm::ReadyQueue::dump().

Member Function Documentation

◆ addEdge()

bool ScheduleDAGMI::addEdge ( SUnit SuccSU,
const SDep PredDep 
)

Add a DAG edge to the given SU with the given predecessor dependence data.

Returns
true if the edge may be added without creating a cycle OR if an equivalent edge already existed (false indicates failure).

Definition at line 606 of file MachineScheduler.cpp.

References llvm::SUnit::addPred(), llvm::SDep::getSUnit(), and llvm::SDep::isArtificial().

Referenced by llvm::createCopyConstrainDAGMutation(), llvm::createStoreClusterDAGMutation(), and fuseInstructionPair().

◆ addMutation()

void llvm::ScheduleDAGMI::addMutation ( std::unique_ptr< ScheduleDAGMutation Mutation)
inline

Add a postprocessing step to the DAG builder.

Mutations are applied in the order that they are added after normal DAG building and before MachineSchedStrategy initialization.

ScheduleDAGMI takes ownership of the Mutation object.

Definition at line 316 of file MachineScheduler.h.

References addEdge().

Referenced by llvm::AArch64beTargetMachine::AArch64beTargetMachine(), llvm::ARMBETargetMachine::ARMBETargetMachine(), createGCNMaxOccupancyMachineScheduler(), llvm::createGenericSchedLive(), createVLIWMachineSched(), llvm::GCNTargetMachine::getSubtargetImpl(), and llvm::X86TargetMachine::getTargetIRAnalysis().

◆ bottom()

MachineBasicBlock::iterator llvm::ScheduleDAGMI::bottom ( ) const
inline

◆ canAddEdge()

bool ScheduleDAGMI::canAddEdge ( SUnit SuccSU,
SUnit PredSU 
)

True if an edge can be added from PredSU to SuccSU without creating a cycle.

Definition at line 602 of file MachineScheduler.cpp.

Referenced by llvm::createCopyConstrainDAGMutation().

◆ checkSchedLimit()

bool ScheduleDAGMI::checkSchedLimit ( )
protected

Definition at line 737 of file MachineScheduler.cpp.

◆ doMBBSchedRegionsTopDown()

bool llvm::ScheduleDAGMI::doMBBSchedRegionsTopDown ( ) const
inlineoverridevirtual

If this method returns true, handling of the scheduling regions themselves (in case of a scheduling boundary in MBB) will be done beginning with the topmost region of MBB.

Reimplemented from llvm::ScheduleDAGInstrs.

Definition at line 301 of file MachineScheduler.h.

◆ dumpSchedule()

LLVM_DUMP_METHOD void ScheduleDAGMI::dumpSchedule ( ) const
protected

dump the scheduled Sequence.

Definition at line 923 of file MachineScheduler.cpp.

References llvm::sys::path::begin(), llvm::dbgs(), llvm::sys::path::end(), and MI.

Referenced by llvm::SIScheduleDAGMI::schedule().

◆ enterRegion()

void ScheduleDAGMI::enterRegion ( MachineBasicBlock bb,
MachineBasicBlock::iterator  begin,
MachineBasicBlock::iterator  end,
unsigned  regioninstrs 
)
overridevirtual

Implement the ScheduleDAGInstrs interface for handling the next scheduling region.

enterRegion - Called back from MachineScheduler::runOnMachineFunction after crossing a scheduling boundary.

This covers all instructions in a block, while schedule() may only cover a subset.

[begin, end) includes all instructions in the region, including the boundary itself and single-instruction regions that don't get scheduled.

Reimplemented from llvm::ScheduleDAGInstrs.

Reimplemented in llvm::ScheduleDAGMILive, and llvm::GCNIterativeScheduler.

Definition at line 707 of file MachineScheduler.cpp.

References llvm::ScheduleDAGInstrs::enterRegion().

Referenced by llvm::ScheduleDAGMILive::enterRegion().

◆ findRootsAndBiasEdges()

void ScheduleDAGMI::findRootsAndBiasEdges ( SmallVectorImpl< SUnit *> &  TopRoots,
SmallVectorImpl< SUnit *> &  BotRoots 
)
protected

◆ finishBlock()

void ScheduleDAGMI::finishBlock ( )
overridevirtual

Cleans up after scheduling in the given block.

Reimplemented from llvm::ScheduleDAGInstrs.

Definition at line 698 of file MachineScheduler.cpp.

References llvm::ScheduleDAGInstrs::finishBlock().

Referenced by llvm::GCNScheduleDAGMILive::finalizeSchedule().

◆ getLIS()

LiveIntervals* llvm::ScheduleDAGMI::getLIS ( ) const
inline

Definition at line 306 of file MachineScheduler.h.

References llvm::MachineSchedContext::LIS.

Referenced by llvm::createCopyConstrainDAGMutation().

◆ getNextClusterPred()

const SUnit* llvm::ScheduleDAGMI::getNextClusterPred ( ) const
inline

Definition at line 354 of file MachineScheduler.h.

Referenced by llvm::GenericScheduler::tryCandidate().

◆ getNextClusterSucc()

const SUnit* llvm::ScheduleDAGMI::getNextClusterSucc ( ) const
inline

◆ hasVRegLiveness()

virtual bool llvm::ScheduleDAGMI::hasVRegLiveness ( ) const
inlinevirtual

◆ initQueues()

void ScheduleDAGMI::initQueues ( ArrayRef< SUnit *>  TopRoots,
ArrayRef< SUnit *>  BotRoots 
)
protected

Release ExitSU predecessors and setup scheduler queues.

Identify DAG roots and setup scheduler queues.

Definition at line 859 of file MachineScheduler.cpp.

References E, I, nextIfDebug(), llvm::ArrayRef< T >::rbegin(), and llvm::ArrayRef< T >::rend().

Referenced by llvm::ScheduleDAGMILive::initQueues().

◆ moveInstruction()

void ScheduleDAGMI::moveInstruction ( MachineInstr MI,
MachineBasicBlock::iterator  InsertPos 
)

Change the position of an instruction within the basic block and update live ranges and region boundary iterators.

This is normally called from the main scheduler loop but may also be invoked by the scheduling strategy to perform additional code motion.

Definition at line 719 of file MachineScheduler.cpp.

References MI.

Referenced by llvm::GenericScheduler::reschedulePhysRegCopies().

◆ placeDebugValues()

void ScheduleDAGMI::placeDebugValues ( )
protected

Reinsert debug_values recorded in ScheduleDAGInstrs::DbgValues.

Reinsert any remaining debug_values, just like the PostRA scheduler.

Definition at line 900 of file MachineScheduler.cpp.

References P.

Referenced by llvm::GCNScheduleDAGMILive::schedule(), llvm::SIScheduleDAGMI::schedule(), and llvm::GCNIterativeScheduler::scheduleRegion().

◆ postprocessDAG()

void ScheduleDAGMI::postprocessDAG ( )
protected

Apply each ScheduleDAGMutation step in order.

This allows different instances of ScheduleDAGMI to perform custom DAG postprocessing.

Definition at line 834 of file MachineScheduler.cpp.

References findRootsAndBiasEdges().

◆ releasePred()

void ScheduleDAGMI::releasePred ( SUnit SU,
SDep PredEdge 
)
protected

ReleasePred - Decrement the NumSuccsLeft count of a predecessor.

When NumSuccsLeft reaches zero, release the predecessor node.

FIXME: Adjust PredSU height based on MinLatency.

Definition at line 660 of file MachineScheduler.cpp.

References llvm::SUnit::BotReadyCycle, llvm::dbgs(), llvm::SUnit::dump(), llvm::SDep::getLatency(), llvm::SDep::getSUnit(), llvm::SDep::isCluster(), llvm::SDep::isWeak(), llvm_unreachable, llvm::SUnit::NumSuccsLeft, and llvm::SUnit::WeakSuccsLeft.

◆ releasePredecessors()

void ScheduleDAGMI::releasePredecessors ( SUnit SU)
protected

releasePredecessors - Call releasePred on each of SU's predecessors.

Definition at line 688 of file MachineScheduler.cpp.

References llvm::SUnit::Preds.

◆ releaseSucc()

void ScheduleDAGMI::releaseSucc ( SUnit SU,
SDep SuccEdge 
)
protected

ReleaseSucc - Decrement the NumPredsLeft count of a successor.

When NumPredsLeft reaches zero, release the successor node.

FIXME: Adjust SuccSU height based on MinLatency.

Definition at line 623 of file MachineScheduler.cpp.

References llvm::dbgs(), llvm::SUnit::dump(), llvm::SDep::getLatency(), llvm::SDep::getSUnit(), llvm::SDep::isCluster(), llvm::SDep::isWeak(), llvm_unreachable, llvm::SUnit::NumPredsLeft, llvm::SUnit::TopReadyCycle, and llvm::SUnit::WeakPredsLeft.

◆ releaseSuccessors()

void ScheduleDAGMI::releaseSuccessors ( SUnit SU)
protected

releaseSuccessors - Call releaseSucc on each of SU's successors.

Definition at line 651 of file MachineScheduler.cpp.

References llvm::SUnit::Succs.

◆ schedule()

void ScheduleDAGMI::schedule ( )
overridevirtual

Implement ScheduleDAGInstrs interface for scheduling a sequence of reorderable instructions.

Per-region scheduling driver, called back from MachineScheduler::runOnMachineFunction.

This is a simplified driver that does not consider liveness or register pressure. It is useful for PostRA scheduling and potentially other custom schedulers.

Implements llvm::ScheduleDAGInstrs.

Reimplemented in llvm::ScheduleDAGMILive, llvm::SIScheduleDAGMI, llvm::GCNScheduleDAGMILive, llvm::VLIWMachineScheduler, and llvm::GCNIterativeScheduler.

Definition at line 752 of file MachineScheduler.cpp.

References assert(), llvm::sys::path::begin(), llvm::dbgs(), DEBUG, llvm::SUnit::getInstr(), llvm::SUnit::isBottomReady(), llvm::SUnit::isScheduled, llvm::SUnit::isTopReady(), MI, nextIfDebug(), and priorNonDebug().

◆ startBlock()

void ScheduleDAGMI::startBlock ( MachineBasicBlock BB)
overridevirtual

Prepares to perform scheduling in the given block.

Reimplemented from llvm::ScheduleDAGInstrs.

Definition at line 693 of file MachineScheduler.cpp.

References llvm::ScheduleDAGInstrs::startBlock().

Referenced by llvm::GCNScheduleDAGMILive::finalizeSchedule().

◆ top()

MachineBasicBlock::iterator llvm::ScheduleDAGMI::top ( ) const
inline

◆ updateQueues()

void ScheduleDAGMI::updateQueues ( SUnit SU,
bool  IsTopNode 
)
protected

Update scheduler DAG and queues after scheduling an instruction.

Update scheduler queues after scheduling an instruction.

Definition at line 889 of file MachineScheduler.cpp.

References llvm::SUnit::isScheduled.

◆ viewGraph() [1/2]

void ScheduleDAGMI::viewGraph ( const Twine Name,
const Twine Title 
)
overridevirtual

viewGraph - Pop up a ghostview window with the reachable parts of the DAG rendered using 'dot'.

Reimplemented from llvm::ScheduleDAG.

Definition at line 3634 of file MachineScheduler.cpp.

References llvm::errs(), and llvm::ViewGraph().

◆ viewGraph() [2/2]

void ScheduleDAGMI::viewGraph ( )
overridevirtual

Out-of-line implementation with no arguments is handy for gdb.

Reimplemented from llvm::ScheduleDAG.

Definition at line 3644 of file MachineScheduler.cpp.

Member Data Documentation

◆ AA

AliasAnalysis* llvm::ScheduleDAGMI::AA
protected

Definition at line 262 of file MachineScheduler.h.

Referenced by llvm::GCNIterativeScheduler::BuildDAG::BuildDAG().

◆ CurrentBottom

MachineBasicBlock::iterator llvm::ScheduleDAGMI::CurrentBottom
protected

The bottom of the unscheduled zone.

Definition at line 277 of file MachineScheduler.h.

Referenced by llvm::SIScheduleDAGMI::schedule().

◆ CurrentTop

MachineBasicBlock::iterator llvm::ScheduleDAGMI::CurrentTop
protected

The top of the unscheduled zone.

Definition at line 274 of file MachineScheduler.h.

Referenced by llvm::SIScheduleDAGMI::schedule().

◆ LIS

LiveIntervals* llvm::ScheduleDAGMI::LIS
protected

◆ Mutations

std::vector<std::unique_ptr<ScheduleDAGMutation> > llvm::ScheduleDAGMI::Mutations
protected

Ordered list of DAG postprocessing steps.

Definition at line 271 of file MachineScheduler.h.

◆ NextClusterPred

const SUnit* llvm::ScheduleDAGMI::NextClusterPred = nullptr
protected

Record the next node in a scheduled cluster.

Definition at line 280 of file MachineScheduler.h.

◆ NextClusterSucc

const SUnit* llvm::ScheduleDAGMI::NextClusterSucc = nullptr
protected

Definition at line 281 of file MachineScheduler.h.

◆ NumInstrsScheduled

unsigned llvm::ScheduleDAGMI::NumInstrsScheduled = 0
protected

The number of instructions scheduled so far.

Used to cut off the scheduler at the point determined by misched-cutoff.

Definition at line 286 of file MachineScheduler.h.

◆ SchedImpl

std::unique_ptr<MachineSchedStrategy> llvm::ScheduleDAGMI::SchedImpl
protected

◆ Topo

ScheduleDAGTopologicalSort llvm::ScheduleDAGMI::Topo
protected

Topo - A topological ordering for SUnits which permits fast IsReachable and similar queries.

Definition at line 268 of file MachineScheduler.h.

Referenced by llvm::GCNIterativeScheduler::BuildDAG::BuildDAG(), and llvm::SIScheduleDAGMI::SIScheduleDAGMI().


The documentation for this class was generated from the following files: