26#define DEBUG_TYPE "instcombine"
30 cl::desc(
"Verify that computeKnownBits() and "
31 "SimplifyDemandedBits() are consistent"),
35 "instcombine-simplify-vector-elts-depth",
37 "Depth limit when simplifying vector instructions and their operands"),
44 const APInt &Demanded) {
46 assert(OpNo < I->getNumOperands() &&
"Operand index too large");
55 if (
C->isSubsetOf(Demanded))
59 I->setOperand(OpNo, ConstantInt::get(
Op->getType(), *
C & Demanded));
71 const APInt &DemandedMask,
74 assert(
I->getOpcode() == Instruction::LShr &&
75 "Only lshr instruction supported");
79 if (!
match(
I->getOperand(0),
89 if (DemandedBitWidth > ShlAmt)
93 if (
Upper->getType()->getScalarSizeInBits() < ShlAmt + DemandedBitWidth)
100 Value *ShrAmt =
I->getOperand(1);
105 if (~KnownShrBits.
Zero != ShlAmt)
124 if (
unsigned BitWidth = Ty->getScalarSizeInBits())
127 return DL.getPointerTypeSizeInBits(Ty);
136 SQ.getWithInstruction(&Inst));
137 if (!V)
return false;
138 if (V == &Inst)
return true;
154 SQ.getWithInstruction(&Inst));
167 const APInt &DemandedMask,
171 Use &U =
I->getOperandUse(OpNo);
179 if (DemandedMask.
isZero()) {
204 if (!NewVal)
return false;
236 const APInt &DemandedMask,
240 assert(
I !=
nullptr &&
"Null pointer of Value???");
243 Type *VTy =
I->getType();
247 "Value *V, DemandedMask and Known must have same BitWidth");
253 auto disableWrapFlagsBasedOnUnusedHighBits = [](
Instruction *
I,
259 I->setHasNoSignedWrap(
false);
260 I->setHasNoUnsignedWrap(
false);
267 auto simplifyOperandsBasedOnUnusedHighBits = [&](
APInt &DemandedFromOps) {
276 disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
282 switch (
I->getOpcode()) {
286 case Instruction::And: {
304 return I->getOperand(0);
306 return I->getOperand(1);
314 case Instruction::Or: {
320 I->dropPoisonGeneratingFlags();
335 return I->getOperand(0);
337 return I->getOperand(1);
346 RHSCache(
I->getOperand(1), RHSKnown);
355 case Instruction::Xor: {
366 return Builder.CreateUnaryIntrinsic(Intrinsic::ctpop,
Xor);
380 return I->getOperand(0);
382 return I->getOperand(1);
389 BinaryOperator::CreateOr(
I->getOperand(0),
I->getOperand(1));
403 ~RHSKnown.
One & DemandedMask);
413 if ((*
C | ~DemandedMask).isAllOnes()) {
429 if (LHSInst->getOpcode() == Instruction::And && LHSInst->hasOneUse() &&
432 (LHSKnown.One & RHSKnown.
One & DemandedMask) != 0) {
433 APInt NewMask = ~(LHSKnown.One & RHSKnown.
One & DemandedMask);
436 Instruction *NewAnd = BinaryOperator::CreateAnd(
I->getOperand(0), AndC);
440 Instruction *NewXor = BinaryOperator::CreateXor(NewAnd, XorC);
446 case Instruction::Select: {
456 auto CanonicalizeSelectConstant = [](
Instruction *
I,
unsigned OpNo,
457 const APInt &DemandedMask) {
477 if ((*CmpC & DemandedMask) == (*SelC & DemandedMask)) {
478 I->setOperand(OpNo, ConstantInt::get(
I->getType(), *CmpC));
483 if (CanonicalizeSelectConstant(
I, 1, DemandedMask) ||
484 CanonicalizeSelectConstant(
I, 2, DemandedMask))
495 case Instruction::Trunc: {
509 return Builder.CreateLShr(Trunc,
C->getZExtValue());
514 case Instruction::ZExt: {
515 unsigned SrcBitWidth =
I->getOperand(0)->getType()->getScalarSizeInBits();
523 I->dropPoisonGeneratingFlags();
527 if (
I->getOpcode() == Instruction::ZExt &&
I->hasNonNeg() &&
534 case Instruction::SExt: {
536 unsigned SrcBitWidth =
I->getOperand(0)->getType()->getScalarSizeInBits();
538 APInt InputDemandedBits = DemandedMask.
trunc(SrcBitWidth);
543 InputDemandedBits.
setBit(SrcBitWidth-1);
564 case Instruction::Add: {
565 if ((DemandedMask & 1) == 0) {
571 X->getType()->isIntOrIntVectorTy(1) &&
X->getType() ==
Y->getType()) {
581 return Builder.CreateSExt(AndNot, VTy);
586 X->getType()->isIntOrIntVectorTy(1) &&
X->getType() ==
Y->getType() &&
587 (
I->getOperand(0)->hasOneUse() ||
I->getOperand(1)->hasOneUse())) {
608 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
614 APInt DemandedFromLHS = DemandedFromOps;
618 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
620 unsigned NtzLHS = (~DemandedMask & LHSKnown.Zero).
countr_one();
621 APInt DemandedFromRHS = DemandedFromOps;
624 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
629 return I->getOperand(0);
630 if (DemandedFromOps.
isSubsetOf(LHSKnown.Zero))
631 return I->getOperand(1);
640 return Builder.CreateXor(
I->getOperand(0), ConstantInt::get(VTy, *
C));
650 case Instruction::Sub: {
657 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
663 APInt DemandedFromLHS = DemandedFromOps;
667 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
672 return I->getOperand(0);
675 if (DemandedFromOps.
isOne() && DemandedFromOps.
isSubsetOf(LHSKnown.Zero))
676 return I->getOperand(1);
684 return Builder.CreateNot(
I->getOperand(1));
693 case Instruction::Mul: {
694 APInt DemandedFromOps;
695 if (simplifyOperandsBasedOnUnusedHighBits(DemandedFromOps))
705 Constant *ShiftC = ConstantInt::get(VTy, CTZ);
706 Instruction *Shl = BinaryOperator::CreateShl(
I->getOperand(0), ShiftC);
713 if (
I->getOperand(0) ==
I->getOperand(1) && DemandedMask.
ult(4)) {
714 Constant *One = ConstantInt::get(VTy, 1);
715 Instruction *And1 = BinaryOperator::CreateAnd(
I->getOperand(0), One);
722 case Instruction::Shl: {
729 DemandedMask, Known))
733 if (
I->hasOneUse()) {
735 if (Inst->
getOpcode() == BinaryOperator::Or) {
737 auto [IID, FShiftArgs] = *Opt;
738 if ((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
739 FShiftArgs[0] == FShiftArgs[1]) {
751 if (
I->hasNoSignedWrap()) {
755 if (SignBits > ShiftAmt && SignBits - ShiftAmt >= NumHiDemandedBits)
756 return I->getOperand(0);
766 Constant *LeftShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
770 LeftShiftAmtC,
DL) ==
C) {
771 Instruction *Lshr = BinaryOperator::CreateLShr(NewC,
X);
777 APInt DemandedMaskIn(DemandedMask.
lshr(ShiftAmt));
801 I->dropPoisonGeneratingFlags();
809 case Instruction::LShr: {
815 if (
I->hasOneUse()) {
817 if (Inst->
getOpcode() == BinaryOperator::Or) {
819 auto [IID, FShiftArgs] = *Opt;
820 if ((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
821 FShiftArgs[0] == FShiftArgs[1]) {
837 if (SignBits >= NumHiDemandedBits)
838 return I->getOperand(0);
847 Constant *RightShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
851 RightShiftAmtC,
DL) ==
C) {
858 if (
match(
I->getOperand(0),
862 X, ConstantInt::get(
X->getType(), Factor->
lshr(ShiftAmt)));
868 APInt DemandedMaskIn(DemandedMask.
shl(ShiftAmt));
871 I->dropPoisonGeneratingFlags();
886 case Instruction::AShr: {
892 if (SignBits >= NumHiDemandedBits)
893 return I->getOperand(0);
899 if (DemandedMask.
isOne()) {
902 I->getOperand(0),
I->getOperand(1),
I->getName());
911 APInt DemandedMaskIn(DemandedMask.
shl(ShiftAmt));
914 bool ShiftedInBitsDemanded = DemandedMask.
countl_zero() < ShiftAmt;
915 if (ShiftedInBitsDemanded)
919 I->dropPoisonGeneratingFlags();
925 if (Known.
Zero[
BitWidth - 1] || !ShiftedInBitsDemanded) {
935 ShiftAmt != 0,
I->isExact());
941 case Instruction::UDiv: {
947 APInt DemandedMaskIn =
952 I->dropPoisonGeneratingFlags();
963 case Instruction::SRem: {
966 if (DemandedMask.
ult(*Rem))
967 return I->getOperand(0);
969 APInt LowBits = *Rem - 1;
980 case Instruction::Call: {
981 bool KnownBitsComputed =
false;
983 switch (
II->getIntrinsicID()) {
984 case Intrinsic::abs: {
985 if (DemandedMask == 1)
986 return II->getArgOperand(0);
989 case Intrinsic::ctpop: {
997 II->getModule(), Intrinsic::ctpop, VTy);
1002 case Intrinsic::bswap: {
1019 NewVal = BinaryOperator::CreateLShr(
1020 II->getArgOperand(0), ConstantInt::get(VTy, NLZ - NTZ));
1022 NewVal = BinaryOperator::CreateShl(
1023 II->getArgOperand(0), ConstantInt::get(VTy, NTZ - NLZ));
1029 case Intrinsic::ptrmask: {
1030 unsigned MaskWidth =
I->getOperand(1)->getType()->getScalarSizeInBits();
1035 I, 1, (DemandedMask & ~LHSKnown.Zero).zextOrTrunc(MaskWidth),
1036 RHSKnown, Q,
Depth + 1))
1042 Known = LHSKnown & RHSKnown;
1043 KnownBitsComputed =
true;
1058 if (DemandedMask.
isSubsetOf(RHSKnown.One | LHSKnown.Zero))
1059 return I->getOperand(0);
1063 I, 1, (DemandedMask & ~LHSKnown.Zero).zextOrTrunc(MaskWidth)))
1078 if (!LHSKnown.isZero()) {
1079 const unsigned trailingZeros = LHSKnown.countMinTrailingZeros();
1082 uint64_t HighBitsGEPIndex = GEPIndex & ~PointerAlignBits;
1084 GEPIndex & PointerAlignBits & PtrMaskImmediate;
1086 uint64_t MaskedGEPIndex = HighBitsGEPIndex | MaskedLowBitsGEPIndex;
1088 if (MaskedGEPIndex != GEPIndex) {
1091 Type *GEPIndexType =
1092 DL.getIndexType(
GEP->getPointerOperand()->getType());
1094 GEP->getSourceElementType(), InnerPtr,
1095 ConstantInt::get(GEPIndexType, MaskedGEPIndex),
1096 GEP->getName(),
GEP->isInBounds());
1107 case Intrinsic::fshr:
1108 case Intrinsic::fshl: {
1116 if (
II->getIntrinsicID() == Intrinsic::fshr)
1119 APInt DemandedMaskLHS(DemandedMask.
lshr(ShiftAmt));
1121 if (
I->getOperand(0) !=
I->getOperand(1)) {
1127 I->dropPoisonGeneratingAnnotations();
1134 if (DemandedMaskLHS.
isSubsetOf(LHSKnown.Zero | LHSKnown.One) &&
1148 LHSKnown <<= ShiftAmt;
1151 KnownBitsComputed =
true;
1154 case Intrinsic::umax: {
1161 CTZ >=
C->getActiveBits())
1162 return II->getArgOperand(0);
1165 case Intrinsic::umin: {
1173 CTZ >=
C->getBitWidth() -
C->countl_one())
1174 return II->getArgOperand(0);
1180 *
II, DemandedMask, Known, KnownBitsComputed);
1188 if (!KnownBitsComputed)
1194 if (
I->getType()->isPointerTy()) {
1195 Align Alignment =
I->getPointerAlignment(
DL);
1203 if (!
I->getType()->isPointerTy() &&
1209 if (Known != ReferenceKnown) {
1210 errs() <<
"Mismatched known bits for " << *
I <<
" in "
1211 <<
I->getFunction()->getName() <<
"\n";
1212 errs() <<
"computeKnownBits(): " << ReferenceKnown <<
"\n";
1213 errs() <<
"SimplifyDemandedBits(): " << Known <<
"\n";
1228 Type *ITy =
I->getType();
1237 switch (
I->getOpcode()) {
1238 case Instruction::And: {
1253 return I->getOperand(0);
1255 return I->getOperand(1);
1259 case Instruction::Or: {
1276 return I->getOperand(0);
1278 return I->getOperand(1);
1282 case Instruction::Xor: {
1298 return I->getOperand(0);
1300 return I->getOperand(1);
1304 case Instruction::Add: {
1312 return I->getOperand(0);
1316 return I->getOperand(1);
1324 case Instruction::Sub: {
1332 return I->getOperand(0);
1341 case Instruction::AShr: {
1354 const APInt *ShiftRC;
1355 const APInt *ShiftLC;
1403 if (!ShlOp1 || !ShrOp1)
1408 unsigned BitWidth = Ty->getScalarSizeInBits();
1417 Known.
Zero &= DemandedMask;
1422 bool isLshr = (Shr->
getOpcode() == Instruction::LShr);
1423 BitMask1 = isLshr ? (BitMask1.
lshr(ShrAmt) << ShlAmt) :
1424 (BitMask1.
ashr(ShrAmt) << ShlAmt);
1426 if (ShrAmt <= ShlAmt) {
1427 BitMask2 <<= (ShlAmt - ShrAmt);
1429 BitMask2 = isLshr ? BitMask2.
lshr(ShrAmt - ShlAmt):
1430 BitMask2.
ashr(ShrAmt - ShlAmt);
1434 if ((BitMask1 & DemandedMask) == (BitMask2 & DemandedMask)) {
1435 if (ShrAmt == ShlAmt)
1442 if (ShrAmt < ShlAmt) {
1444 New = BinaryOperator::CreateShl(VarX, Amt);
1450 New = isLshr ? BinaryOperator::CreateLShr(VarX, Amt) :
1451 BinaryOperator::CreateAShr(VarX, Amt);
1453 New->setIsExact(
true);
1479 bool AllowMultipleUsers) {
1487 assert((DemandedElts & ~EltMask) == 0 &&
"Invalid DemandedElts!");
1491 PoisonElts = EltMask;
1495 if (DemandedElts.
isZero()) {
1496 PoisonElts = EltMask;
1511 for (
unsigned i = 0; i != VWidth; ++i) {
1512 if (!DemandedElts[i]) {
1518 Constant *Elt =
C->getAggregateElement(i);
1519 if (!Elt)
return nullptr;
1528 return NewCV !=
C ? NewCV :
nullptr;
1535 if (!AllowMultipleUsers) {
1539 if (!V->hasOneUse()) {
1548 DemandedElts = EltMask;
1553 if (!
I)
return nullptr;
1555 bool MadeChange =
false;
1556 auto simplifyAndSetOp = [&](
Instruction *Inst,
unsigned OpNum,
1566 APInt PoisonElts2(VWidth, 0);
1567 APInt PoisonElts3(VWidth, 0);
1568 switch (
I->getOpcode()) {
1571 case Instruction::GetElementPtr: {
1589 for (
unsigned i = 0; i <
I->getNumOperands(); i++) {
1593 PoisonElts = EltMask;
1596 if (
I->getOperand(i)->getType()->isVectorTy()) {
1597 APInt PoisonEltsOp(VWidth, 0);
1598 simplifyAndSetOp(
I, i, DemandedElts, PoisonEltsOp);
1603 PoisonElts |= PoisonEltsOp;
1609 case Instruction::InsertElement: {
1616 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts2);
1623 APInt PreInsertDemandedElts = DemandedElts;
1625 PreInsertDemandedElts.
clearBit(IdxNo);
1633 if (PreInsertDemandedElts == 0 &&
1640 simplifyAndSetOp(
I, 0, PreInsertDemandedElts, PoisonElts);
1644 if (IdxNo >= VWidth || !DemandedElts[IdxNo]) {
1646 return I->getOperand(0);
1653 case Instruction::ShuffleVector: {
1655 assert(Shuffle->getOperand(0)->getType() ==
1656 Shuffle->getOperand(1)->getType() &&
1657 "Expected shuffle operands to have same type");
1668 APInt LeftDemanded(OpWidth, 1);
1669 APInt LHSPoisonElts(OpWidth, 0);
1670 simplifyAndSetOp(
I, 0, LeftDemanded, LHSPoisonElts);
1671 if (LHSPoisonElts[0])
1672 PoisonElts = EltMask;
1678 APInt LeftDemanded(OpWidth, 0), RightDemanded(OpWidth, 0);
1679 for (
unsigned i = 0; i < VWidth; i++) {
1680 if (DemandedElts[i]) {
1681 unsigned MaskVal = Shuffle->getMaskValue(i);
1682 if (MaskVal != -1u) {
1683 assert(MaskVal < OpWidth * 2 &&
1684 "shufflevector mask index out of range!");
1685 if (MaskVal < OpWidth)
1686 LeftDemanded.setBit(MaskVal);
1688 RightDemanded.
setBit(MaskVal - OpWidth);
1693 APInt LHSPoisonElts(OpWidth, 0);
1694 simplifyAndSetOp(
I, 0, LeftDemanded, LHSPoisonElts);
1696 APInt RHSPoisonElts(OpWidth, 0);
1697 simplifyAndSetOp(
I, 1, RightDemanded, RHSPoisonElts);
1710 if (VWidth == OpWidth) {
1711 bool IsIdentityShuffle =
true;
1712 for (
unsigned i = 0; i < VWidth; i++) {
1713 unsigned MaskVal = Shuffle->getMaskValue(i);
1714 if (DemandedElts[i] && i != MaskVal) {
1715 IsIdentityShuffle =
false;
1719 if (IsIdentityShuffle)
1720 return Shuffle->getOperand(0);
1723 bool NewPoisonElts =
false;
1724 unsigned LHSIdx = -1u, LHSValIdx = -1u;
1725 unsigned RHSIdx = -1u, RHSValIdx = -1u;
1726 bool LHSUniform =
true;
1727 bool RHSUniform =
true;
1728 for (
unsigned i = 0; i < VWidth; i++) {
1729 unsigned MaskVal = Shuffle->getMaskValue(i);
1730 if (MaskVal == -1u) {
1732 }
else if (!DemandedElts[i]) {
1733 NewPoisonElts =
true;
1735 }
else if (MaskVal < OpWidth) {
1736 if (LHSPoisonElts[MaskVal]) {
1737 NewPoisonElts =
true;
1740 LHSIdx = LHSIdx == -1u ? i : OpWidth;
1741 LHSValIdx = LHSValIdx == -1u ? MaskVal : OpWidth;
1742 LHSUniform = LHSUniform && (MaskVal == i);
1745 if (RHSPoisonElts[MaskVal - OpWidth]) {
1746 NewPoisonElts =
true;
1749 RHSIdx = RHSIdx == -1u ? i : OpWidth;
1750 RHSValIdx = RHSValIdx == -1u ? MaskVal - OpWidth : OpWidth;
1751 RHSUniform = RHSUniform && (MaskVal - OpWidth == i);
1767 if (LHSIdx < OpWidth && RHSUniform) {
1769 Op = Shuffle->getOperand(1);
1770 Value = CV->getOperand(LHSValIdx);
1774 if (RHSIdx < OpWidth && LHSUniform) {
1776 Op = Shuffle->getOperand(0);
1777 Value = CV->getOperand(RHSValIdx);
1790 if (NewPoisonElts) {
1793 for (
unsigned i = 0; i < VWidth; ++i) {
1797 Elts.
push_back(Shuffle->getMaskValue(i));
1799 Shuffle->setShuffleMask(Elts);
1804 case Instruction::Select: {
1814 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1818 APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts);
1820 for (
unsigned i = 0; i < VWidth; i++) {
1825 DemandedLHS.clearBit(i);
1831 simplifyAndSetOp(
I, 1, DemandedLHS, PoisonElts2);
1832 simplifyAndSetOp(
I, 2, DemandedRHS, PoisonElts3);
1836 PoisonElts = PoisonElts2 & PoisonElts3;
1839 case Instruction::BitCast: {
1844 APInt InputDemandedElts(InVWidth, 0);
1845 PoisonElts2 =
APInt(InVWidth, 0);
1848 if (VWidth == InVWidth) {
1852 InputDemandedElts = DemandedElts;
1853 }
else if ((VWidth % InVWidth) == 0) {
1857 Ratio = VWidth / InVWidth;
1858 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
1859 if (DemandedElts[OutIdx])
1860 InputDemandedElts.
setBit(OutIdx / Ratio);
1861 }
else if ((InVWidth % VWidth) == 0) {
1865 Ratio = InVWidth / VWidth;
1866 for (
unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
1867 if (DemandedElts[InIdx / Ratio])
1868 InputDemandedElts.
setBit(InIdx);
1874 simplifyAndSetOp(
I, 0, InputDemandedElts, PoisonElts2);
1876 if (VWidth == InVWidth) {
1877 PoisonElts = PoisonElts2;
1878 }
else if ((VWidth % InVWidth) == 0) {
1882 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
1883 if (PoisonElts2[OutIdx / Ratio])
1884 PoisonElts.
setBit(OutIdx);
1885 }
else if ((InVWidth % VWidth) == 0) {
1889 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) {
1892 PoisonElts.
setBit(OutIdx);
1899 case Instruction::FPTrunc:
1900 case Instruction::FPExt:
1901 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1904 case Instruction::Call: {
1907 switch (
II->getIntrinsicID()) {
1908 case Intrinsic::masked_gather:
1909 case Intrinsic::masked_load: {
1914 DemandedPassThrough(DemandedElts);
1916 for (
unsigned i = 0; i < VWidth; i++) {
1918 if (CElt->isNullValue())
1919 DemandedPtrs.clearBit(i);
1920 else if (CElt->isAllOnesValue())
1926 if (
II->getIntrinsicID() == Intrinsic::masked_gather)
1927 simplifyAndSetOp(
II, 0, DemandedPtrs, PoisonElts2);
1928 simplifyAndSetOp(
II, 2, DemandedPassThrough, PoisonElts3);
1932 PoisonElts = PoisonElts2 & PoisonElts3;
1938 *
II, DemandedElts, PoisonElts, PoisonElts2, PoisonElts3,
1972 if (DemandedElts == 1 && !
X->hasOneUse() && !
Y->hasOneUse() &&
1975 auto findShufBO = [&](
bool MatchShufAsOp0) ->
User * {
1980 Value *OtherOp = MatchShufAsOp0 ?
Y :
X;
1985 Value *ShufOp = MatchShufAsOp0 ?
X :
Y;
1996 if (
DT.dominates(U,
I))
2002 if (
User *ShufBO = findShufBO(
true))
2004 if (
User *ShufBO = findShufBO(
false))
2008 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
2009 simplifyAndSetOp(
I, 1, DemandedElts, PoisonElts2);
2013 PoisonElts &= PoisonElts2;
2021 return MadeChange ?
I :
nullptr;
2027 bool IsCanonicalizing =
false) {
2035 if (Ty->isAggregateType())
2039 if (Mask ==
fcNan && IsCanonicalizing)
2068 if (KnownSrc.
SignBit ==
false ||
2112 return DemandedMask;
2130 if (InferredFMF != FMF) {
2172 if ((DemandedMask & ~NegOrZero) ==
fcNone &&
2176 if ((DemandedMask & ~PosOrZero) ==
fcNone &&
2195 bool OrderedZeroSign = !NSZ;
2199 case Intrinsic::maximum: {
2216 case Intrinsic::minimum: {
2233 case Intrinsic::maxnum:
2234 case Intrinsic::maximumnum: {
2250 case Intrinsic::minnum:
2251 case Intrinsic::minimumnum: {
2287 if (DemandedMask &
fcNan)
2288 SrcDemandedMask |=
fcNan;
2327 Type *VTy =
I->getType();
2331 FMF = FPOp->getFastMathFlags();
2335 switch (
I->getOpcode()) {
2336 case Instruction::FNeg: {
2339 Value *FNegSrc =
I->getOperand(0);
2354 Known, FNegFAbsSrc, ThisDemandedMask, KnownSrc, IsNSZ))
2363 if (KnownSrc.
SignBit ==
false)
2381 case Instruction::FAdd:
2382 case Instruction::FSub: {
2386 if (
I->getOperand(0) ==
I->getOperand(1) &&
2387 I->getOpcode() == Instruction::FAdd &&
2394 if (DemandedMask &
fcNan)
2395 SrcDemandedMask |=
fcNan;
2408 if (Mode.inputsMayBePositiveZero() || Mode.outputsMayBePositiveZero())
2427 KnownRHS = KnownLHS;
2432 if (DemandedMask &
fcNan)
2435 if (DemandedMask &
fcInf)
2436 SrcDemandedMask |=
fcInf;
2447 Known =
I->getOpcode() == Instruction::FAdd
2459 bool ResultNotNan = (DemandedMask &
fcNan) ==
fcNone;
2462 if (ResultNotNan &&
I->getOpcode() == Instruction::FAdd &&
2464 return I->getOperand(1);
2470 return I->getOperand(0);
2474 if (InferredFMF != FMF) {
2475 I->setFastMathFlags(InferredFMF);
2481 case Instruction::FMul: {
2490 if (DemandedMask &
fcInf) {
2496 if (DemandedMask &
fcNan) {
2510 if (DemandedMask &
fcZero)
2557 bool NonNanResult = (DemandedMask &
fcNan) ==
fcNone;
2648 if (InferredFMF != FMF) {
2649 I->setFastMathFlags(InferredFMF);
2655 case Instruction::FDiv: {
2671 Value *IsInfOrZeroOrNan =
Builder.CreateOr(IsInfOrNan, IsZeroOrNan);
2673 return Builder.CreateSelectFMFWithUnknownProfile(
2694 if (DemandedMask &
fcNan) {
2705 if (DemandedMask &
fcZero)
2712 if (DemandedMask &
fcZero) {
2714 "should not have to worry about daz here");
2715 LHSDemandedMask |=
fcZero;
2716 RHSDemandedMask |=
fcInf;
2723 if (DemandedMask &
fcInf) {
2750 bool ResultNotNan = (DemandedMask &
fcNan) ==
fcNone;
2751 bool ResultNotInf = (DemandedMask &
fcInf) ==
fcNone;
2753 if (!ResultNotInf &&
2782 if (InferredFMF != FMF) {
2783 I->setFastMathFlags(InferredFMF);
2789 case Instruction::FPTrunc:
2792 case Instruction::FPExt: {
2794 if (DemandedMask &
fcNan)
2795 SrcDemandedMask |=
fcNan;
2809 I->getOperand(0)->getType()->getScalarType()->getFltSemantics();
2817 case Instruction::Call: {
2821 case Intrinsic::fabs: {
2833 case Intrinsic::arithmetic_fence:
2837 case Intrinsic::copysign: {
2845 if ((DemandedMask &
fcNegative) == DemandedMask) {
2847 CI->
setOperand(1, ConstantFP::get(VTy, -1.0));
2851 if ((DemandedMask &
fcPositive) == DemandedMask) {
2873 if (KnownSign.
SignBit ==
false) {
2879 if (KnownSign.
SignBit ==
true) {
2881 CI->
setOperand(1, ConstantFP::get(VTy, -1.0));
2889 case Intrinsic::fma:
2890 case Intrinsic::fmuladd: {
2894 if (DemandedMask &
fcNan)
2895 SrcDemandedMask |=
fcNan;
2909 KnownSrc[1] = KnownSrc[0];
2926 case Intrinsic::maximum:
2927 case Intrinsic::minimum:
2928 case Intrinsic::maximumnum:
2929 case Intrinsic::minimumnum:
2930 case Intrinsic::maxnum:
2931 case Intrinsic::minnum: {
2932 const bool PropagateNaN =
2933 IID == Intrinsic::maximum || IID == Intrinsic::minimum;
2939 PropagateNaN && ((DemandedMask &
fcNan) ==
fcNone)
2940 ? DemandedMask | ~
fcNan
2971 bool ResultNotLogical0 = (ValidResults & ZeroMask) ==
fcNone;
2980 ((PropagateNaN && (ValidResults &
fcNan) ==
fcNone) ||
2986 if (InferredFMF != FMF) {
2993 case Intrinsic::exp:
2994 case Intrinsic::exp2:
2995 case Intrinsic::exp10: {
3009 if (DemandedMask &
fcNan)
3010 SrcDemandedMask |=
fcNan;
3012 if (DemandedMask &
fcZero) {
3052 return ConstantFP::get(VTy, 1.0);
3067 ConstantFP::get(VTy, 1.0), FMF);
3082 Value *ZeroOrInf =
Builder.CreateSelectFMFWithUnknownProfile(
3093 case Intrinsic::log:
3094 case Intrinsic::log2:
3095 case Intrinsic::log10: {
3097 if (DemandedMask &
fcNan)
3098 DemandedSrcMask |=
fcNan;
3104 if (DemandedMask &
fcNan)
3109 DemandedSrcMask |=
fcZero;
3112 if (Mode.inputsMayBeZero())
3120 if (DemandedMask &
fcZero)
3134 case Intrinsic::sqrt: {
3138 if (DemandedMask &
fcNan)
3184 case Intrinsic::ldexp: {
3186 if (DemandedMask &
fcNan)
3187 SrcDemandedMask |=
fcNan;
3222 case Intrinsic::trunc:
3223 case Intrinsic::floor:
3224 case Intrinsic::ceil:
3225 case Intrinsic::rint:
3226 case Intrinsic::nearbyint:
3227 case Intrinsic::round:
3228 case Intrinsic::roundeven: {
3230 if (DemandedMask &
fcNan)
3231 DemandedSrcMask |=
fcNan;
3249 bool IsRoundNearestOrTrunc =
3250 IID == Intrinsic::round || IID == Intrinsic::roundeven ||
3251 IID == Intrinsic::nearbyint || IID == Intrinsic::rint ||
3252 IID == Intrinsic::trunc;
3255 if ((IID == Intrinsic::floor || IsRoundNearestOrTrunc) &&
3259 if ((IID == Intrinsic::ceil || IsRoundNearestOrTrunc) &&
3264 return ConstantFP::get(VTy, -1.0);
3267 return ConstantFP::get(VTy, 1.0);
3270 KnownSrc, IID == Intrinsic::trunc,
3279 if ((IID == Intrinsic::trunc || IsRoundNearestOrTrunc) &&
3292 if (InferredFMF != FMF) {
3300 case Intrinsic::fptrunc_round:
3303 case Intrinsic::canonicalize: {
3316 SrcDemandedMask |=
fcSNan;
3361 if (InferredFMF != FMF) {
3380 case Instruction::Select: {
3387 return I->getOperand(2);
3389 return I->getOperand(1);
3399 case Instruction::ExtractElement: {
3406 case Instruction::InsertElement: {
3414 Known = KnownVec | KnownInserted;
3418 case Instruction::ShuffleVector: {
3426 Known = KnownLHS | KnownRHS;
3430 case Instruction::InsertValue: {
3436 Known = KnownAgg | KnownElt;
3439 case Instruction::ExtractValue: {
3445 case Intrinsic::frexp: {
3447 if (DemandedMask &
fcNan)
3448 SrcDemandedMask |=
fcNan;
3475 return II->getArgOperand(0);
3491 case Instruction::PHI: {
3493 if (
Depth >= PhiRecursionLimit)
3501 for (
unsigned I = 0, E =
P->getNumIncomingValues();
I != E; ++
I) {
3511 P,
P->getOperandNumForIncomingValue(
I), DemandedMask, KnownSrc,
3514 P->setIncomingValueForBlock(PredBB,
P->getIncomingValue(
I));
3549 FMF = FPOp->getFastMathFlags();
3553 switch (
I->getOpcode()) {
3554 case Instruction::Select: {
3560 return I->getOperand(1);
3565 return I->getOperand(2);
3575 case Instruction::FNeg: {
3579 Value *FNegSrc =
I->getOperand(0);
3594 Known, Src, ThisDemandedMask, KnownSrc,
false))
3598 case Instruction::Call: {
3602 case Intrinsic::fabs: {
3615 case Intrinsic::copysign: {
3627 Mag, DemandedMask, KnownMag,
false))
3645 case Intrinsic::maxnum:
3646 case Intrinsic::minnum:
3647 case Intrinsic::maximum:
3648 case Intrinsic::minimum:
3649 case Intrinsic::maximumnum:
3650 case Intrinsic::minimumnum: {
3661 KnownLHS, KnownRHS,
F,
3684 Use &U =
I->getOperandUse(OpNo);
3686 Type *VTy = V->getType();
3688 if (DemandedMask ==
fcNone) {
3716 if (!FoldedToConst || FoldedToConst == V)
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
AMDGPU Register Bank Select
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file provides internal interfaces used to implement the InstCombine.
static cl::opt< unsigned > SimplifyDemandedVectorEltsDepthLimit("instcombine-simplify-vector-elts-depth", cl::desc("Depth limit when simplifying vector instructions and their operands"), cl::Hidden, cl::init(10))
static Constant * getFPClassConstant(Type *Ty, FPClassTest Mask, bool IsCanonicalizing=false)
For floating-point classes that resolve to a single bit pattern, return that value.
static cl::opt< bool > VerifyKnownBits("instcombine-verify-known-bits", cl::desc("Verify that computeKnownBits() and " "SimplifyDemandedBits() are consistent"), cl::Hidden, cl::init(false))
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
static Value * simplifyDemandedFPClassFabs(KnownFPClass &Known, Value *Src, FPClassTest DemandedMask, KnownFPClass KnownSrc, bool NSZ)
Perform multiple-use aware simplfications for fabs(Src).
static Value * simplifyDemandedUseFPClassFPTrunc(InstCombinerImpl &IC, Instruction &I, FastMathFlags FMF, FPClassTest DemandedMask, KnownFPClass &Known, const SimplifyQuery &SQ, unsigned Depth)
static Value * simplifyDemandedFPClassFnegFabs(KnownFPClass &Known, Value *Src, FPClassTest DemandedMask, KnownFPClass KnownSrc, bool NSZ)
Perform multiple-use aware simplfications for fneg(fabs(Src)).
static bool ShrinkDemandedConstant(Instruction *I, unsigned OpNo, const APInt &Demanded)
Check to see if the specified operand of the specified instruction is a constant integer.
static Value * simplifyShiftSelectingPackedElement(Instruction *I, const APInt &DemandedMask, InstCombinerImpl &IC, unsigned Depth)
Let N = 2 * M.
static Value * simplifyDemandedFPClassMinMax(KnownFPClass &Known, Intrinsic::ID IID, const CallInst *CI, FPClassTest DemandedMask, KnownFPClass KnownLHS, KnownFPClass KnownRHS, const Function &F, bool NSZ)
static Value * simplifyDemandedFPClassCopysignMag(Value *MagSrc, FPClassTest DemandedMask, KnownFPClass KnownSrc, bool NSZ)
static FPClassTest adjustDemandedMaskFromFlags(FPClassTest DemandedMask, FastMathFlags FMF)
static FastMathFlags inferFastMathValueFlags(FastMathFlags FMF, FPClassTest ValidResults, ArrayRef< KnownFPClass > Known)
Try to set an inferred no-nans or no-infs in FMF.
static Value * simplifyDemandedFPClassResult(Instruction *FPOp, FastMathFlags FMF, FPClassTest DemandedMask, KnownFPClass &Known, ArrayRef< KnownFPClass > KnownSrcs)
Apply epilog fixups to a floating-point intrinsic.
This file provides the interface for the instcombine pass implementation.
MachineInstr unsigned OpIdx
uint64_t IntrinsicInst * II
This file contains the declarations for profiling metadata utility functions.
static cl::opt< RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode > Mode("regalloc-enable-advisor", cl::Hidden, cl::init(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Default), cl::desc("Enable regalloc advisor mode"), cl::values(clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Default, "default", "Default"), clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Release, "release", "precompiled"), clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Development, "development", "for training")))
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
static APFloat getOne(const fltSemantics &Sem, bool Negative=false)
Factory for Positive and Negative One.
Class for arbitrary precision integers.
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
void clearBit(unsigned BitPosition)
Set a given bit to 0.
static APInt getSignMask(unsigned BitWidth)
Get the SignMask for a specific bit width.
uint64_t getZExtValue() const
Get zero extended value.
void setHighBits(unsigned hiBits)
Set the top hiBits bits.
unsigned popcount() const
Count the number of bits set.
LLVM_ABI APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
unsigned getActiveBits() const
Compute the number of active bits in the value.
LLVM_ABI APInt trunc(unsigned width) const
Truncate to new width.
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
bool isAllOnes() const
Determine if all bits are set. This is true for zero-width values.
bool isZero() const
Determine if this value is zero, i.e. all bits are clear.
LLVM_ABI APInt urem(const APInt &RHS) const
Unsigned remainder operation.
void setSignBit()
Set the sign bit to 1.
unsigned getBitWidth() const
Return the number of bits in the APInt.
bool ult(const APInt &RHS) const
Unsigned less than comparison.
void clearAllBits()
Set every bit to 0.
unsigned countr_zero() const
Count the number of trailing zero bits.
unsigned countl_zero() const
The APInt version of std::countl_zero.
void clearLowBits(unsigned loBits)
Set bottom loBits bits to 0.
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
APInt ashr(unsigned ShiftAmt) const
Arithmetic right-shift function.
APInt shl(unsigned shiftAmt) const
Left-shift function.
bool isSubsetOf(const APInt &RHS) const
This operation checks that all bits set in this APInt are also set in RHS.
bool isPowerOf2() const
Check if this APInt's value is a power of two greater than zero.
static APInt getLowBitsSet(unsigned numBits, unsigned loBitsSet)
Constructs an APInt value that has the bottom loBitsSet bits set.
static APInt getHighBitsSet(unsigned numBits, unsigned hiBitsSet)
Constructs an APInt value that has the top hiBitsSet bits set.
void setLowBits(unsigned loBits)
Set the bottom loBits bits.
bool isIntN(unsigned N) const
Check if this APInt has an N-bits unsigned integer value.
bool isOne() const
Determine if this is a value of 1.
APInt lshr(unsigned shiftAmt) const
Logical right-shift function.
bool uge(const APInt &RHS) const
Unsigned greater or equal comparison.
Represent a constant reference to an array (0 or more elements consecutively in memory),...
LLVM Basic Block Representation.
const Instruction * getTerminator() const LLVM_READONLY
Returns the terminator instruction; assumes that the block is well-formed.
BinaryOps getOpcode() const
Value * getArgOperand(unsigned i) const
LLVM_ABI Intrinsic::ID getIntrinsicID() const
Returns the intrinsic ID of the intrinsic called or Intrinsic::not_intrinsic if the called function i...
This class represents a function call, abstracting a target machine's calling convention.
static CallInst * Create(FunctionType *Ty, Value *F, const Twine &NameStr="", InsertPosition InsertBefore=nullptr)
This is the base class for all instructions that perform data casts.
@ FCMP_UEQ
1 0 0 1 True if unordered or equal
static LLVM_ABI Constant * getInfinity(Type *Ty, bool Negative=false)
static LLVM_ABI Constant * getZero(Type *Ty, bool Negative=false)
static LLVM_ABI Constant * getQNaN(Type *Ty, bool Negative=false, APInt *Payload=nullptr)
This is the shared class of boolean and integer constants.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
const APInt & getValue() const
Return the constant as an APInt value reference.
static LLVM_ABI Constant * get(ArrayRef< Constant * > V)
This is an important base class in LLVM.
static LLVM_ABI Constant * getIntegerValue(Type *Ty, const APInt &V)
Return the value for an integer or pointer constant, or a vector thereof, with the given scalar value...
static LLVM_ABI Constant * getAllOnesValue(Type *Ty)
LLVM_ABI bool isOneValue() const
Returns true if the value is one.
static LLVM_ABI Constant * getNullValue(Type *Ty)
Constructor to create a '0' constant of arbitrary type.
LLVM_ABI Constant * getAggregateElement(unsigned Elt) const
For aggregates (struct/array/vector) return the constant that corresponds to the specified element if...
LLVM_ABI bool isNullValue() const
Return true if this is the value that would be returned by getNullValue.
A parsed version of the target data layout string in and methods for querying it.
Convenience struct for specifying and reasoning about fast-math flags.
bool noSignedZeros() const
void setNoSignedZeros(bool B=true)
void setNoNaNs(bool B=true)
void setNoInfs(bool B=true)
an instruction for type-safe pointer arithmetic to access elements of arrays and structs
Value * CreateICmpEQ(Value *LHS, Value *RHS, const Twine &Name="")
LLVM_ABI Value * CreateSelectWithUnknownProfile(Value *C, Value *True, Value *False, StringRef PassName, const Twine &Name="")
void SetInsertPoint(BasicBlock *TheBB)
This specifies that created instructions should be appended to the end of the specified block.
static InsertElementInst * Create(Value *Vec, Value *NewElt, Value *Idx, const Twine &NameStr="", InsertPosition InsertBefore=nullptr)
bool SimplifyDemandedInstructionFPClass(Instruction &Inst)
Value * SimplifyDemandedVectorElts(Value *V, APInt DemandedElts, APInt &PoisonElts, unsigned Depth=0, bool AllowMultipleUsers=false) override
The specified value produces a vector with any number of elements.
Value * SimplifyDemandedUseFPClass(Instruction *I, FPClassTest DemandedMask, KnownFPClass &Known, const SimplifyQuery &Q, unsigned Depth=0)
Attempts to replace V with a simpler value based on the demanded floating-point classes.
bool SimplifyDemandedBits(Instruction *I, unsigned Op, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0) override
This form of SimplifyDemandedBits simplifies the specified instruction operand if possible,...
std::optional< std::pair< Intrinsic::ID, SmallVector< Value *, 3 > > > convertOrOfShiftsToFunnelShift(Instruction &Or)
Value * SimplifyMultipleUseDemandedFPClass(Instruction *I, FPClassTest DemandedMask, KnownFPClass &Known, const SimplifyQuery &Q, unsigned Depth)
Helper routine of SimplifyDemandedUseFPClass.
Value * simplifyShrShlDemandedBits(Instruction *Shr, const APInt &ShrOp1, Instruction *Shl, const APInt &ShlOp1, const APInt &DemandedMask, KnownBits &Known)
Helper routine of SimplifyDemandedUseBits.
bool SimplifyDemandedFPClass(Instruction *I, unsigned Op, FPClassTest DemandedMask, KnownFPClass &Known, const SimplifyQuery &Q, unsigned Depth=0)
Value * SimplifyDemandedUseBits(Instruction *I, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Attempts to replace I with a simpler value based on the demanded bits.
bool SimplifyDemandedInstructionBits(Instruction &Inst)
Tries to simplify operands to an integer instruction based on its demanded bits.
Value * SimplifyMultipleUseDemandedBits(Instruction *I, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Helper routine of SimplifyDemandedUseBits.
unsigned ComputeNumSignBits(const Value *Op, const Instruction *CxtI=nullptr, unsigned Depth=0) const
Instruction * replaceInstUsesWith(Instruction &I, Value *V)
A combiner-aware RAUW-like routine.
void replaceUse(Use &U, Value *NewValue)
Replace use and add the previously used value to the worklist.
InstructionWorklist & Worklist
A worklist of the instructions that need to be simplified.
Instruction * InsertNewInstWith(Instruction *New, BasicBlock::iterator Old)
Same as InsertNewInstBefore, but also sets the debug loc.
void computeKnownBits(const Value *V, KnownBits &Known, const Instruction *CxtI, unsigned Depth=0) const
std::optional< Value * > targetSimplifyDemandedVectorEltsIntrinsic(IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp)
Instruction * replaceOperand(Instruction &I, unsigned OpNum, Value *V)
Replace operand of instruction and add old operand to the worklist.
std::optional< Value * > targetSimplifyDemandedUseBitsIntrinsic(IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed)
LLVM_ABI void dropUBImplyingAttrsAndMetadata(ArrayRef< unsigned > Keep={})
Drop any attributes or metadata that can cause immediate undefined behavior.
LLVM_ABI bool hasNoUnsignedWrap() const LLVM_READONLY
Determine whether the no unsigned wrap flag is set.
LLVM_ABI bool hasNoSignedWrap() const LLVM_READONLY
Determine whether the no signed wrap flag is set.
LLVM_ABI bool isCommutative() const LLVM_READONLY
Return true if the instruction is commutative:
LLVM_ABI void setFastMathFlags(FastMathFlags FMF)
Convenience function for setting multiple fast-math flags on this instruction, which must be an opera...
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
LLVM_ABI void setIsExact(bool b=true)
Set or clear the exact flag on this instruction, which must be an operator which supports this flag.
A wrapper class for inspecting calls to intrinsic functions.
bool hasNoSignedWrap() const
Test whether this operation is known to never undergo signed overflow, aka the nsw property.
bool hasNoUnsignedWrap() const
Test whether this operation is known to never undergo unsigned overflow, aka the nuw property.
static LLVM_ABI PoisonValue * get(Type *T)
Static factory methods - Return an 'poison' object of the specified type.
This class represents the LLVM 'select' instruction.
const Value * getCondition() const
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
The instances of the Type class are immutable: once they are created, they are never changed.
static LLVM_ABI IntegerType * getInt64Ty(LLVMContext &C)
bool isVectorTy() const
True if this is an instance of VectorType.
bool isIntOrIntVectorTy() const
Return true if this is an integer type or a vector of integer types.
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
bool isMultiUnitFPType() const
Returns true if this is a floating-point type that is an unevaluated sum of multiple floating-point u...
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
bool isIEEELikeFPTy() const
Return true if this is a well-behaved IEEE-like type, which has a IEEE compatible layout,...
LLVM_ABI const fltSemantics & getFltSemantics() const
static LLVM_ABI UndefValue * get(Type *T)
Static factory methods - Return an 'undef' object of the specified type.
A Use represents the edge between a Value definition and its users.
void setOperand(unsigned i, Value *Val)
Value * getOperand(unsigned i) const
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
bool hasOneUse() const
Return true if there is exactly one use of this value.
iterator_range< user_iterator > users()
bool hasUseList() const
Check if this Value has a use-list.
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
LLVM_ABI void takeName(Value *V)
Transfer the name from V to this value.
Base class of all SIMD vector types.
This class represents zero extension of integer types.
self_iterator getIterator()
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ C
The default llvm calling convention, compatible with C.
LLVM_ABI Function * getOrInsertDeclaration(Module *M, ID id, ArrayRef< Type * > OverloadTys={})
Look up the Function declaration of the intrinsic id in the Module M.
BinaryOp_match< SrcTy, SpecificConstantMatch, TargetOpcode::G_XOR, true > m_Not(const SrcTy &&Src)
Matches a register not-ed by a G_XOR.
OneUse_match< SubPat > m_OneUse(const SubPat &SP)
cst_pred_ty< is_lowbit_mask > m_LowBitMask()
Match an integer or vector with only the low bit(s) set.
PtrAdd_match< PointerOpTy, OffsetOpTy > m_PtrAdd(const PointerOpTy &PointerOp, const OffsetOpTy &OffsetOp)
Matches GEP with i8 source element type.
BinaryOp_match< LHS, RHS, Instruction::Add > m_Add(const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::AShr > m_AShr(const LHS &L, const RHS &R)
auto m_Poison()
Match an arbitrary poison constant.
ap_match< APInt > m_APInt(const APInt *&Res)
Match a ConstantInt or splatted ConstantVector, binding the specified pointer to the contained APInt.
specific_intval< false > m_SpecificInt(const APInt &V)
Match a specific integer value or vector with all elements equal to the value.
bool match(Val *V, const Pattern &P)
specificval_ty m_Specific(const Value *V)
Match if we have a specific specified value.
BinOpPred_match< LHS, RHS, is_right_shift_op > m_Shr(const LHS &L, const RHS &R)
Matches logical shift operations.
TwoOps_match< Val_t, Idx_t, Instruction::ExtractElement > m_ExtractElt(const Val_t &Val, const Idx_t &Idx)
Matches ExtractElementInst.
IntrinsicID_match m_Intrinsic()
Match intrinsic calls like this: m_Intrinsic<Intrinsic::fabs>(m_Value(X))
auto m_BinOp()
Match an arbitrary binary operation and ignore it.
ExtractValue_match< Ind, Val_t > m_ExtractValue(const Val_t &V)
Match a single index ExtractValue instruction.
auto m_Value()
Match an arbitrary value and ignore it.
BinaryOp_match< LHS, RHS, Instruction::Mul > m_Mul(const LHS &L, const RHS &R)
TwoOps_match< V1_t, V2_t, Instruction::ShuffleVector > m_Shuffle(const V1_t &v1, const V2_t &v2)
Matches ShuffleVectorInst independently of mask value.
CastInst_match< OpTy, ZExtInst > m_ZExt(const OpTy &Op)
Matches ZExt.
match_immconstant_ty m_ImmConstant()
Match an arbitrary immediate Constant and ignore it.
DisjointOr_match< LHS, RHS, true > m_c_DisjointOr(const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::Add, true > m_c_Add(const LHS &L, const RHS &R)
Matches a Add with LHS and RHS in either order.
m_Intrinsic_Ty< Opnd0 >::Ty m_Ctpop(const Opnd0 &Op0)
AnyBinaryOp_match< LHS, RHS, true > m_c_BinOp(const LHS &L, const RHS &R)
Matches a BinaryOperator with LHS and RHS in either order.
BinaryOp_match< LHS, RHS, Instruction::LShr > m_LShr(const LHS &L, const RHS &R)
CmpClass_match< LHS, RHS, ICmpInst > m_ICmp(CmpPredicate &Pred, const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::Shl > m_Shl(const LHS &L, const RHS &R)
auto m_Undef()
Match an arbitrary undef constant.
CastInst_match< OpTy, SExtInst > m_SExt(const OpTy &Op)
Matches SExt.
is_zero m_Zero()
Match any null constant or a vector with all elements equal to 0.
m_Intrinsic_Ty< Opnd0 >::Ty m_FAbs(const Opnd0 &Op0)
auto m_ConstantInt()
Match an arbitrary ConstantInt and ignore it.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
LLVM_ABI bool haveNoCommonBitsSet(const WithCache< const Value * > &LHSCache, const WithCache< const Value * > &RHSCache, const SimplifyQuery &SQ)
Return true if LHS and RHS have no common bits set.
LLVM_ABI KnownFPClass computeKnownFPClass(const Value *V, const APInt &DemandedElts, FPClassTest InterestedClasses, const SimplifyQuery &SQ, unsigned Depth=0)
Determine which floating-point classes are valid for V, and return them in KnownFPClass bit sets.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
LLVM_ABI void computeKnownBitsFromContext(const Value *V, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Merge bits known from context-dependent facts into Known.
@ Undef
Value of the register doesn't matter.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
int countr_one(T Value)
Count the number of ones from the least significant bit to the first zero bit.
LLVM_ABI void salvageDebugInfo(const MachineRegisterInfo &MRI, MachineInstr &MI)
Assuming the instruction MI is going to be deleted, attempt to salvage debug users of MI by writing t...
constexpr T alignDown(U Value, V Align, W Skew=0)
Returns the largest unsigned integer less than or equal to Value and is Skew mod Align.
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
gep_type_iterator gep_type_end(const User *GEP)
constexpr auto equal_to(T &&Arg)
Functor variant of std::equal_to that can be used as a UnaryPredicate in functional algorithms like a...
LLVM_ABI bool isGuaranteedNotToBeUndef(const Value *V, AssumptionCache *AC=nullptr, const Instruction *CtxI=nullptr, const DominatorTree *DT=nullptr, unsigned Depth=0)
Returns true if V cannot be undef, but may be poison.
LLVM_ABI bool cannotOrderStrictlyLess(FPClassTest LHS, FPClassTest RHS, bool OrderedZeroSign=false)
Returns true if all values in LHS must be greater than or equal to those in RHS.
LLVM_ABI bool cannotOrderStrictlyGreater(FPClassTest LHS, FPClassTest RHS, bool OrderedZeroSign=false)
Returns true if all values in LHS must be less than or equal to those in RHS.
constexpr unsigned MaxAnalysisRecursionDepth
LLVM_ABI void adjustKnownBitsForSelectArm(KnownBits &Known, Value *Cond, Value *Arm, bool Invert, const SimplifyQuery &Q, unsigned Depth=0)
Adjust Known for the given select Arm to include information from the select Cond.
LLVM_ABI FPClassTest fneg(FPClassTest Mask)
Return the test mask which returns true if the value's sign bit is flipped.
FPClassTest
Floating-point class tests, supported by 'is_fpclass' intrinsic.
LLVM_ABI void computeKnownBits(const Value *V, KnownBits &Known, const DataLayout &DL, AssumptionCache *AC=nullptr, const Instruction *CxtI=nullptr, const DominatorTree *DT=nullptr, bool UseInstrInfo=true, unsigned Depth=0)
Determine which bits of V are known to be either zero or one and return them in the KnownZero/KnownOn...
LLVM_ABI void adjustKnownFPClassForSelectArm(KnownFPClass &Known, Value *Cond, Value *Arm, bool Invert, const SimplifyQuery &Q, unsigned Depth=0)
Adjust Known for the given select Arm to include information from the select Cond.
LLVM_ABI FPClassTest inverse_fabs(FPClassTest Mask)
Return the test mask which returns true after fabs is applied to the value.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI Constant * ConstantFoldBinaryOpOperands(unsigned Opcode, Constant *LHS, Constant *RHS, const DataLayout &DL)
Attempt to constant fold a binary operation with the specified operands.
constexpr int PoisonMaskElem
LLVM_ABI raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
@ First
Helpers to iterate all locations in the MemoryEffectsBase class.
@ Mul
Product of integers.
@ Xor
Bitwise or logical XOR of integers.
LLVM_ABI FPClassTest unknown_sign(FPClassTest Mask)
Return the test mask which returns true if the value could have the same set of classes,...
DWARFExpression::Operation Op
constexpr unsigned BitWidth
LLVM_ABI KnownBits analyzeKnownBitsFromAndXorOr(const Operator *I, const KnownBits &KnownLHS, const KnownBits &KnownRHS, const SimplifyQuery &SQ, unsigned Depth=0)
Using KnownBits LHS/RHS produce the known bits for logic op (and/xor/or).
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
gep_type_iterator gep_type_begin(const User *GEP)
unsigned Log2(Align A)
Returns the log2 of the alignment.
This struct is a compact representation of a valid (non-zero power of two) alignment.
Represent subnormal handling kind for floating point instruction inputs and outputs.
static constexpr DenormalMode getPreserveSign()
static constexpr DenormalMode getIEEE()
static KnownBits makeConstant(const APInt &C)
Create known bits from a known constant.
KnownBits anyextOrTrunc(unsigned BitWidth) const
Return known bits for an "any" extension or truncation of the value we're tracking.
bool isNonNegative() const
Returns true if this value is known to be non-negative.
void makeNonNegative()
Make this value non-negative.
static LLVM_ABI KnownBits ashr(const KnownBits &LHS, const KnownBits &RHS, bool ShAmtNonZero=false, bool Exact=false)
Compute known bits for ashr(LHS, RHS).
unsigned getBitWidth() const
Get the bit width of this value.
void resetAll()
Resets the known state of all bits.
static KnownBits add(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false, bool SelfAdd=false)
Compute knownbits resulting from addition of LHS and RHS.
KnownBits unionWith(const KnownBits &RHS) const
Returns KnownBits information that is known to be true for either this or RHS or both.
KnownBits intersectWith(const KnownBits &RHS) const
Returns KnownBits information that is known to be true for both this and RHS.
KnownBits sext(unsigned BitWidth) const
Return known bits for a sign extension of the value we're tracking.
KnownBits zextOrTrunc(unsigned BitWidth) const
Return known bits for a zero extension or truncation of the value we're tracking.
APInt getMaxValue() const
Return the maximal unsigned value possible given these KnownBits.
static LLVM_ABI KnownBits srem(const KnownBits &LHS, const KnownBits &RHS)
Compute known bits for srem(LHS, RHS).
static LLVM_ABI KnownBits udiv(const KnownBits &LHS, const KnownBits &RHS, bool Exact=false)
Compute known bits for udiv(LHS, RHS).
bool isNegative() const
Returns true if this value is known to be negative.
static KnownBits sub(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false)
Compute knownbits resulting from subtraction of LHS and RHS.
static LLVM_ABI KnownBits shl(const KnownBits &LHS, const KnownBits &RHS, bool NUW=false, bool NSW=false, bool ShAmtNonZero=false)
Compute known bits for shl(LHS, RHS).
bool isKnownNeverInfOrNaN() const
Return true if it's known this can never be an infinity or nan.
FPClassTest KnownFPClasses
Floating-point classes the value could be one of.
bool isKnownNeverInfinity() const
Return true if it's known this can never be an infinity.
static constexpr FPClassTest OrderedGreaterThanZeroMask
static constexpr FPClassTest OrderedLessThanZeroMask
void knownNot(FPClassTest RuleOut)
static LLVM_ABI KnownFPClass fmul(const KnownFPClass &LHS, const KnownFPClass &RHS, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fmul.
static LLVM_ABI KnownFPClass fadd_self(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fadd x, x.
void copysign(const KnownFPClass &Sign)
static KnownFPClass square(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
static LLVM_ABI KnownFPClass fsub(const KnownFPClass &LHS, const KnownFPClass &RHS, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fsub.
bool isKnownNeverSubnormal() const
Return true if it's known this can never be a subnormal.
bool isKnownAlways(FPClassTest Mask) const
static LLVM_ABI KnownFPClass canonicalize(const KnownFPClass &Src, DenormalMode DenormMode=DenormalMode::getDynamic())
Apply the canonicalize intrinsic to this value.
LLVM_ABI bool isKnownNeverLogicalZero(DenormalMode Mode) const
Return true if it's known this can never be interpreted as a zero.
static LLVM_ABI KnownFPClass log(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
Propagate known class for log/log2/log10.
static LLVM_ABI KnownFPClass fdiv(const KnownFPClass &LHS, const KnownFPClass &RHS, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fdiv.
static LLVM_ABI KnownFPClass roundToIntegral(const KnownFPClass &Src, bool IsTrunc, bool IsMultiUnitFPType)
Propagate known class for rounding intrinsics (trunc, floor, ceil, rint, nearbyint,...
static LLVM_ABI KnownFPClass ldexp(const KnownFPClass &Src, const KnownBits &N, const fltSemantics &Flt, DenormalMode Mode=DenormalMode::getDynamic())
Propagate known class for ldexp.
static LLVM_ABI KnownFPClass minMaxLike(const KnownFPClass &LHS, const KnownFPClass &RHS, MinMaxKind Kind, DenormalMode DenormMode=DenormalMode::getDynamic())
KnownFPClass intersectWith(const KnownFPClass &RHS) const
static LLVM_ABI KnownFPClass exp(const KnownFPClass &Src)
Report known values for exp, exp2 and exp10.
static LLVM_ABI KnownFPClass frexp_mant(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
Propagate known class for mantissa component of frexp.
std::optional< bool > SignBit
std::nullopt if the sign bit is unknown, true if the sign bit is definitely set or false if the sign ...
bool isKnownNeverNaN() const
Return true if it's known this can never be a nan.
bool isKnownNever(FPClassTest Mask) const
Return true if it's known this can never be one of the mask entries.
static LLVM_ABI KnownFPClass fpext(const KnownFPClass &KnownSrc, const fltSemantics &DstTy, const fltSemantics &SrcTy)
Propagate known class for fpext.
static LLVM_ABI KnownFPClass fma(const KnownFPClass &LHS, const KnownFPClass &RHS, const KnownFPClass &Addend, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fma.
static LLVM_ABI KnownFPClass fptrunc(const KnownFPClass &KnownSrc)
Propagate known class for fptrunc.
static LLVM_ABI KnownFPClass sqrt(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
Propagate known class for sqrt.
LLVM_ABI bool isKnownNeverLogicalPosZero(DenormalMode Mode) const
Return true if it's known this can never be interpreted as a positive zero.
bool cannotBeOrderedGreaterEqZero(DenormalMode Mode) const
Return true if it's know this can never be a negative value or a logical 0.
static LLVM_ABI KnownFPClass fadd(const KnownFPClass &LHS, const KnownFPClass &RHS, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fadd.
LLVM_ABI bool isKnownNeverLogicalNegZero(DenormalMode Mode) const
Return true if it's known this can never be interpreted as a negative zero.
static LLVM_ABI KnownFPClass fma_square(const KnownFPClass &Squared, const KnownFPClass &Addend, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fma squared, squared, addend.
SimplifyQuery getWithInstruction(const Instruction *I) const