26#define DEBUG_TYPE "instcombine"
30 cl::desc(
"Verify that computeKnownBits() and "
31 "SimplifyDemandedBits() are consistent"),
35 "instcombine-simplify-vector-elts-depth",
37 "Depth limit when simplifying vector instructions and their operands"),
44 const APInt &Demanded) {
46 assert(OpNo < I->getNumOperands() &&
"Operand index too large");
55 if (
C->isSubsetOf(Demanded))
59 I->setOperand(OpNo, ConstantInt::get(
Op->getType(), *
C & Demanded));
71 const APInt &DemandedMask,
74 assert(
I->getOpcode() == Instruction::LShr &&
75 "Only lshr instruction supported");
79 if (!
match(
I->getOperand(0),
89 if (DemandedBitWidth > ShlAmt)
93 if (
Upper->getType()->getScalarSizeInBits() < ShlAmt + DemandedBitWidth)
100 Value *ShrAmt =
I->getOperand(1);
105 if (~KnownShrBits.
Zero != ShlAmt)
124 if (
unsigned BitWidth = Ty->getScalarSizeInBits())
127 return DL.getPointerTypeSizeInBits(Ty);
136 SQ.getWithInstruction(&Inst));
137 if (!V)
return false;
138 if (V == &Inst)
return true;
154 SQ.getWithInstruction(&Inst));
167 const APInt &DemandedMask,
171 Use &U =
I->getOperandUse(OpNo);
179 if (DemandedMask.
isZero()) {
204 if (!NewVal)
return false;
236 const APInt &DemandedMask,
240 assert(
I !=
nullptr &&
"Null pointer of Value???");
243 Type *VTy =
I->getType();
247 "Value *V, DemandedMask and Known must have same BitWidth");
253 auto disableWrapFlagsBasedOnUnusedHighBits = [](
Instruction *
I,
259 I->setHasNoSignedWrap(
false);
260 I->setHasNoUnsignedWrap(
false);
267 auto simplifyOperandsBasedOnUnusedHighBits = [&](
APInt &DemandedFromOps) {
276 disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
282 switch (
I->getOpcode()) {
286 case Instruction::And: {
304 return I->getOperand(0);
306 return I->getOperand(1);
314 case Instruction::Or: {
320 I->dropPoisonGeneratingFlags();
335 return I->getOperand(0);
337 return I->getOperand(1);
346 RHSCache(
I->getOperand(1), RHSKnown);
355 case Instruction::Xor: {
366 return Builder.CreateUnaryIntrinsic(Intrinsic::ctpop,
Xor);
380 return I->getOperand(0);
382 return I->getOperand(1);
389 BinaryOperator::CreateOr(
I->getOperand(0),
I->getOperand(1));
403 ~RHSKnown.
One & DemandedMask);
413 if ((*
C | ~DemandedMask).isAllOnes()) {
429 if (LHSInst->getOpcode() == Instruction::And && LHSInst->hasOneUse() &&
432 (LHSKnown.One & RHSKnown.
One & DemandedMask) != 0) {
433 APInt NewMask = ~(LHSKnown.One & RHSKnown.
One & DemandedMask);
436 Instruction *NewAnd = BinaryOperator::CreateAnd(
I->getOperand(0), AndC);
440 Instruction *NewXor = BinaryOperator::CreateXor(NewAnd, XorC);
446 case Instruction::Select: {
456 auto CanonicalizeSelectConstant = [](
Instruction *
I,
unsigned OpNo,
457 const APInt &DemandedMask) {
477 if ((*CmpC & DemandedMask) == (*SelC & DemandedMask)) {
478 I->setOperand(OpNo, ConstantInt::get(
I->getType(), *CmpC));
483 if (CanonicalizeSelectConstant(
I, 1, DemandedMask) ||
484 CanonicalizeSelectConstant(
I, 2, DemandedMask))
492 Known = LHSKnown.intersectWith(RHSKnown);
495 case Instruction::Trunc: {
509 return Builder.CreateLShr(Trunc,
C->getZExtValue());
514 case Instruction::ZExt: {
515 unsigned SrcBitWidth =
I->getOperand(0)->getType()->getScalarSizeInBits();
523 I->dropPoisonGeneratingFlags();
527 if (
I->getOpcode() == Instruction::ZExt &&
I->hasNonNeg() &&
534 case Instruction::SExt: {
536 unsigned SrcBitWidth =
I->getOperand(0)->getType()->getScalarSizeInBits();
538 APInt InputDemandedBits = DemandedMask.
trunc(SrcBitWidth);
543 InputDemandedBits.
setBit(SrcBitWidth-1);
564 case Instruction::Add: {
565 if ((DemandedMask & 1) == 0) {
571 X->getType()->isIntOrIntVectorTy(1) &&
X->getType() ==
Y->getType()) {
581 return Builder.CreateSExt(AndNot, VTy);
586 X->getType()->isIntOrIntVectorTy(1) &&
X->getType() ==
Y->getType() &&
587 (
I->getOperand(0)->hasOneUse() ||
I->getOperand(1)->hasOneUse())) {
608 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
614 APInt DemandedFromLHS = DemandedFromOps;
618 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
620 unsigned NtzLHS = (~DemandedMask & LHSKnown.Zero).
countr_one();
621 APInt DemandedFromRHS = DemandedFromOps;
624 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
629 return I->getOperand(0);
630 if (DemandedFromOps.
isSubsetOf(LHSKnown.Zero))
631 return I->getOperand(1);
640 return Builder.CreateXor(
I->getOperand(0), ConstantInt::get(VTy, *
C));
650 case Instruction::Sub: {
657 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
663 APInt DemandedFromLHS = DemandedFromOps;
667 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
672 return I->getOperand(0);
675 if (DemandedFromOps.
isOne() && DemandedFromOps.
isSubsetOf(LHSKnown.Zero))
676 return I->getOperand(1);
684 return Builder.CreateNot(
I->getOperand(1));
693 case Instruction::Mul: {
694 APInt DemandedFromOps;
695 if (simplifyOperandsBasedOnUnusedHighBits(DemandedFromOps))
705 Constant *ShiftC = ConstantInt::get(VTy, CTZ);
706 Instruction *Shl = BinaryOperator::CreateShl(
I->getOperand(0), ShiftC);
713 if (
I->getOperand(0) ==
I->getOperand(1) && DemandedMask.
ult(4)) {
714 Constant *One = ConstantInt::get(VTy, 1);
715 Instruction *And1 = BinaryOperator::CreateAnd(
I->getOperand(0), One);
722 case Instruction::Shl: {
729 DemandedMask,
Known))
733 if (
I->hasOneUse()) {
735 if (Inst->
getOpcode() == BinaryOperator::Or) {
737 auto [IID, FShiftArgs] = *Opt;
738 if ((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
739 FShiftArgs[0] == FShiftArgs[1]) {
751 if (
I->hasNoSignedWrap()) {
755 if (SignBits > ShiftAmt && SignBits - ShiftAmt >= NumHiDemandedBits)
756 return I->getOperand(0);
766 Constant *LeftShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
770 LeftShiftAmtC,
DL) ==
C) {
771 Instruction *Lshr = BinaryOperator::CreateLShr(NewC,
X);
777 APInt DemandedMaskIn(DemandedMask.
lshr(ShiftAmt));
801 I->dropPoisonGeneratingFlags();
809 case Instruction::LShr: {
815 if (
I->hasOneUse()) {
817 if (Inst->
getOpcode() == BinaryOperator::Or) {
819 auto [IID, FShiftArgs] = *Opt;
820 if ((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
821 FShiftArgs[0] == FShiftArgs[1]) {
837 if (SignBits >= NumHiDemandedBits)
838 return I->getOperand(0);
847 Constant *RightShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
851 RightShiftAmtC,
DL) ==
C) {
858 if (
match(
I->getOperand(0),
862 X, ConstantInt::get(
X->getType(), Factor->
lshr(ShiftAmt)));
868 APInt DemandedMaskIn(DemandedMask.
shl(ShiftAmt));
871 I->dropPoisonGeneratingFlags();
876 Known.Zero.setHighBits(ShiftAmt);
886 case Instruction::AShr: {
892 if (SignBits >= NumHiDemandedBits)
893 return I->getOperand(0);
899 if (DemandedMask.
isOne()) {
902 I->getOperand(0),
I->getOperand(1),
I->getName());
911 APInt DemandedMaskIn(DemandedMask.
shl(ShiftAmt));
914 bool ShiftedInBitsDemanded = DemandedMask.
countl_zero() < ShiftAmt;
915 if (ShiftedInBitsDemanded)
919 I->dropPoisonGeneratingFlags();
935 ShiftAmt != 0,
I->isExact());
941 case Instruction::UDiv: {
947 APInt DemandedMaskIn =
952 I->dropPoisonGeneratingFlags();
963 case Instruction::SRem: {
966 if (DemandedMask.
ult(*Rem))
967 return I->getOperand(0);
969 APInt LowBits = *Rem - 1;
980 case Instruction::Call: {
981 bool KnownBitsComputed =
false;
983 switch (
II->getIntrinsicID()) {
984 case Intrinsic::abs: {
985 if (DemandedMask == 1)
986 return II->getArgOperand(0);
989 case Intrinsic::ctpop: {
997 II->getModule(), Intrinsic::ctpop, VTy);
1002 case Intrinsic::bswap: {
1019 NewVal = BinaryOperator::CreateLShr(
1020 II->getArgOperand(0), ConstantInt::get(VTy, NLZ - NTZ));
1022 NewVal = BinaryOperator::CreateShl(
1023 II->getArgOperand(0), ConstantInt::get(VTy, NTZ - NLZ));
1029 case Intrinsic::ptrmask: {
1030 unsigned MaskWidth =
I->getOperand(1)->getType()->getScalarSizeInBits();
1035 I, 1, (DemandedMask & ~LHSKnown.Zero).zextOrTrunc(MaskWidth),
1036 RHSKnown, Q,
Depth + 1))
1042 Known = LHSKnown & RHSKnown;
1043 KnownBitsComputed =
true;
1058 if (DemandedMask.
isSubsetOf(RHSKnown.One | LHSKnown.Zero))
1059 return I->getOperand(0);
1063 I, 1, (DemandedMask & ~LHSKnown.Zero).zextOrTrunc(MaskWidth)))
1072 uint64_t PtrMaskImmediate;
1078 if (!LHSKnown.isZero()) {
1079 const unsigned trailingZeros = LHSKnown.countMinTrailingZeros();
1080 uint64_t PointerAlignBits = (
uint64_t(1) << trailingZeros) - 1;
1082 uint64_t HighBitsGEPIndex = GEPIndex & ~PointerAlignBits;
1083 uint64_t MaskedLowBitsGEPIndex =
1084 GEPIndex & PointerAlignBits & PtrMaskImmediate;
1086 uint64_t MaskedGEPIndex = HighBitsGEPIndex | MaskedLowBitsGEPIndex;
1088 if (MaskedGEPIndex != GEPIndex) {
1091 Type *GEPIndexType =
1092 DL.getIndexType(
GEP->getPointerOperand()->getType());
1094 GEP->getSourceElementType(), InnerPtr,
1095 ConstantInt::get(GEPIndexType, MaskedGEPIndex),
1096 GEP->getName(),
GEP->isInBounds());
1107 case Intrinsic::fshr:
1108 case Intrinsic::fshl: {
1116 if (
II->getIntrinsicID() == Intrinsic::fshr)
1119 APInt DemandedMaskLHS(DemandedMask.
lshr(ShiftAmt));
1121 if (
I->getOperand(0) !=
I->getOperand(1)) {
1127 I->dropPoisonGeneratingAnnotations();
1134 if (DemandedMaskLHS.
isSubsetOf(LHSKnown.Zero | LHSKnown.One) &&
1138 I->dropPoisonGeneratingAnnotations();
1147 I->dropPoisonGeneratingAnnotations();
1152 LHSKnown <<= ShiftAmt;
1154 Known = LHSKnown.unionWith(RHSKnown);
1155 KnownBitsComputed =
true;
1158 case Intrinsic::umax: {
1165 CTZ >=
C->getActiveBits())
1166 return II->getArgOperand(0);
1169 case Intrinsic::umin: {
1177 CTZ >=
C->getBitWidth() -
C->countl_one())
1178 return II->getArgOperand(0);
1184 *
II, DemandedMask,
Known, KnownBitsComputed);
1192 if (!KnownBitsComputed)
1198 if (
I->getType()->isPointerTy()) {
1199 Align Alignment =
I->getPointerAlignment(
DL);
1207 if (!
I->getType()->isPointerTy() &&
1213 if (
Known != ReferenceKnown) {
1214 errs() <<
"Mismatched known bits for " << *
I <<
" in "
1215 <<
I->getFunction()->getName() <<
"\n";
1216 errs() <<
"computeKnownBits(): " << ReferenceKnown <<
"\n";
1217 errs() <<
"SimplifyDemandedBits(): " <<
Known <<
"\n";
1232 Type *ITy =
I->getType();
1241 switch (
I->getOpcode()) {
1242 case Instruction::And: {
1257 return I->getOperand(0);
1259 return I->getOperand(1);
1263 case Instruction::Or: {
1280 return I->getOperand(0);
1282 return I->getOperand(1);
1286 case Instruction::Xor: {
1302 return I->getOperand(0);
1304 return I->getOperand(1);
1308 case Instruction::Add: {
1316 return I->getOperand(0);
1320 return I->getOperand(1);
1328 case Instruction::Sub: {
1336 return I->getOperand(0);
1345 case Instruction::AShr: {
1358 const APInt *ShiftRC;
1359 const APInt *ShiftLC;
1407 if (!ShlOp1 || !ShrOp1)
1412 unsigned BitWidth = Ty->getScalarSizeInBits();
1419 Known.One.clearAllBits();
1420 Known.Zero.setLowBits(ShlAmt - 1);
1421 Known.Zero &= DemandedMask;
1426 bool isLshr = (Shr->
getOpcode() == Instruction::LShr);
1427 BitMask1 = isLshr ? (BitMask1.
lshr(ShrAmt) << ShlAmt) :
1428 (BitMask1.
ashr(ShrAmt) << ShlAmt);
1430 if (ShrAmt <= ShlAmt) {
1431 BitMask2 <<= (ShlAmt - ShrAmt);
1433 BitMask2 = isLshr ? BitMask2.
lshr(ShrAmt - ShlAmt):
1434 BitMask2.
ashr(ShrAmt - ShlAmt);
1438 if ((BitMask1 & DemandedMask) == (BitMask2 & DemandedMask)) {
1439 if (ShrAmt == ShlAmt)
1446 if (ShrAmt < ShlAmt) {
1448 New = BinaryOperator::CreateShl(VarX, Amt);
1454 New = isLshr ? BinaryOperator::CreateLShr(VarX, Amt) :
1455 BinaryOperator::CreateAShr(VarX, Amt);
1457 New->setIsExact(
true);
1472 unsigned DepthLimit) {
1475 if (!IE.hasOneUse())
1478 if (!UserIE || UserIE->getOperand(0) != &IE)
1486 if (!Idx || Idx->getValue().uge(VWidth))
1489 unsigned Index = Idx->getZExtValue();
1490 if (SeenIndices.
test(Index))
1493 SeenIndices.
set(Index);
1498 for (
unsigned I = 0;
I != DepthLimit; ++
I) {
1503 if (!HasNewIndexInRange(*Cur))
1511 if (!Cur || !Cur->hasOneUse())
1535 bool AllowMultipleUsers) {
1543 assert((DemandedElts & ~EltMask) == 0 &&
"Invalid DemandedElts!");
1547 PoisonElts = EltMask;
1551 if (DemandedElts.
isZero()) {
1552 PoisonElts = EltMask;
1567 for (
unsigned i = 0; i != VWidth; ++i) {
1568 if (!DemandedElts[i]) {
1574 Constant *Elt =
C->getAggregateElement(i);
1575 if (!Elt)
return nullptr;
1584 return NewCV !=
C ? NewCV :
nullptr;
1591 if (!AllowMultipleUsers) {
1595 if (!V->hasOneUse()) {
1604 DemandedElts = EltMask;
1609 if (!
I)
return nullptr;
1611 bool MadeChange =
false;
1612 auto simplifyAndSetOp = [&](
Instruction *Inst,
unsigned OpNum,
1622 APInt PoisonElts2(VWidth, 0);
1623 APInt PoisonElts3(VWidth, 0);
1624 switch (
I->getOpcode()) {
1627 case Instruction::GetElementPtr: {
1645 for (
unsigned i = 0; i <
I->getNumOperands(); i++) {
1649 PoisonElts = EltMask;
1652 if (
I->getOperand(i)->getType()->isVectorTy()) {
1653 APInt PoisonEltsOp(VWidth, 0);
1654 simplifyAndSetOp(
I, i, DemandedElts, PoisonEltsOp);
1659 PoisonElts |= PoisonEltsOp;
1665 case Instruction::InsertElement: {
1669 if (
Depth == 0 && DemandedElts.
isAllOnes() && VWidth > DepthLimit &&
1679 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts2);
1686 APInt PreInsertDemandedElts = DemandedElts;
1688 PreInsertDemandedElts.
clearBit(IdxNo);
1696 if (PreInsertDemandedElts == 0 &&
1703 simplifyAndSetOp(
I, 0, PreInsertDemandedElts, PoisonElts);
1707 if (IdxNo >= VWidth || !DemandedElts[IdxNo]) {
1709 return I->getOperand(0);
1716 case Instruction::ShuffleVector: {
1718 assert(Shuffle->getOperand(0)->getType() ==
1719 Shuffle->getOperand(1)->getType() &&
1720 "Expected shuffle operands to have same type");
1731 APInt LeftDemanded(OpWidth, 1);
1732 APInt LHSPoisonElts(OpWidth, 0);
1733 simplifyAndSetOp(
I, 0, LeftDemanded, LHSPoisonElts);
1734 if (LHSPoisonElts[0])
1735 PoisonElts = EltMask;
1741 APInt LeftDemanded(OpWidth, 0), RightDemanded(OpWidth, 0);
1742 for (
unsigned i = 0; i < VWidth; i++) {
1743 if (DemandedElts[i]) {
1744 unsigned MaskVal = Shuffle->getMaskValue(i);
1745 if (MaskVal != -1u) {
1746 assert(MaskVal < OpWidth * 2 &&
1747 "shufflevector mask index out of range!");
1748 if (MaskVal < OpWidth)
1749 LeftDemanded.setBit(MaskVal);
1751 RightDemanded.
setBit(MaskVal - OpWidth);
1756 APInt LHSPoisonElts(OpWidth, 0);
1757 simplifyAndSetOp(
I, 0, LeftDemanded, LHSPoisonElts);
1759 APInt RHSPoisonElts(OpWidth, 0);
1760 simplifyAndSetOp(
I, 1, RightDemanded, RHSPoisonElts);
1773 if (VWidth == OpWidth) {
1774 bool IsIdentityShuffle =
true;
1775 for (
unsigned i = 0; i < VWidth; i++) {
1776 unsigned MaskVal = Shuffle->getMaskValue(i);
1777 if (DemandedElts[i] && i != MaskVal) {
1778 IsIdentityShuffle =
false;
1782 if (IsIdentityShuffle)
1783 return Shuffle->getOperand(0);
1786 bool NewPoisonElts =
false;
1787 unsigned LHSIdx = -1u, LHSValIdx = -1u;
1788 unsigned RHSIdx = -1u, RHSValIdx = -1u;
1789 bool LHSUniform =
true;
1790 bool RHSUniform =
true;
1791 for (
unsigned i = 0; i < VWidth; i++) {
1792 unsigned MaskVal = Shuffle->getMaskValue(i);
1793 if (MaskVal == -1u) {
1795 }
else if (!DemandedElts[i]) {
1796 NewPoisonElts =
true;
1798 }
else if (MaskVal < OpWidth) {
1799 if (LHSPoisonElts[MaskVal]) {
1800 NewPoisonElts =
true;
1803 LHSIdx = LHSIdx == -1u ? i : OpWidth;
1804 LHSValIdx = LHSValIdx == -1u ? MaskVal : OpWidth;
1805 LHSUniform = LHSUniform && (MaskVal == i);
1808 if (RHSPoisonElts[MaskVal - OpWidth]) {
1809 NewPoisonElts =
true;
1812 RHSIdx = RHSIdx == -1u ? i : OpWidth;
1813 RHSValIdx = RHSValIdx == -1u ? MaskVal - OpWidth : OpWidth;
1814 RHSUniform = RHSUniform && (MaskVal - OpWidth == i);
1830 if (LHSIdx < OpWidth && RHSUniform) {
1832 Op = Shuffle->getOperand(1);
1833 Value = CV->getOperand(LHSValIdx);
1837 if (RHSIdx < OpWidth && LHSUniform) {
1839 Op = Shuffle->getOperand(0);
1840 Value = CV->getOperand(RHSValIdx);
1853 if (NewPoisonElts) {
1856 for (
unsigned i = 0; i < VWidth; ++i) {
1860 Elts.
push_back(Shuffle->getMaskValue(i));
1862 Shuffle->setShuffleMask(Elts);
1867 case Instruction::Select: {
1877 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1881 APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts);
1883 for (
unsigned i = 0; i < VWidth; i++) {
1888 DemandedLHS.clearBit(i);
1894 simplifyAndSetOp(
I, 1, DemandedLHS, PoisonElts2);
1895 simplifyAndSetOp(
I, 2, DemandedRHS, PoisonElts3);
1899 PoisonElts = PoisonElts2 & PoisonElts3;
1902 case Instruction::BitCast: {
1907 APInt InputDemandedElts(InVWidth, 0);
1908 PoisonElts2 =
APInt(InVWidth, 0);
1911 if (VWidth == InVWidth) {
1915 InputDemandedElts = DemandedElts;
1916 }
else if ((VWidth % InVWidth) == 0) {
1920 Ratio = VWidth / InVWidth;
1921 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
1922 if (DemandedElts[OutIdx])
1923 InputDemandedElts.
setBit(OutIdx / Ratio);
1924 }
else if ((InVWidth % VWidth) == 0) {
1928 Ratio = InVWidth / VWidth;
1929 for (
unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
1930 if (DemandedElts[InIdx / Ratio])
1931 InputDemandedElts.
setBit(InIdx);
1937 simplifyAndSetOp(
I, 0, InputDemandedElts, PoisonElts2);
1939 if (VWidth == InVWidth) {
1940 PoisonElts = PoisonElts2;
1941 }
else if ((VWidth % InVWidth) == 0) {
1945 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
1946 if (PoisonElts2[OutIdx / Ratio])
1947 PoisonElts.
setBit(OutIdx);
1948 }
else if ((InVWidth % VWidth) == 0) {
1952 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) {
1955 PoisonElts.
setBit(OutIdx);
1962 case Instruction::FPTrunc:
1963 case Instruction::FPExt:
1964 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1967 case Instruction::Call: {
1970 switch (
II->getIntrinsicID()) {
1971 case Intrinsic::masked_gather:
1972 case Intrinsic::masked_load: {
1977 DemandedPassThrough(DemandedElts);
1979 for (
unsigned i = 0; i < VWidth; i++) {
1981 if (CElt->isNullValue())
1982 DemandedPtrs.clearBit(i);
1983 else if (CElt->isAllOnesValue())
1989 if (
II->getIntrinsicID() == Intrinsic::masked_gather)
1990 simplifyAndSetOp(
II, 0, DemandedPtrs, PoisonElts2);
1991 simplifyAndSetOp(
II, 2, DemandedPassThrough, PoisonElts3);
1995 PoisonElts = PoisonElts2 & PoisonElts3;
2001 *
II, DemandedElts, PoisonElts, PoisonElts2, PoisonElts3,
2035 if (DemandedElts == 1 && !
X->hasOneUse() && !
Y->hasOneUse() &&
2038 auto findShufBO = [&](
bool MatchShufAsOp0) ->
User * {
2043 Value *OtherOp = MatchShufAsOp0 ?
Y :
X;
2048 Value *ShufOp = MatchShufAsOp0 ?
X :
Y;
2059 if (
DT.dominates(U,
I))
2065 User *ShufBO = findShufBO(
true);
2067 ShufBO = findShufBO(
false);
2070 ShufBOI->andIRFlags(BO);
2076 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
2077 simplifyAndSetOp(
I, 1, DemandedElts, PoisonElts2);
2081 PoisonElts &= PoisonElts2;
2089 return MadeChange ?
I :
nullptr;
2095 bool IsCanonicalizing =
false) {
2103 if (Ty->isAggregateType())
2107 if (Mask ==
fcNan && IsCanonicalizing)
2146 Known.knownNot(~DemandedMask);
2180 return DemandedMask;
2198 if (InferredFMF != FMF) {
2228 Known.knownNot(~DemandedMask);
2240 if ((DemandedMask & ~NegOrZero) ==
fcNone &&
2244 if ((DemandedMask & ~PosOrZero) ==
fcNone &&
2264 bool OrderedZeroSign = !NSZ;
2268 case Intrinsic::maximum: {
2287 case Intrinsic::minimum: {
2306 case Intrinsic::maxnum:
2307 case Intrinsic::maximumnum: {
2325 case Intrinsic::minnum:
2326 case Intrinsic::minimumnum: {
2351 Known.knownNot(~DemandedMask);
2364 if (DemandedMask &
fcNan)
2365 SrcDemandedMask |=
fcNan;
2390 Known.knownNot(~DemandedMask);
2404 Type *VTy =
I->getType();
2408 FMF = FPOp->getFastMathFlags();
2412 switch (
I->getOpcode()) {
2413 case Instruction::FNeg: {
2416 Value *FNegSrc =
I->getOperand(0);
2431 Known, FNegFAbsSrc, ThisDemandedMask, KnownSrc, IsNSZ))
2455 Known.knownNot(~DemandedMask);
2458 case Instruction::FAdd:
2459 case Instruction::FSub: {
2463 if (
I->getOperand(0) ==
I->getOperand(1) &&
2464 I->getOpcode() == Instruction::FAdd &&
2471 if (DemandedMask &
fcNan)
2472 SrcDemandedMask |=
fcNan;
2485 if (Mode.inputsMayBePositiveZero() || Mode.outputsMayBePositiveZero())
2504 KnownRHS = KnownLHS;
2509 if (DemandedMask &
fcNan)
2512 if (DemandedMask &
fcInf)
2513 SrcDemandedMask |=
fcInf;
2524 Known =
I->getOpcode() == Instruction::FAdd
2529 Known.knownNot(~DemandedMask);
2536 bool ResultNotNan = (DemandedMask &
fcNan) ==
fcNone;
2539 if (ResultNotNan &&
I->getOpcode() == Instruction::FAdd &&
2541 return I->getOperand(1);
2547 return I->getOperand(0);
2550 FMF,
Known.getKnownFPClasses(), {KnownLHS, KnownRHS});
2551 if (InferredFMF != FMF) {
2552 I->setFastMathFlags(InferredFMF);
2558 case Instruction::FMul: {
2567 if (DemandedMask &
fcInf) {
2573 if (DemandedMask &
fcNan) {
2587 if (DemandedMask &
fcZero)
2599 Known.knownNot(~DemandedMask);
2634 bool NonNanResult = (DemandedMask &
fcNan) ==
fcNone;
2717 Known.knownNot(~DemandedMask);
2724 FMF,
Known.getKnownFPClasses(), {KnownLHS, KnownRHS});
2725 if (InferredFMF != FMF) {
2726 I->setFastMathFlags(InferredFMF);
2732 case Instruction::FDiv: {
2748 Value *IsInfOrZeroOrNan =
Builder.CreateOr(IsInfOrNan, IsZeroOrNan);
2750 return Builder.CreateSelectFMFWithUnknownProfile(
2771 if (DemandedMask &
fcNan) {
2782 if (DemandedMask &
fcZero)
2789 if (DemandedMask &
fcZero) {
2791 "should not have to worry about daz here");
2792 LHSDemandedMask |=
fcZero;
2793 RHSDemandedMask |=
fcInf;
2800 if (DemandedMask &
fcInf) {
2811 bool ResultNotNan = (DemandedMask &
fcNan) ==
fcNone;
2812 bool ResultNotInf = (DemandedMask &
fcInf) ==
fcNone;
2817 bool CanIgnoreZeroByZeroNan =
2826 CanIgnoreZeroByZeroNan) {
2837 if (!ResultNotInf &&
2858 Known.knownNot(~DemandedMask);
2865 FMF,
Known.getKnownFPClasses(), {KnownLHS, KnownRHS});
2866 if (InferredFMF != FMF) {
2867 I->setFastMathFlags(InferredFMF);
2873 case Instruction::FPTrunc:
2876 case Instruction::FPExt: {
2878 if (DemandedMask &
fcNan)
2879 SrcDemandedMask |=
fcNan;
2893 I->getOperand(0)->getType()->getScalarType()->getFltSemantics();
2896 Known.knownNot(~DemandedMask);
2901 case Instruction::Call: {
2905 case Intrinsic::fabs: {
2917 case Intrinsic::arithmetic_fence:
2921 case Intrinsic::copysign: {
2929 if ((DemandedMask &
fcNegative) == DemandedMask) {
2931 CI->
setOperand(1, ConstantFP::get(VTy, -1.0));
2935 if ((DemandedMask &
fcPositive) == DemandedMask) {
2965 CI->
setOperand(1, ConstantFP::get(VTy, -1.0));
2970 Known.knownNot(~DemandedMask);
2973 case Intrinsic::fma:
2974 case Intrinsic::fmuladd: {
2978 if (DemandedMask &
fcNan)
2979 SrcDemandedMask |=
fcNan;
2993 KnownSrc[1] = KnownSrc[0];
2997 for (
int OpIdx = 0; OpIdx != 3; ++OpIdx) {
2999 KnownSrc[OpIdx],
SQ,
Depth + 1))
3010 case Intrinsic::maximum:
3011 case Intrinsic::minimum:
3012 case Intrinsic::maximumnum:
3013 case Intrinsic::minimumnum:
3014 case Intrinsic::maxnum:
3015 case Intrinsic::minnum: {
3016 const bool PropagateNaN =
3017 IID == Intrinsic::maximum || IID == Intrinsic::minimum;
3023 PropagateNaN && ((DemandedMask &
fcNan) ==
fcNone)
3024 ? DemandedMask | ~
fcNan
3055 bool ResultNotLogical0 = (ValidResults & ZeroMask) ==
fcNone;
3064 ((PropagateNaN && (ValidResults &
fcNan) ==
fcNone) ||
3070 if (InferredFMF != FMF) {
3077 case Intrinsic::exp:
3078 case Intrinsic::exp2:
3079 case Intrinsic::exp10: {
3093 if (DemandedMask &
fcNan)
3094 SrcDemandedMask |=
fcNan;
3096 if (DemandedMask &
fcZero) {
3136 return ConstantFP::get(VTy, 1.0);
3151 ConstantFP::get(VTy, 1.0), FMF);
3166 Value *ZeroOrInf =
Builder.CreateSelectFMFWithUnknownProfile(
3172 Known.knownNot(~DemandedMask);
3177 case Intrinsic::log:
3178 case Intrinsic::log2:
3179 case Intrinsic::log10: {
3181 if (DemandedMask &
fcNan)
3182 DemandedSrcMask |=
fcNan;
3188 if (DemandedMask &
fcNan)
3193 DemandedSrcMask |=
fcZero;
3196 if (Mode.inputsMayBeZero())
3204 if (DemandedMask &
fcZero)
3213 Known.knownNot(~DemandedMask);
3218 case Intrinsic::sqrt: {
3222 if (DemandedMask &
fcNan)
3251 Known.knownNot(~DemandedMask);
3268 case Intrinsic::ldexp: {
3270 if (DemandedMask &
fcNan)
3271 SrcDemandedMask |=
fcNan;
3301 Known.knownNot(~DemandedMask);
3306 case Intrinsic::trunc:
3307 case Intrinsic::floor:
3308 case Intrinsic::ceil:
3309 case Intrinsic::rint:
3310 case Intrinsic::nearbyint:
3311 case Intrinsic::round:
3312 case Intrinsic::roundeven: {
3314 if (DemandedMask &
fcNan)
3315 DemandedSrcMask |=
fcNan;
3333 bool IsRoundNearestOrTrunc =
3334 IID == Intrinsic::round || IID == Intrinsic::roundeven ||
3335 IID == Intrinsic::nearbyint || IID == Intrinsic::rint ||
3336 IID == Intrinsic::trunc;
3339 if ((IID == Intrinsic::floor || IsRoundNearestOrTrunc) &&
3343 if ((IID == Intrinsic::ceil || IsRoundNearestOrTrunc) &&
3348 return ConstantFP::get(VTy, -1.0);
3351 return ConstantFP::get(VTy, 1.0);
3354 KnownSrc, IID == Intrinsic::trunc,
3357 Known.knownNot(~DemandedMask);
3364 if ((IID == Intrinsic::trunc || IsRoundNearestOrTrunc) &&
3377 if (InferredFMF != FMF) {
3385 case Intrinsic::fptrunc_round:
3388 case Intrinsic::canonicalize: {
3401 SrcDemandedMask |=
fcSNan;
3430 Known.knownNot(~DemandedMask);
3447 if (InferredFMF != FMF) {
3460 Known.knownNot(~DemandedMask);
3466 case Instruction::Select: {
3473 return I->getOperand(2);
3475 return I->getOperand(1);
3482 Known.knownNot(~DemandedMask);
3485 case Instruction::ExtractElement: {
3489 Known.knownNot(~DemandedMask);
3492 case Instruction::InsertElement: {
3500 Known = KnownVec | KnownInserted;
3501 Known.knownNot(~DemandedMask);
3504 case Instruction::ShuffleVector: {
3512 Known = KnownLHS | KnownRHS;
3513 Known.knownNot(~DemandedMask);
3516 case Instruction::InsertValue: {
3522 Known = KnownAgg | KnownElt;
3525 case Instruction::ExtractValue: {
3531 case Intrinsic::frexp: {
3533 if (DemandedMask &
fcNan)
3534 SrcDemandedMask |=
fcNan;
3553 Known.setKnownFPClasses(
Known.getKnownFPClasses() & DemandedMask);
3561 return II->getArgOperand(0);
3577 case Instruction::PHI: {
3579 if (
Depth >= PhiRecursionLimit)
3587 for (
unsigned I = 0, E =
P->getNumIncomingValues();
I != E; ++
I) {
3597 P,
P->getOperandNumForIncomingValue(
I), DemandedMask, KnownSrc,
3600 P->setIncomingValueForBlock(PredBB,
P->getIncomingValue(
I));
3615 Known.knownNot(~DemandedMask);
3620 Known.knownNot(~DemandedMask);
3635 FMF = FPOp->getFastMathFlags();
3639 switch (
I->getOpcode()) {
3640 case Instruction::Select: {
3646 return I->getOperand(1);
3651 return I->getOperand(2);
3658 Known.knownNot(~DemandedMask);
3661 case Instruction::FNeg: {
3665 Value *FNegSrc =
I->getOperand(0);
3680 Known, Src, ThisDemandedMask, KnownSrc,
false))
3684 case Instruction::Call: {
3688 case Intrinsic::fabs: {
3701 case Intrinsic::copysign: {
3713 Mag, DemandedMask, KnownMag,
false))
3731 case Intrinsic::maxnum:
3732 case Intrinsic::minnum:
3733 case Intrinsic::maximum:
3734 case Intrinsic::minimum:
3735 case Intrinsic::maximumnum:
3736 case Intrinsic::minimumnum: {
3747 KnownLHS, KnownRHS,
F,
3758 Known.knownNot(~DemandedMask);
3770 Use &U =
I->getOperandUse(OpNo);
3772 Type *VTy = V->getType();
3774 if (DemandedMask ==
fcNone) {
3786 Known.knownNot(~DemandedMask);
3802 if (!FoldedToConst || FoldedToConst == V)
3810 Known.knownNot(~DemandedMask);
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
AMDGPU Register Bank Select
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< ShadowStackGC > C("shadow-stack", "Very portable GC for uncooperative code generators")
This file provides internal interfaces used to implement the InstCombine.
static cl::opt< unsigned > SimplifyDemandedVectorEltsDepthLimit("instcombine-simplify-vector-elts-depth", cl::desc("Depth limit when simplifying vector instructions and their operands"), cl::Hidden, cl::init(10))
static Constant * getFPClassConstant(Type *Ty, FPClassTest Mask, bool IsCanonicalizing=false)
For floating-point classes that resolve to a single bit pattern, return that value.
static cl::opt< bool > VerifyKnownBits("instcombine-verify-known-bits", cl::desc("Verify that computeKnownBits() and " "SimplifyDemandedBits() are consistent"), cl::Hidden, cl::init(false))
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
static Value * simplifyDemandedFPClassFabs(KnownFPClass &Known, Value *Src, FPClassTest DemandedMask, KnownFPClass KnownSrc, bool NSZ)
Perform multiple-use aware simplfications for fabs(Src).
static Value * simplifyDemandedUseFPClassFPTrunc(InstCombinerImpl &IC, Instruction &I, FastMathFlags FMF, FPClassTest DemandedMask, KnownFPClass &Known, const SimplifyQuery &SQ, unsigned Depth)
static Value * simplifyDemandedFPClassFnegFabs(KnownFPClass &Known, Value *Src, FPClassTest DemandedMask, KnownFPClass KnownSrc, bool NSZ)
Perform multiple-use aware simplfications for fneg(fabs(Src)).
static bool ShrinkDemandedConstant(Instruction *I, unsigned OpNo, const APInt &Demanded)
Check to see if the specified operand of the specified instruction is a constant integer.
static Value * simplifyShiftSelectingPackedElement(Instruction *I, const APInt &DemandedMask, InstCombinerImpl &IC, unsigned Depth)
Let N = 2 * M.
static Value * simplifyDemandedFPClassMinMax(KnownFPClass &Known, Intrinsic::ID IID, const CallInst *CI, FPClassTest DemandedMask, KnownFPClass KnownLHS, KnownFPClass KnownRHS, const Function &F, bool NSZ)
static bool canSkipDemandedEltsInInsertChain(InsertElementInst &IE, unsigned VWidth, unsigned DepthLimit)
Return true if the top-level all-lanes demanded-elements query can be skipped for an intermediate ins...
static Value * simplifyDemandedFPClassCopysignMag(Value *MagSrc, FPClassTest DemandedMask, KnownFPClass KnownSrc, bool NSZ)
static FPClassTest adjustDemandedMaskFromFlags(FPClassTest DemandedMask, FastMathFlags FMF)
static FastMathFlags inferFastMathValueFlags(FastMathFlags FMF, FPClassTest ValidResults, ArrayRef< KnownFPClass > Known)
Try to set an inferred no-nans or no-infs in FMF.
static Value * simplifyDemandedFPClassResult(Instruction *FPOp, FastMathFlags FMF, FPClassTest DemandedMask, KnownFPClass &Known, ArrayRef< KnownFPClass > KnownSrcs)
Apply epilog fixups to a floating-point intrinsic.
This file provides the interface for the instcombine pass implementation.
uint64_t IntrinsicInst * II
static cl::opt< RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode > Mode("regalloc-enable-advisor", cl::Hidden, cl::init(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Default), cl::desc("Enable regalloc advisor mode"), cl::values(clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Default, "default", "Default"), clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Release, "release", "precompiled"), clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Development, "development", "for training")))
This file implements the SmallBitVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
static APFloat getOne(const fltSemantics &Sem, bool Negative=false)
Factory for Positive and Negative One.
Class for arbitrary precision integers.
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
void clearBit(unsigned BitPosition)
Set a given bit to 0.
static APInt getSignMask(unsigned BitWidth)
Get the SignMask for a specific bit width.
uint64_t getZExtValue() const
Get zero extended value.
void setHighBits(unsigned hiBits)
Set the top hiBits bits.
unsigned popcount() const
Count the number of bits set.
LLVM_ABI APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
unsigned getActiveBits() const
Compute the number of active bits in the value.
LLVM_ABI APInt trunc(unsigned width) const
Truncate to new width.
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
bool isAllOnes() const
Determine if all bits are set. This is true for zero-width values.
bool isZero() const
Determine if this value is zero, i.e. all bits are clear.
LLVM_ABI APInt urem(const APInt &RHS) const
Unsigned remainder operation.
void setSignBit()
Set the sign bit to 1.
unsigned getBitWidth() const
Return the number of bits in the APInt.
bool ult(const APInt &RHS) const
Unsigned less than comparison.
void clearAllBits()
Set every bit to 0.
unsigned countr_zero() const
Count the number of trailing zero bits.
unsigned countl_zero() const
The APInt version of std::countl_zero.
void clearLowBits(unsigned loBits)
Set bottom loBits bits to 0.
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
APInt ashr(unsigned ShiftAmt) const
Arithmetic right-shift function.
APInt shl(unsigned shiftAmt) const
Left-shift function.
bool isSubsetOf(const APInt &RHS) const
This operation checks that all bits set in this APInt are also set in RHS.
bool isPowerOf2() const
Check if this APInt's value is a power of two greater than zero.
static APInt getLowBitsSet(unsigned numBits, unsigned loBitsSet)
Constructs an APInt value that has the bottom loBitsSet bits set.
static APInt getHighBitsSet(unsigned numBits, unsigned hiBitsSet)
Constructs an APInt value that has the top hiBitsSet bits set.
bool isIntN(unsigned N) const
Check if this APInt has an N-bits unsigned integer value.
bool isOne() const
Determine if this is a value of 1.
APInt lshr(unsigned shiftAmt) const
Logical right-shift function.
bool uge(const APInt &RHS) const
Unsigned greater or equal comparison.
Represent a constant reference to an array (0 or more elements consecutively in memory),...
LLVM Basic Block Representation.
const Instruction * getTerminator() const LLVM_READONLY
Returns the terminator instruction; assumes that the block is well-formed.
BinaryOps getOpcode() const
Value * getArgOperand(unsigned i) const
LLVM_ABI Intrinsic::ID getIntrinsicID() const
Returns the intrinsic ID of the intrinsic called or Intrinsic::not_intrinsic if the called function i...
This class represents a function call, abstracting a target machine's calling convention.
static CallInst * Create(FunctionType *Ty, Value *F, const Twine &NameStr="", InsertPosition InsertBefore=nullptr)
This is the base class for all instructions that perform data casts.
@ FCMP_UEQ
1 0 0 1 True if unordered or equal
static LLVM_ABI ConstantFP * getZero(Type *Ty, bool Negative=false)
static LLVM_ABI ConstantFP * getQNaN(Type *Ty, bool Negative=false, APInt *Payload=nullptr)
static LLVM_ABI ConstantFP * getInfinity(Type *Ty, bool Negative=false)
This is the shared class of boolean and integer constants.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
const APInt & getValue() const
Return the constant as an APInt value reference.
static LLVM_ABI Constant * get(ArrayRef< Constant * > V)
This is an important base class in LLVM.
static LLVM_ABI Constant * getIntegerValue(Type *Ty, const APInt &V)
Return the value for an integer or pointer constant, or a vector thereof, with the given scalar value...
bool isNullValue() const
Return true if this is the value that would be returned by getNullValue.
static LLVM_ABI Constant * getAllOnesValue(Type *Ty)
LLVM_ABI bool isOneValue() const
Returns true if the value is one.
static LLVM_ABI Constant * getNullValue(Type *Ty)
Constructor to create a '0' constant of arbitrary type.
LLVM_ABI Constant * getAggregateElement(unsigned Elt) const
For aggregates (struct/array/vector) return the constant that corresponds to the specified element if...
A parsed version of the target data layout string in and methods for querying it.
Convenience struct for specifying and reasoning about fast-math flags.
bool noSignedZeros() const
void setNoSignedZeros(bool B=true)
void setNoNaNs(bool B=true)
void setNoInfs(bool B=true)
an instruction for type-safe pointer arithmetic to access elements of arrays and structs
Value * CreateICmpEQ(Value *LHS, Value *RHS, const Twine &Name="")
LLVM_ABI Value * CreateSelectWithUnknownProfile(Value *C, Value *True, Value *False, StringRef PassName, const Twine &Name="")
void SetInsertPoint(BasicBlock *TheBB)
This specifies that created instructions should be appended to the end of the specified block.
This instruction inserts a single (scalar) element into a VectorType value.
static InsertElementInst * Create(Value *Vec, Value *NewElt, Value *Idx, const Twine &NameStr="", InsertPosition InsertBefore=nullptr)
bool SimplifyDemandedInstructionFPClass(Instruction &Inst)
Value * SimplifyDemandedVectorElts(Value *V, APInt DemandedElts, APInt &PoisonElts, unsigned Depth=0, bool AllowMultipleUsers=false) override
The specified value produces a vector with any number of elements.
Value * SimplifyDemandedUseFPClass(Instruction *I, FPClassTest DemandedMask, KnownFPClass &Known, const SimplifyQuery &Q, unsigned Depth=0)
Attempts to replace V with a simpler value based on the demanded floating-point classes.
bool SimplifyDemandedBits(Instruction *I, unsigned Op, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0) override
This form of SimplifyDemandedBits simplifies the specified instruction operand if possible,...
std::optional< std::pair< Intrinsic::ID, SmallVector< Value *, 3 > > > convertOrOfShiftsToFunnelShift(Instruction &Or)
Value * SimplifyMultipleUseDemandedFPClass(Instruction *I, FPClassTest DemandedMask, KnownFPClass &Known, const SimplifyQuery &Q, unsigned Depth)
Helper routine of SimplifyDemandedUseFPClass.
Value * simplifyShrShlDemandedBits(Instruction *Shr, const APInt &ShrOp1, Instruction *Shl, const APInt &ShlOp1, const APInt &DemandedMask, KnownBits &Known)
Helper routine of SimplifyDemandedUseBits.
bool SimplifyDemandedFPClass(Instruction *I, unsigned Op, FPClassTest DemandedMask, KnownFPClass &Known, const SimplifyQuery &Q, unsigned Depth=0)
Value * SimplifyDemandedUseBits(Instruction *I, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Attempts to replace I with a simpler value based on the demanded bits.
bool SimplifyDemandedInstructionBits(Instruction &Inst)
Tries to simplify operands to an integer instruction based on its demanded bits.
Value * SimplifyMultipleUseDemandedBits(Instruction *I, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Helper routine of SimplifyDemandedUseBits.
unsigned ComputeNumSignBits(const Value *Op, const Instruction *CxtI=nullptr, unsigned Depth=0) const
Instruction * replaceInstUsesWith(Instruction &I, Value *V)
A combiner-aware RAUW-like routine.
void replaceUse(Use &U, Value *NewValue)
Replace use and add the previously used value to the worklist.
InstructionWorklist & Worklist
A worklist of the instructions that need to be simplified.
Instruction * InsertNewInstWith(Instruction *New, BasicBlock::iterator Old)
Same as InsertNewInstBefore, but also sets the debug loc.
void computeKnownBits(const Value *V, KnownBits &Known, const Instruction *CxtI, unsigned Depth=0) const
LLVM_ABI std::optional< Value * > targetSimplifyDemandedVectorEltsIntrinsic(IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp)
Instruction * replaceOperand(Instruction &I, unsigned OpNum, Value *V)
Replace operand of instruction and add old operand to the worklist.
LLVM_ABI std::optional< Value * > targetSimplifyDemandedUseBitsIntrinsic(IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed)
LLVM_ABI void dropUBImplyingAttrsAndMetadata(ArrayRef< unsigned > Keep={})
Drop any attributes or metadata that can cause immediate undefined behavior.
LLVM_ABI bool hasNoUnsignedWrap() const LLVM_READONLY
Determine whether the no unsigned wrap flag is set.
LLVM_ABI bool hasNoSignedWrap() const LLVM_READONLY
Determine whether the no signed wrap flag is set.
LLVM_ABI bool isCommutative() const LLVM_READONLY
Return true if the instruction is commutative:
LLVM_ABI void setFastMathFlags(FastMathFlags FMF)
Convenience function for setting multiple fast-math flags on this instruction, which must be an opera...
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
LLVM_ABI void setIsExact(bool b=true)
Set or clear the exact flag on this instruction, which must be an operator which supports this flag.
A wrapper class for inspecting calls to intrinsic functions.
bool hasNoSignedWrap() const
Test whether this operation is known to never undergo signed overflow, aka the nsw property.
bool hasNoUnsignedWrap() const
Test whether this operation is known to never undergo unsigned overflow, aka the nuw property.
static LLVM_ABI PoisonValue * get(Type *T)
Static factory methods - Return an 'poison' object of the specified type.
This class represents the LLVM 'select' instruction.
const Value * getCondition() const
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
bool test(unsigned Idx) const
Returns true if bit Idx is set.
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
The instances of the Type class are immutable: once they are created, they are never changed.
static LLVM_ABI IntegerType * getInt64Ty(LLVMContext &C)
bool isVectorTy() const
True if this is an instance of VectorType.
bool isIntOrIntVectorTy() const
Return true if this is an integer type or a vector of integer types.
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
bool isMultiUnitFPType() const
Returns true if this is a floating-point type that is an unevaluated sum of multiple floating-point u...
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
bool isIEEELikeFPTy() const
Return true if this is a well-behaved IEEE-like type, which has a IEEE compatible layout,...
LLVM_ABI const fltSemantics & getFltSemantics() const
static LLVM_ABI UndefValue * get(Type *T)
Static factory methods - Return an 'undef' object of the specified type.
A Use represents the edge between a Value definition and its users.
void setOperand(unsigned i, Value *Val)
Value * getOperand(unsigned i) const
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
bool hasOneUse() const
Return true if there is exactly one use of this value.
iterator_range< user_iterator > users()
bool hasUseList() const
Check if this Value has a use-list.
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
LLVM_ABI void takeName(Value *V)
Transfer the name from V to this value.
Base class of all SIMD vector types.
This class represents zero extension of integer types.
self_iterator getIterator()
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
LLVM_ABI Function * getOrInsertDeclaration(Module *M, ID id, ArrayRef< Type * > OverloadTys={})
Look up the Function declaration of the intrinsic id in the Module M.
BinaryOp_match< SrcTy, SpecificConstantMatch, TargetOpcode::G_XOR, true > m_Not(const SrcTy &&Src)
Matches a register not-ed by a G_XOR.
OneUse_match< SubPat > m_OneUse(const SubPat &SP)
cst_pred_ty< is_lowbit_mask > m_LowBitMask()
Match an integer or vector with only the low bit(s) set.
PtrAdd_match< PointerOpTy, OffsetOpTy > m_PtrAdd(const PointerOpTy &PointerOp, const OffsetOpTy &OffsetOp)
Matches GEP with i8 source element type.
BinaryOp_match< LHS, RHS, Instruction::Add > m_Add(const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::AShr > m_AShr(const LHS &L, const RHS &R)
auto m_Poison()
Match an arbitrary poison constant.
ap_match< APInt > m_APInt(const APInt *&Res)
Match a ConstantInt or splatted ConstantVector, binding the specified pointer to the contained APInt.
specific_intval< false > m_SpecificInt(const APInt &V)
Match a specific integer value or vector with all elements equal to the value.
bool match(Val *V, const Pattern &P)
specificval_ty m_Specific(const Value *V)
Match if we have a specific specified value.
BinOpPred_match< LHS, RHS, is_right_shift_op > m_Shr(const LHS &L, const RHS &R)
Matches logical shift operations.
TwoOps_match< Val_t, Idx_t, Instruction::ExtractElement > m_ExtractElt(const Val_t &Val, const Idx_t &Idx)
Matches ExtractElementInst.
auto m_BinOp()
Match an arbitrary binary operation and ignore it.
ExtractValue_match< Ind, Val_t > m_ExtractValue(const Val_t &V)
Match a single index ExtractValue instruction.
auto m_Value()
Match an arbitrary value and ignore it.
auto m_Ctpop(const Opnd0 &Op0)
BinaryOp_match< LHS, RHS, Instruction::Mul > m_Mul(const LHS &L, const RHS &R)
TwoOps_match< V1_t, V2_t, Instruction::ShuffleVector > m_Shuffle(const V1_t &v1, const V2_t &v2)
Matches ShuffleVectorInst independently of mask value.
CastInst_match< OpTy, ZExtInst > m_ZExt(const OpTy &Op)
Matches ZExt.
match_immconstant_ty m_ImmConstant()
Match an arbitrary immediate Constant and ignore it.
DisjointOr_match< LHS, RHS, true > m_c_DisjointOr(const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::Add, true > m_c_Add(const LHS &L, const RHS &R)
Matches a Add with LHS and RHS in either order.
auto m_Intrinsic(const Ts &...Ops)
Match intrinsic calls like this: m_Intrinsic<Intrinsic::fabs>(m_Value(X))
auto m_FAbs(const Opnd0 &Op0)
AnyBinaryOp_match< LHS, RHS, true > m_c_BinOp(const LHS &L, const RHS &R)
Matches a BinaryOperator with LHS and RHS in either order.
BinaryOp_match< LHS, RHS, Instruction::LShr > m_LShr(const LHS &L, const RHS &R)
CmpClass_match< LHS, RHS, ICmpInst > m_ICmp(CmpPredicate &Pred, const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::Shl > m_Shl(const LHS &L, const RHS &R)
auto m_Undef()
Match an arbitrary undef constant.
CastInst_match< OpTy, SExtInst > m_SExt(const OpTy &Op)
Matches SExt.
is_zero m_Zero()
Match any null constant or a vector with all elements equal to 0.
auto m_ConstantInt()
Match an arbitrary ConstantInt and ignore it.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
LLVM_ABI bool haveNoCommonBitsSet(const WithCache< const Value * > &LHSCache, const WithCache< const Value * > &RHSCache, const SimplifyQuery &SQ)
Return true if LHS and RHS have no common bits set.
LLVM_ABI KnownFPClass computeKnownFPClass(const Value *V, const APInt &DemandedElts, FPClassTest InterestedClasses, const SimplifyQuery &SQ, unsigned Depth=0)
Determine which floating-point classes are valid for V, and return them in KnownFPClass bit sets.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
LLVM_ABI void computeKnownBitsFromContext(const Value *V, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Merge bits known from context-dependent facts into Known.
@ Known
Known to have no common set bits.
@ Undef
Value of the register doesn't matter.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
int countr_one(T Value)
Count the number of ones from the least significant bit to the first zero bit.
LLVM_ABI void salvageDebugInfo(const MachineRegisterInfo &MRI, MachineInstr &MI)
Assuming the instruction MI is going to be deleted, attempt to salvage debug users of MI by writing t...
constexpr T alignDown(U Value, V Align, W Skew=0)
Returns the largest unsigned integer less than or equal to Value and is Skew mod Align.
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
gep_type_iterator gep_type_end(const User *GEP)
constexpr auto equal_to(T &&Arg)
Functor variant of std::equal_to that can be used as a UnaryPredicate in functional algorithms like a...
LLVM_ABI bool isGuaranteedNotToBeUndef(const Value *V, AssumptionCache *AC=nullptr, const Instruction *CtxI=nullptr, const DominatorTree *DT=nullptr, unsigned Depth=0)
Returns true if V cannot be undef, but may be poison.
LLVM_ABI bool cannotOrderStrictlyLess(FPClassTest LHS, FPClassTest RHS, bool OrderedZeroSign=false)
Returns true if all values in LHS must be greater than or equal to those in RHS.
LLVM_ABI bool cannotOrderStrictlyGreater(FPClassTest LHS, FPClassTest RHS, bool OrderedZeroSign=false)
Returns true if all values in LHS must be less than or equal to those in RHS.
constexpr unsigned MaxAnalysisRecursionDepth
LLVM_ABI void adjustKnownBitsForSelectArm(KnownBits &Known, Value *Cond, Value *Arm, bool Invert, const SimplifyQuery &Q, unsigned Depth=0)
Adjust Known for the given select Arm to include information from the select Cond.
LLVM_ABI FPClassTest fneg(FPClassTest Mask)
Return the test mask which returns true if the value's sign bit is flipped.
FPClassTest
Floating-point class tests, supported by 'is_fpclass' intrinsic.
LLVM_ABI void computeKnownBits(const Value *V, KnownBits &Known, const DataLayout &DL, AssumptionCache *AC=nullptr, const Instruction *CxtI=nullptr, const DominatorTree *DT=nullptr, bool UseInstrInfo=true, unsigned Depth=0)
Determine which bits of V are known to be either zero or one and return them in the KnownZero/KnownOn...
LLVM_ABI void adjustKnownFPClassForSelectArm(KnownFPClass &Known, Value *Cond, Value *Arm, bool Invert, const SimplifyQuery &Q, unsigned Depth=0)
Adjust Known for the given select Arm to include information from the select Cond.
LLVM_ABI FPClassTest inverse_fabs(FPClassTest Mask)
Return the test mask which returns true after fabs is applied to the value.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI Constant * ConstantFoldBinaryOpOperands(unsigned Opcode, Constant *LHS, Constant *RHS, const DataLayout &DL)
Attempt to constant fold a binary operation with the specified operands.
constexpr int PoisonMaskElem
LLVM_ABI raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
@ First
Helpers to iterate all locations in the MemoryEffectsBase class.
@ Mul
Product of integers.
@ Xor
Bitwise or logical XOR of integers.
LLVM_ABI FPClassTest unknown_sign(FPClassTest Mask)
Return the test mask which returns true if the value could have the same set of classes,...
DWARFExpression::Operation Op
constexpr unsigned BitWidth
LLVM_ABI KnownBits analyzeKnownBitsFromAndXorOr(const Operator *I, const KnownBits &KnownLHS, const KnownBits &KnownRHS, const SimplifyQuery &SQ, unsigned Depth=0)
Using KnownBits LHS/RHS produce the known bits for logic op (and/xor/or).
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
gep_type_iterator gep_type_begin(const User *GEP)
unsigned Log2(Align A)
Returns the log2 of the alignment.
This struct is a compact representation of a valid (non-zero power of two) alignment.
Represent subnormal handling kind for floating point instruction inputs and outputs.
static constexpr DenormalMode getPreserveSign()
static constexpr DenormalMode getIEEE()
static KnownBits makeConstant(const APInt &C)
Create known bits from a known constant.
KnownBits anyextOrTrunc(unsigned BitWidth) const
Return known bits for an "any" extension or truncation of the value we're tracking.
bool isNonNegative() const
Returns true if this value is known to be non-negative.
void makeNonNegative()
Make this value non-negative.
static LLVM_ABI KnownBits ashr(const KnownBits &LHS, const KnownBits &RHS, bool ShAmtNonZero=false, bool Exact=false)
Compute known bits for ashr(LHS, RHS).
unsigned getBitWidth() const
Get the bit width of this value.
static KnownBits add(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false, bool SelfAdd=false)
Compute knownbits resulting from addition of LHS and RHS.
KnownBits sext(unsigned BitWidth) const
Return known bits for a sign extension of the value we're tracking.
KnownBits zextOrTrunc(unsigned BitWidth) const
Return known bits for a zero extension or truncation of the value we're tracking.
APInt getMaxValue() const
Return the maximal unsigned value possible given these KnownBits.
static LLVM_ABI KnownBits srem(const KnownBits &LHS, const KnownBits &RHS)
Compute known bits for srem(LHS, RHS).
static LLVM_ABI KnownBits udiv(const KnownBits &LHS, const KnownBits &RHS, bool Exact=false)
Compute known bits for udiv(LHS, RHS).
bool isNegative() const
Returns true if this value is known to be negative.
static KnownBits sub(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false)
Compute knownbits resulting from subtraction of LHS and RHS.
static LLVM_ABI KnownBits shl(const KnownBits &LHS, const KnownBits &RHS, bool NUW=false, bool NSW=false, bool ShAmtNonZero=false)
Compute known bits for shl(LHS, RHS).
bool isKnownNeverInfOrNaN() const
Return true if it's known this can never be an infinity or nan.
bool isKnownNeverInfinity() const
Return true if it's known this can never be an infinity.
static constexpr FPClassTest OrderedGreaterThanZeroMask
static constexpr FPClassTest OrderedLessThanZeroMask
void knownNot(FPClassTest RuleOut)
static LLVM_ABI KnownFPClass fmul(const KnownFPClass &LHS, const KnownFPClass &RHS, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fmul.
static LLVM_ABI KnownFPClass fadd_self(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fadd x, x.
void copysign(const KnownFPClass &Sign)
static KnownFPClass square(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
static LLVM_ABI KnownFPClass fsub(const KnownFPClass &LHS, const KnownFPClass &RHS, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fsub.
bool isKnownNeverSubnormal() const
Return true if it's known this can never be a subnormal.
bool isKnownAlways(FPClassTest Mask) const
static LLVM_ABI KnownFPClass canonicalize(const KnownFPClass &Src, DenormalMode DenormMode=DenormalMode::getDynamic())
Apply the canonicalize intrinsic to this value.
LLVM_ABI bool isKnownNeverLogicalZero(DenormalMode Mode) const
Return true if it's known this can never be interpreted as a zero.
static LLVM_ABI KnownFPClass log(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
Propagate known class for log/log2/log10.
static LLVM_ABI KnownFPClass fdiv(const KnownFPClass &LHS, const KnownFPClass &RHS, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fdiv.
static LLVM_ABI KnownFPClass roundToIntegral(const KnownFPClass &Src, bool IsTrunc, bool IsMultiUnitFPType)
Propagate known class for rounding intrinsics (trunc, floor, ceil, rint, nearbyint,...
static LLVM_ABI KnownFPClass minMaxLike(const KnownFPClass &LHS, const KnownFPClass &RHS, MinMaxKind Kind, DenormalMode DenormMode=DenormalMode::getDynamic())
KnownFPClass intersectWith(const KnownFPClass &RHS) const
static LLVM_ABI KnownFPClass exp(const KnownFPClass &Src)
Report known values for exp, exp2 and exp10.
static LLVM_ABI KnownFPClass frexp_mant(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
Propagate known class for mantissa component of frexp.
bool isKnownNeverNaN() const
Return true if it's known this can never be a nan.
bool isKnownNever(FPClassTest Mask) const
Return true if it's known this can never be one of the mask entries.
std::optional< bool > getSignBit() const
std::nullopt if the sign bit is unknown, true if the sign bit is definitely set or false if the sign ...
static LLVM_ABI KnownFPClass fpext(const KnownFPClass &KnownSrc, const fltSemantics &DstTy, const fltSemantics &SrcTy)
Propagate known class for fpext.
FPClassTest getKnownFPClasses() const
Floating-point classes the value could be one of.
static LLVM_ABI KnownFPClass fma(const KnownFPClass &LHS, const KnownFPClass &RHS, const KnownFPClass &Addend, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fma.
static LLVM_ABI KnownFPClass fptrunc(const KnownFPClass &KnownSrc)
Propagate known class for fptrunc.
static LLVM_ABI KnownFPClass sqrt(const KnownFPClass &Src, DenormalMode Mode=DenormalMode::getDynamic())
Propagate known class for sqrt.
LLVM_ABI bool isKnownNeverLogicalPosZero(DenormalMode Mode) const
Return true if it's known this can never be interpreted as a positive zero.
bool cannotBeOrderedGreaterEqZero(DenormalMode Mode) const
Return true if it's know this can never be a negative value or a logical 0.
static LLVM_ABI KnownFPClass fadd(const KnownFPClass &LHS, const KnownFPClass &RHS, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fadd.
LLVM_ABI bool isKnownNeverLogicalNegZero(DenormalMode Mode) const
Return true if it's known this can never be interpreted as a negative zero.
static LLVM_ABI KnownFPClass fma_square(const KnownFPClass &Squared, const KnownFPClass &Addend, DenormalMode Mode=DenormalMode::getDynamic())
Report known values for fma squared, squared, addend.
static LLVM_ABI KnownFPClass ldexp(const KnownFPClass &Src, const APInt &ConstantRangeMin, const APInt &ConstantRangeMax, const fltSemantics &Flt, DenormalMode Mode=DenormalMode::getDynamic())
Propagate known class for ldexp, assuming the exponent is known to be within [ConstantRangeMin,...
SimplifyQuery getWithInstruction(const Instruction *I) const