26#define DEBUG_TYPE "instcombine"
30 cl::desc(
"Verify that computeKnownBits() and "
31 "SimplifyDemandedBits() are consistent"),
35 "instcombine-simplify-vector-elts-depth",
37 "Depth limit when simplifying vector instructions and their operands"),
44 const APInt &Demanded) {
46 assert(OpNo < I->getNumOperands() &&
"Operand index too large");
55 if (
C->isSubsetOf(Demanded))
59 I->setOperand(OpNo, ConstantInt::get(
Op->getType(), *
C & Demanded));
71 const APInt &DemandedMask,
74 assert(
I->getOpcode() == Instruction::LShr &&
75 "Only lshr instruction supported");
79 if (!
match(
I->getOperand(0),
89 if (DemandedBitWidth > ShlAmt)
93 if (
Upper->getType()->getScalarSizeInBits() < ShlAmt + DemandedBitWidth)
100 Value *ShrAmt =
I->getOperand(1);
105 if (~KnownShrBits.
Zero != ShlAmt)
122 if (
unsigned BitWidth = Ty->getScalarSizeInBits())
125 return DL.getPointerTypeSizeInBits(Ty);
134 SQ.getWithInstruction(&Inst));
135 if (!V)
return false;
136 if (V == &Inst)
return true;
152 const APInt &DemandedMask,
156 Use &U =
I->getOperandUse(OpNo);
164 if (DemandedMask.
isZero()) {
189 if (!NewVal)
return false;
221 const APInt &DemandedMask,
225 assert(
I !=
nullptr &&
"Null pointer of Value???");
228 Type *VTy =
I->getType();
232 "Value *V, DemandedMask and Known must have same BitWidth");
238 auto disableWrapFlagsBasedOnUnusedHighBits = [](
Instruction *
I,
244 I->setHasNoSignedWrap(
false);
245 I->setHasNoUnsignedWrap(
false);
252 auto simplifyOperandsBasedOnUnusedHighBits = [&](
APInt &DemandedFromOps) {
261 disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
267 switch (
I->getOpcode()) {
271 case Instruction::And: {
289 return I->getOperand(0);
291 return I->getOperand(1);
299 case Instruction::Or: {
305 I->dropPoisonGeneratingFlags();
320 return I->getOperand(0);
322 return I->getOperand(1);
331 RHSCache(
I->getOperand(1), RHSKnown);
340 case Instruction::Xor: {
345 if (DemandedMask == 1 &&
352 return Builder.CreateUnaryIntrinsic(Intrinsic::ctpop,
Xor);
366 return I->getOperand(0);
368 return I->getOperand(1);
375 BinaryOperator::CreateOr(
I->getOperand(0),
I->getOperand(1));
389 ~RHSKnown.
One & DemandedMask);
399 if ((*
C | ~DemandedMask).isAllOnes()) {
415 if (LHSInst->getOpcode() == Instruction::And && LHSInst->hasOneUse() &&
418 (LHSKnown.One & RHSKnown.
One & DemandedMask) != 0) {
419 APInt NewMask = ~(LHSKnown.One & RHSKnown.
One & DemandedMask);
422 Instruction *NewAnd = BinaryOperator::CreateAnd(
I->getOperand(0), AndC);
426 Instruction *NewXor = BinaryOperator::CreateXor(NewAnd, XorC);
432 case Instruction::Select: {
442 auto CanonicalizeSelectConstant = [](
Instruction *
I,
unsigned OpNo,
443 const APInt &DemandedMask) {
463 if ((*CmpC & DemandedMask) == (*SelC & DemandedMask)) {
464 I->setOperand(OpNo, ConstantInt::get(
I->getType(), *CmpC));
469 if (CanonicalizeSelectConstant(
I, 1, DemandedMask) ||
470 CanonicalizeSelectConstant(
I, 2, DemandedMask))
481 case Instruction::Trunc: {
495 return Builder.CreateLShr(Trunc,
C->getZExtValue());
500 case Instruction::ZExt: {
501 unsigned SrcBitWidth =
I->getOperand(0)->getType()->getScalarSizeInBits();
509 I->dropPoisonGeneratingFlags();
513 if (
I->getOpcode() == Instruction::ZExt &&
I->hasNonNeg() &&
520 case Instruction::SExt: {
522 unsigned SrcBitWidth =
I->getOperand(0)->getType()->getScalarSizeInBits();
524 APInt InputDemandedBits = DemandedMask.
trunc(SrcBitWidth);
529 InputDemandedBits.
setBit(SrcBitWidth-1);
550 case Instruction::Add: {
551 if ((DemandedMask & 1) == 0) {
557 X->getType()->isIntOrIntVectorTy(1) &&
X->getType() ==
Y->getType()) {
567 return Builder.CreateSExt(AndNot, VTy);
572 X->getType()->isIntOrIntVectorTy(1) &&
X->getType() ==
Y->getType() &&
573 (
I->getOperand(0)->hasOneUse() ||
I->getOperand(1)->hasOneUse())) {
594 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
600 APInt DemandedFromLHS = DemandedFromOps;
604 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
609 return I->getOperand(0);
610 if (DemandedFromOps.
isSubsetOf(LHSKnown.Zero))
611 return I->getOperand(1);
620 return Builder.CreateXor(
I->getOperand(0), ConstantInt::get(VTy, *
C));
630 case Instruction::Sub: {
637 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
643 APInt DemandedFromLHS = DemandedFromOps;
647 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
652 return I->getOperand(0);
655 if (DemandedFromOps.
isOne() && DemandedFromOps.
isSubsetOf(LHSKnown.Zero))
656 return I->getOperand(1);
664 return Builder.CreateNot(
I->getOperand(1));
673 case Instruction::Mul: {
674 APInt DemandedFromOps;
675 if (simplifyOperandsBasedOnUnusedHighBits(DemandedFromOps))
685 Constant *ShiftC = ConstantInt::get(VTy, CTZ);
686 Instruction *Shl = BinaryOperator::CreateShl(
I->getOperand(0), ShiftC);
693 if (
I->getOperand(0) ==
I->getOperand(1) && DemandedMask.
ult(4)) {
694 Constant *One = ConstantInt::get(VTy, 1);
695 Instruction *And1 = BinaryOperator::CreateAnd(
I->getOperand(0), One);
702 case Instruction::Shl: {
709 DemandedMask, Known))
713 if (
I->hasOneUse()) {
715 if (Inst && Inst->getOpcode() == BinaryOperator::Or) {
717 auto [IID, FShiftArgs] = *Opt;
718 if ((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
719 FShiftArgs[0] == FShiftArgs[1]) {
731 if (
I->hasNoSignedWrap()) {
735 if (SignBits > ShiftAmt && SignBits - ShiftAmt >= NumHiDemandedBits)
736 return I->getOperand(0);
746 Constant *LeftShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
750 LeftShiftAmtC,
DL) ==
C) {
751 Instruction *Lshr = BinaryOperator::CreateLShr(NewC,
X);
757 APInt DemandedMaskIn(DemandedMask.
lshr(ShiftAmt));
781 I->dropPoisonGeneratingFlags();
789 case Instruction::LShr: {
795 if (
I->hasOneUse()) {
797 if (Inst && Inst->getOpcode() == BinaryOperator::Or) {
799 auto [IID, FShiftArgs] = *Opt;
800 if ((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
801 FShiftArgs[0] == FShiftArgs[1]) {
817 if (SignBits >= NumHiDemandedBits)
818 return I->getOperand(0);
827 Constant *RightShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
831 RightShiftAmtC,
DL) ==
C) {
838 if (
match(
I->getOperand(0),
842 X, ConstantInt::get(
X->getType(), Factor->
lshr(ShiftAmt)));
848 APInt DemandedMaskIn(DemandedMask.
shl(ShiftAmt));
851 I->dropPoisonGeneratingFlags();
866 case Instruction::AShr: {
872 if (SignBits >= NumHiDemandedBits)
873 return I->getOperand(0);
879 if (DemandedMask.
isOne()) {
882 I->getOperand(0),
I->getOperand(1),
I->getName());
891 APInt DemandedMaskIn(DemandedMask.
shl(ShiftAmt));
894 bool ShiftedInBitsDemanded = DemandedMask.
countl_zero() < ShiftAmt;
895 if (ShiftedInBitsDemanded)
899 I->dropPoisonGeneratingFlags();
905 if (Known.
Zero[
BitWidth - 1] || !ShiftedInBitsDemanded) {
915 ShiftAmt != 0,
I->isExact());
921 case Instruction::UDiv: {
927 APInt DemandedMaskIn =
932 I->dropPoisonGeneratingFlags();
943 case Instruction::SRem: {
946 if (DemandedMask.
ult(*Rem))
947 return I->getOperand(0);
949 APInt LowBits = *Rem - 1;
960 case Instruction::Call: {
961 bool KnownBitsComputed =
false;
963 switch (
II->getIntrinsicID()) {
964 case Intrinsic::abs: {
965 if (DemandedMask == 1)
966 return II->getArgOperand(0);
969 case Intrinsic::ctpop: {
977 II->getModule(), Intrinsic::ctpop, VTy);
982 case Intrinsic::bswap: {
999 NewVal = BinaryOperator::CreateLShr(
1000 II->getArgOperand(0), ConstantInt::get(VTy, NLZ - NTZ));
1002 NewVal = BinaryOperator::CreateShl(
1003 II->getArgOperand(0), ConstantInt::get(VTy, NTZ - NLZ));
1009 case Intrinsic::ptrmask: {
1010 unsigned MaskWidth =
I->getOperand(1)->getType()->getScalarSizeInBits();
1015 I, 1, (DemandedMask & ~LHSKnown.Zero).zextOrTrunc(MaskWidth),
1016 RHSKnown, Q,
Depth + 1))
1022 Known = LHSKnown & RHSKnown;
1023 KnownBitsComputed =
true;
1038 if (DemandedMask.
isSubsetOf(RHSKnown.One | LHSKnown.Zero))
1039 return I->getOperand(0);
1043 I, 1, (DemandedMask & ~LHSKnown.Zero).zextOrTrunc(MaskWidth)))
1058 if (!LHSKnown.isZero()) {
1059 const unsigned trailingZeros = LHSKnown.countMinTrailingZeros();
1062 uint64_t HighBitsGEPIndex = GEPIndex & ~PointerAlignBits;
1064 GEPIndex & PointerAlignBits & PtrMaskImmediate;
1066 uint64_t MaskedGEPIndex = HighBitsGEPIndex | MaskedLowBitsGEPIndex;
1068 if (MaskedGEPIndex != GEPIndex) {
1071 Type *GEPIndexType =
1072 DL.getIndexType(
GEP->getPointerOperand()->getType());
1074 GEP->getSourceElementType(), InnerPtr,
1075 ConstantInt::get(GEPIndexType, MaskedGEPIndex),
1076 GEP->getName(),
GEP->isInBounds());
1087 case Intrinsic::fshr:
1088 case Intrinsic::fshl: {
1096 if (
II->getIntrinsicID() == Intrinsic::fshr)
1099 APInt DemandedMaskLHS(DemandedMask.
lshr(ShiftAmt));
1101 if (
I->getOperand(0) !=
I->getOperand(1)) {
1107 I->dropPoisonGeneratingReturnAttributes();
1114 if (DemandedMaskLHS.
isSubsetOf(LHSKnown.Zero | LHSKnown.One) &&
1128 LHSKnown <<= ShiftAmt;
1131 KnownBitsComputed =
true;
1134 case Intrinsic::umax: {
1141 CTZ >=
C->getActiveBits())
1142 return II->getArgOperand(0);
1145 case Intrinsic::umin: {
1153 CTZ >=
C->getBitWidth() -
C->countl_one())
1154 return II->getArgOperand(0);
1160 *
II, DemandedMask, Known, KnownBitsComputed);
1168 if (!KnownBitsComputed)
1174 if (
I->getType()->isPointerTy()) {
1175 Align Alignment =
I->getPointerAlignment(
DL);
1183 if (!
I->getType()->isPointerTy() &&
1189 if (Known != ReferenceKnown) {
1190 errs() <<
"Mismatched known bits for " << *
I <<
" in "
1191 <<
I->getFunction()->getName() <<
"\n";
1192 errs() <<
"computeKnownBits(): " << ReferenceKnown <<
"\n";
1193 errs() <<
"SimplifyDemandedBits(): " << Known <<
"\n";
1208 Type *ITy =
I->getType();
1217 switch (
I->getOpcode()) {
1218 case Instruction::And: {
1233 return I->getOperand(0);
1235 return I->getOperand(1);
1239 case Instruction::Or: {
1256 return I->getOperand(0);
1258 return I->getOperand(1);
1262 case Instruction::Xor: {
1278 return I->getOperand(0);
1280 return I->getOperand(1);
1284 case Instruction::Add: {
1292 return I->getOperand(0);
1296 return I->getOperand(1);
1304 case Instruction::Sub: {
1312 return I->getOperand(0);
1321 case Instruction::AShr: {
1334 const APInt *ShiftRC;
1335 const APInt *ShiftLC;
1383 if (!ShlOp1 || !ShrOp1)
1388 unsigned BitWidth = Ty->getScalarSizeInBits();
1397 Known.
Zero &= DemandedMask;
1402 bool isLshr = (Shr->
getOpcode() == Instruction::LShr);
1403 BitMask1 = isLshr ? (BitMask1.
lshr(ShrAmt) << ShlAmt) :
1404 (BitMask1.
ashr(ShrAmt) << ShlAmt);
1406 if (ShrAmt <= ShlAmt) {
1407 BitMask2 <<= (ShlAmt - ShrAmt);
1409 BitMask2 = isLshr ? BitMask2.
lshr(ShrAmt - ShlAmt):
1410 BitMask2.
ashr(ShrAmt - ShlAmt);
1414 if ((BitMask1 & DemandedMask) == (BitMask2 & DemandedMask)) {
1415 if (ShrAmt == ShlAmt)
1422 if (ShrAmt < ShlAmt) {
1424 New = BinaryOperator::CreateShl(VarX, Amt);
1430 New = isLshr ? BinaryOperator::CreateLShr(VarX, Amt) :
1431 BinaryOperator::CreateAShr(VarX, Amt);
1433 New->setIsExact(
true);
1459 bool AllowMultipleUsers) {
1467 assert((DemandedElts & ~EltMask) == 0 &&
"Invalid DemandedElts!");
1471 PoisonElts = EltMask;
1475 if (DemandedElts.
isZero()) {
1476 PoisonElts = EltMask;
1491 for (
unsigned i = 0; i != VWidth; ++i) {
1492 if (!DemandedElts[i]) {
1498 Constant *Elt =
C->getAggregateElement(i);
1499 if (!Elt)
return nullptr;
1508 return NewCV !=
C ? NewCV :
nullptr;
1515 if (!AllowMultipleUsers) {
1519 if (!V->hasOneUse()) {
1528 DemandedElts = EltMask;
1533 if (!
I)
return nullptr;
1535 bool MadeChange =
false;
1536 auto simplifyAndSetOp = [&](
Instruction *Inst,
unsigned OpNum,
1546 APInt PoisonElts2(VWidth, 0);
1547 APInt PoisonElts3(VWidth, 0);
1548 switch (
I->getOpcode()) {
1551 case Instruction::GetElementPtr: {
1569 for (
unsigned i = 0; i <
I->getNumOperands(); i++) {
1573 PoisonElts = EltMask;
1576 if (
I->getOperand(i)->getType()->isVectorTy()) {
1577 APInt PoisonEltsOp(VWidth, 0);
1578 simplifyAndSetOp(
I, i, DemandedElts, PoisonEltsOp);
1583 PoisonElts |= PoisonEltsOp;
1589 case Instruction::InsertElement: {
1596 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts2);
1603 APInt PreInsertDemandedElts = DemandedElts;
1605 PreInsertDemandedElts.
clearBit(IdxNo);
1613 if (PreInsertDemandedElts == 0 &&
1620 simplifyAndSetOp(
I, 0, PreInsertDemandedElts, PoisonElts);
1624 if (IdxNo >= VWidth || !DemandedElts[IdxNo]) {
1626 return I->getOperand(0);
1633 case Instruction::ShuffleVector: {
1635 assert(Shuffle->getOperand(0)->getType() ==
1636 Shuffle->getOperand(1)->getType() &&
1637 "Expected shuffle operands to have same type");
1642 if (
all_of(Shuffle->getShuffleMask(), [](
int Elt) { return Elt == 0; }) &&
1648 APInt LeftDemanded(OpWidth, 1);
1649 APInt LHSPoisonElts(OpWidth, 0);
1650 simplifyAndSetOp(
I, 0, LeftDemanded, LHSPoisonElts);
1651 if (LHSPoisonElts[0])
1652 PoisonElts = EltMask;
1658 APInt LeftDemanded(OpWidth, 0), RightDemanded(OpWidth, 0);
1659 for (
unsigned i = 0; i < VWidth; i++) {
1660 if (DemandedElts[i]) {
1661 unsigned MaskVal = Shuffle->getMaskValue(i);
1662 if (MaskVal != -1u) {
1663 assert(MaskVal < OpWidth * 2 &&
1664 "shufflevector mask index out of range!");
1665 if (MaskVal < OpWidth)
1666 LeftDemanded.setBit(MaskVal);
1668 RightDemanded.
setBit(MaskVal - OpWidth);
1673 APInt LHSPoisonElts(OpWidth, 0);
1674 simplifyAndSetOp(
I, 0, LeftDemanded, LHSPoisonElts);
1676 APInt RHSPoisonElts(OpWidth, 0);
1677 simplifyAndSetOp(
I, 1, RightDemanded, RHSPoisonElts);
1690 if (VWidth == OpWidth) {
1691 bool IsIdentityShuffle =
true;
1692 for (
unsigned i = 0; i < VWidth; i++) {
1693 unsigned MaskVal = Shuffle->getMaskValue(i);
1694 if (DemandedElts[i] && i != MaskVal) {
1695 IsIdentityShuffle =
false;
1699 if (IsIdentityShuffle)
1700 return Shuffle->getOperand(0);
1703 bool NewPoisonElts =
false;
1704 unsigned LHSIdx = -1u, LHSValIdx = -1u;
1705 unsigned RHSIdx = -1u, RHSValIdx = -1u;
1706 bool LHSUniform =
true;
1707 bool RHSUniform =
true;
1708 for (
unsigned i = 0; i < VWidth; i++) {
1709 unsigned MaskVal = Shuffle->getMaskValue(i);
1710 if (MaskVal == -1u) {
1712 }
else if (!DemandedElts[i]) {
1713 NewPoisonElts =
true;
1715 }
else if (MaskVal < OpWidth) {
1716 if (LHSPoisonElts[MaskVal]) {
1717 NewPoisonElts =
true;
1720 LHSIdx = LHSIdx == -1u ? i : OpWidth;
1721 LHSValIdx = LHSValIdx == -1u ? MaskVal : OpWidth;
1722 LHSUniform = LHSUniform && (MaskVal == i);
1725 if (RHSPoisonElts[MaskVal - OpWidth]) {
1726 NewPoisonElts =
true;
1729 RHSIdx = RHSIdx == -1u ? i : OpWidth;
1730 RHSValIdx = RHSValIdx == -1u ? MaskVal - OpWidth : OpWidth;
1731 RHSUniform = RHSUniform && (MaskVal - OpWidth == i);
1747 if (LHSIdx < OpWidth && RHSUniform) {
1749 Op = Shuffle->getOperand(1);
1750 Value = CV->getOperand(LHSValIdx);
1754 if (RHSIdx < OpWidth && LHSUniform) {
1756 Op = Shuffle->getOperand(0);
1757 Value = CV->getOperand(RHSValIdx);
1770 if (NewPoisonElts) {
1773 for (
unsigned i = 0; i < VWidth; ++i) {
1777 Elts.
push_back(Shuffle->getMaskValue(i));
1779 Shuffle->setShuffleMask(Elts);
1784 case Instruction::Select: {
1794 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1798 APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts);
1800 for (
unsigned i = 0; i < VWidth; i++) {
1805 DemandedLHS.clearBit(i);
1811 simplifyAndSetOp(
I, 1, DemandedLHS, PoisonElts2);
1812 simplifyAndSetOp(
I, 2, DemandedRHS, PoisonElts3);
1816 PoisonElts = PoisonElts2 & PoisonElts3;
1819 case Instruction::BitCast: {
1824 APInt InputDemandedElts(InVWidth, 0);
1825 PoisonElts2 =
APInt(InVWidth, 0);
1828 if (VWidth == InVWidth) {
1832 InputDemandedElts = DemandedElts;
1833 }
else if ((VWidth % InVWidth) == 0) {
1837 Ratio = VWidth / InVWidth;
1838 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
1839 if (DemandedElts[OutIdx])
1840 InputDemandedElts.
setBit(OutIdx / Ratio);
1841 }
else if ((InVWidth % VWidth) == 0) {
1845 Ratio = InVWidth / VWidth;
1846 for (
unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
1847 if (DemandedElts[InIdx / Ratio])
1848 InputDemandedElts.
setBit(InIdx);
1854 simplifyAndSetOp(
I, 0, InputDemandedElts, PoisonElts2);
1856 if (VWidth == InVWidth) {
1857 PoisonElts = PoisonElts2;
1858 }
else if ((VWidth % InVWidth) == 0) {
1862 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
1863 if (PoisonElts2[OutIdx / Ratio])
1864 PoisonElts.
setBit(OutIdx);
1865 }
else if ((InVWidth % VWidth) == 0) {
1869 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) {
1872 PoisonElts.
setBit(OutIdx);
1879 case Instruction::FPTrunc:
1880 case Instruction::FPExt:
1881 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1884 case Instruction::Call: {
1887 switch (
II->getIntrinsicID()) {
1888 case Intrinsic::masked_gather:
1889 case Intrinsic::masked_load: {
1894 DemandedPassThrough(DemandedElts);
1896 for (
unsigned i = 0; i < VWidth; i++) {
1898 if (CElt->isNullValue())
1899 DemandedPtrs.clearBit(i);
1900 else if (CElt->isAllOnesValue())
1906 if (
II->getIntrinsicID() == Intrinsic::masked_gather)
1907 simplifyAndSetOp(
II, 0, DemandedPtrs, PoisonElts2);
1908 simplifyAndSetOp(
II, 3, DemandedPassThrough, PoisonElts3);
1912 PoisonElts = PoisonElts2 & PoisonElts3;
1918 *
II, DemandedElts, PoisonElts, PoisonElts2, PoisonElts3,
1952 if (DemandedElts == 1 && !
X->hasOneUse() && !
Y->hasOneUse() &&
1955 auto findShufBO = [&](
bool MatchShufAsOp0) ->
User * {
1960 Value *OtherOp = MatchShufAsOp0 ?
Y :
X;
1965 Value *ShufOp = MatchShufAsOp0 ?
X :
Y;
1976 if (
DT.dominates(U,
I))
1982 if (
User *ShufBO = findShufBO(
true))
1984 if (
User *ShufBO = findShufBO(
false))
1988 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1989 simplifyAndSetOp(
I, 1, DemandedElts, PoisonElts2);
1993 PoisonElts &= PoisonElts2;
2001 return MadeChange ?
I :
nullptr;
2014 if (Ty->isAggregateType())
2035 Type *VTy = V->getType();
2039 if (DemandedMask ==
fcNone)
2049 Value *FoldedToConst =
2051 return FoldedToConst == V ? nullptr : FoldedToConst;
2054 if (!
I->hasOneUse())
2058 if (FPOp->hasNoNaNs())
2060 if (FPOp->hasNoInfs())
2063 switch (
I->getOpcode()) {
2064 case Instruction::FNeg: {
2071 case Instruction::Call: {
2074 case Intrinsic::fabs:
2080 case Intrinsic::arithmetic_fence:
2084 case Intrinsic::copysign: {
2090 if ((DemandedMask &
fcNegative) == DemandedMask) {
2092 I->setOperand(1, ConstantFP::get(VTy, -1.0));
2096 if ((DemandedMask &
fcPositive) == DemandedMask) {
2114 case Instruction::Select: {
2121 return I->getOperand(2);
2123 return I->getOperand(1);
2126 Known = KnownLHS | KnownRHS;
2141 Use &U =
I->getOperandUse(OpNo);
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
AMDGPU Register Bank Select
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file provides internal interfaces used to implement the InstCombine.
static cl::opt< unsigned > SimplifyDemandedVectorEltsDepthLimit("instcombine-simplify-vector-elts-depth", cl::desc("Depth limit when simplifying vector instructions and their operands"), cl::Hidden, cl::init(10))
static Constant * getFPClassConstant(Type *Ty, FPClassTest Mask)
For floating-point classes that resolve to a single bit pattern, return that value.
static cl::opt< bool > VerifyKnownBits("instcombine-verify-known-bits", cl::desc("Verify that computeKnownBits() and " "SimplifyDemandedBits() are consistent"), cl::Hidden, cl::init(false))
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
static bool ShrinkDemandedConstant(Instruction *I, unsigned OpNo, const APInt &Demanded)
Check to see if the specified operand of the specified instruction is a constant integer.
static Value * simplifyShiftSelectingPackedElement(Instruction *I, const APInt &DemandedMask, InstCombinerImpl &IC, unsigned Depth)
Let N = 2 * M.
This file provides the interface for the instcombine pass implementation.
uint64_t IntrinsicInst * II
This file contains the declarations for profiling metadata utility functions.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
Class for arbitrary precision integers.
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
void clearBit(unsigned BitPosition)
Set a given bit to 0.
static APInt getSignMask(unsigned BitWidth)
Get the SignMask for a specific bit width.
uint64_t getZExtValue() const
Get zero extended value.
void setHighBits(unsigned hiBits)
Set the top hiBits bits.
unsigned popcount() const
Count the number of bits set.
LLVM_ABI APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
unsigned getActiveBits() const
Compute the number of active bits in the value.
LLVM_ABI APInt trunc(unsigned width) const
Truncate to new width.
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
bool isAllOnes() const
Determine if all bits are set. This is true for zero-width values.
bool isZero() const
Determine if this value is zero, i.e. all bits are clear.
LLVM_ABI APInt urem(const APInt &RHS) const
Unsigned remainder operation.
void setSignBit()
Set the sign bit to 1.
unsigned getBitWidth() const
Return the number of bits in the APInt.
bool ult(const APInt &RHS) const
Unsigned less than comparison.
void clearAllBits()
Set every bit to 0.
unsigned countr_zero() const
Count the number of trailing zero bits.
unsigned countl_zero() const
The APInt version of std::countl_zero.
void clearLowBits(unsigned loBits)
Set bottom loBits bits to 0.
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
APInt ashr(unsigned ShiftAmt) const
Arithmetic right-shift function.
APInt shl(unsigned shiftAmt) const
Left-shift function.
bool isSubsetOf(const APInt &RHS) const
This operation checks that all bits set in this APInt are also set in RHS.
bool isPowerOf2() const
Check if this APInt's value is a power of two greater than zero.
static APInt getLowBitsSet(unsigned numBits, unsigned loBitsSet)
Constructs an APInt value that has the bottom loBitsSet bits set.
static APInt getHighBitsSet(unsigned numBits, unsigned hiBitsSet)
Constructs an APInt value that has the top hiBitsSet bits set.
void setLowBits(unsigned loBits)
Set the bottom loBits bits.
bool isIntN(unsigned N) const
Check if this APInt has an N-bits unsigned integer value.
bool isOne() const
Determine if this is a value of 1.
APInt lshr(unsigned shiftAmt) const
Logical right-shift function.
bool uge(const APInt &RHS) const
Unsigned greater or equal comparison.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
BinaryOps getOpcode() const
LLVM_ABI Intrinsic::ID getIntrinsicID() const
Returns the intrinsic ID of the intrinsic called or Intrinsic::not_intrinsic if the called function i...
This class represents a function call, abstracting a target machine's calling convention.
static CallInst * Create(FunctionType *Ty, Value *F, const Twine &NameStr="", InsertPosition InsertBefore=nullptr)
This is the base class for all instructions that perform data casts.
static LLVM_ABI Constant * getInfinity(Type *Ty, bool Negative=false)
static LLVM_ABI Constant * getZero(Type *Ty, bool Negative=false)
This is the shared class of boolean and integer constants.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
const APInt & getValue() const
Return the constant as an APInt value reference.
static LLVM_ABI Constant * get(ArrayRef< Constant * > V)
This is an important base class in LLVM.
static LLVM_ABI Constant * getIntegerValue(Type *Ty, const APInt &V)
Return the value for an integer or pointer constant, or a vector thereof, with the given scalar value...
static LLVM_ABI Constant * getAllOnesValue(Type *Ty)
LLVM_ABI bool isOneValue() const
Returns true if the value is one.
static LLVM_ABI Constant * getNullValue(Type *Ty)
Constructor to create a '0' constant of arbitrary type.
LLVM_ABI Constant * getAggregateElement(unsigned Elt) const
For aggregates (struct/array/vector) return the constant that corresponds to the specified element if...
LLVM_ABI bool isNullValue() const
Return true if this is the value that would be returned by getNullValue.
A parsed version of the target data layout string in and methods for querying it.
an instruction for type-safe pointer arithmetic to access elements of arrays and structs
Value * CreateICmpEQ(Value *LHS, Value *RHS, const Twine &Name="")
InstTy * Insert(InstTy *I, const Twine &Name="") const
Insert and return the specified instruction.
static InsertElementInst * Create(Value *Vec, Value *NewElt, Value *Idx, const Twine &NameStr="", InsertPosition InsertBefore=nullptr)
KnownFPClass computeKnownFPClass(Value *Val, FastMathFlags FMF, FPClassTest Interested=fcAllFlags, const Instruction *CtxI=nullptr, unsigned Depth=0) const
Value * SimplifyDemandedVectorElts(Value *V, APInt DemandedElts, APInt &PoisonElts, unsigned Depth=0, bool AllowMultipleUsers=false) override
The specified value produces a vector with any number of elements.
bool SimplifyDemandedBits(Instruction *I, unsigned Op, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0) override
This form of SimplifyDemandedBits simplifies the specified instruction operand if possible,...
SelectInst * createSelectInstWithUnknownProfile(Value *C, Value *S1, Value *S2, const Twine &NameStr="", InsertPosition InsertBefore=nullptr)
Create select C, S1, S2.
std::optional< std::pair< Intrinsic::ID, SmallVector< Value *, 3 > > > convertOrOfShiftsToFunnelShift(Instruction &Or)
Value * simplifyShrShlDemandedBits(Instruction *Shr, const APInt &ShrOp1, Instruction *Shl, const APInt &ShlOp1, const APInt &DemandedMask, KnownBits &Known)
Helper routine of SimplifyDemandedUseBits.
Value * SimplifyDemandedUseBits(Instruction *I, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Attempts to replace I with a simpler value based on the demanded bits.
bool SimplifyDemandedFPClass(Instruction *I, unsigned Op, FPClassTest DemandedMask, KnownFPClass &Known, unsigned Depth=0)
bool SimplifyDemandedInstructionBits(Instruction &Inst)
Tries to simplify operands to an integer instruction based on its demanded bits.
Value * SimplifyMultipleUseDemandedBits(Instruction *I, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Helper routine of SimplifyDemandedUseBits.
Value * SimplifyDemandedUseFPClass(Value *V, FPClassTest DemandedMask, KnownFPClass &Known, Instruction *CxtI, unsigned Depth=0)
Attempts to replace V with a simpler value based on the demanded floating-point classes.
unsigned ComputeNumSignBits(const Value *Op, const Instruction *CxtI=nullptr, unsigned Depth=0) const
Instruction * replaceInstUsesWith(Instruction &I, Value *V)
A combiner-aware RAUW-like routine.
void replaceUse(Use &U, Value *NewValue)
Replace use and add the previously used value to the worklist.
InstructionWorklist & Worklist
A worklist of the instructions that need to be simplified.
Instruction * InsertNewInstWith(Instruction *New, BasicBlock::iterator Old)
Same as InsertNewInstBefore, but also sets the debug loc.
void computeKnownBits(const Value *V, KnownBits &Known, const Instruction *CxtI, unsigned Depth=0) const
std::optional< Value * > targetSimplifyDemandedVectorEltsIntrinsic(IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp)
Instruction * replaceOperand(Instruction &I, unsigned OpNum, Value *V)
Replace operand of instruction and add old operand to the worklist.
std::optional< Value * > targetSimplifyDemandedUseBitsIntrinsic(IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed)
LLVM_ABI bool hasNoUnsignedWrap() const LLVM_READONLY
Determine whether the no unsigned wrap flag is set.
LLVM_ABI bool hasNoSignedWrap() const LLVM_READONLY
Determine whether the no signed wrap flag is set.
LLVM_ABI bool isCommutative() const LLVM_READONLY
Return true if the instruction is commutative:
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
LLVM_ABI void setIsExact(bool b=true)
Set or clear the exact flag on this instruction, which must be an operator which supports this flag.
A wrapper class for inspecting calls to intrinsic functions.
bool hasNoSignedWrap() const
Test whether this operation is known to never undergo signed overflow, aka the nsw property.
bool hasNoUnsignedWrap() const
Test whether this operation is known to never undergo unsigned overflow, aka the nuw property.
static LLVM_ABI PoisonValue * get(Type *T)
Static factory methods - Return an 'poison' object of the specified type.
This class represents the LLVM 'select' instruction.
const Value * getCondition() const
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
The instances of the Type class are immutable: once they are created, they are never changed.
static LLVM_ABI IntegerType * getInt64Ty(LLVMContext &C)
bool isVectorTy() const
True if this is an instance of VectorType.
bool isIntOrIntVectorTy() const
Return true if this is an integer type or a vector of integer types.
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
static LLVM_ABI UndefValue * get(Type *T)
Static factory methods - Return an 'undef' object of the specified type.
A Use represents the edge between a Value definition and its users.
Value * getOperand(unsigned i) const
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
bool hasOneUse() const
Return true if there is exactly one use of this value.
iterator_range< user_iterator > users()
bool hasUseList() const
Check if this Value has a use-list.
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
LLVM_ABI void takeName(Value *V)
Transfer the name from V to this value.
Base class of all SIMD vector types.
This class represents zero extension of integer types.
self_iterator getIterator()
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ C
The default llvm calling convention, compatible with C.
LLVM_ABI Function * getOrInsertDeclaration(Module *M, ID id, ArrayRef< Type * > Tys={})
Look up the Function declaration of the intrinsic id in the Module M.
BinaryOp_match< SrcTy, SpecificConstantMatch, TargetOpcode::G_XOR, true > m_Not(const SrcTy &&Src)
Matches a register not-ed by a G_XOR.
OneUse_match< SubPat > m_OneUse(const SubPat &SP)
class_match< PoisonValue > m_Poison()
Match an arbitrary poison constant.
cst_pred_ty< is_lowbit_mask > m_LowBitMask()
Match an integer or vector with only the low bit(s) set.
PtrAdd_match< PointerOpTy, OffsetOpTy > m_PtrAdd(const PointerOpTy &PointerOp, const OffsetOpTy &OffsetOp)
Matches GEP with i8 source element type.
BinaryOp_match< LHS, RHS, Instruction::Add > m_Add(const LHS &L, const RHS &R)
class_match< BinaryOperator > m_BinOp()
Match an arbitrary binary operation and ignore it.
BinaryOp_match< LHS, RHS, Instruction::AShr > m_AShr(const LHS &L, const RHS &R)
ap_match< APInt > m_APInt(const APInt *&Res)
Match a ConstantInt or splatted ConstantVector, binding the specified pointer to the contained APInt.
specific_intval< false > m_SpecificInt(const APInt &V)
Match a specific integer value or vector with all elements equal to the value.
bool match(Val *V, const Pattern &P)
specificval_ty m_Specific(const Value *V)
Match if we have a specific specified value.
BinOpPred_match< LHS, RHS, is_right_shift_op > m_Shr(const LHS &L, const RHS &R)
Matches logical shift operations.
TwoOps_match< Val_t, Idx_t, Instruction::ExtractElement > m_ExtractElt(const Val_t &Val, const Idx_t &Idx)
Matches ExtractElementInst.
class_match< ConstantInt > m_ConstantInt()
Match an arbitrary ConstantInt and ignore it.
IntrinsicID_match m_Intrinsic()
Match intrinsic calls like this: m_Intrinsic<Intrinsic::fabs>(m_Value(X))
BinaryOp_match< LHS, RHS, Instruction::Mul > m_Mul(const LHS &L, const RHS &R)
TwoOps_match< V1_t, V2_t, Instruction::ShuffleVector > m_Shuffle(const V1_t &v1, const V2_t &v2)
Matches ShuffleVectorInst independently of mask value.
CastInst_match< OpTy, ZExtInst > m_ZExt(const OpTy &Op)
Matches ZExt.
match_immconstant_ty m_ImmConstant()
Match an arbitrary immediate Constant and ignore it.
DisjointOr_match< LHS, RHS, true > m_c_DisjointOr(const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::Add, true > m_c_Add(const LHS &L, const RHS &R)
Matches a Add with LHS and RHS in either order.
class_match< Value > m_Value()
Match an arbitrary value and ignore it.
AnyBinaryOp_match< LHS, RHS, true > m_c_BinOp(const LHS &L, const RHS &R)
Matches a BinaryOperator with LHS and RHS in either order.
BinaryOp_match< LHS, RHS, Instruction::LShr > m_LShr(const LHS &L, const RHS &R)
CmpClass_match< LHS, RHS, ICmpInst > m_ICmp(CmpPredicate &Pred, const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::Shl > m_Shl(const LHS &L, const RHS &R)
auto m_Undef()
Match an arbitrary undef constant.
CastInst_match< OpTy, SExtInst > m_SExt(const OpTy &Op)
Matches SExt.
is_zero m_Zero()
Match any null constant or a vector with all elements equal to 0.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
LLVM_ABI bool haveNoCommonBitsSet(const WithCache< const Value * > &LHSCache, const WithCache< const Value * > &RHSCache, const SimplifyQuery &SQ)
Return true if LHS and RHS have no common bits set.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
LLVM_ABI void computeKnownBitsFromContext(const Value *V, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Merge bits known from context-dependent facts into Known.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
int countr_one(T Value)
Count the number of ones from the least significant bit to the first zero bit.
LLVM_ABI void salvageDebugInfo(const MachineRegisterInfo &MRI, MachineInstr &MI)
Assuming the instruction MI is going to be deleted, attempt to salvage debug users of MI by writing t...
constexpr T alignDown(U Value, V Align, W Skew=0)
Returns the largest unsigned integer less than or equal to Value and is Skew mod Align.
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
gep_type_iterator gep_type_end(const User *GEP)
constexpr unsigned MaxAnalysisRecursionDepth
LLVM_ABI void adjustKnownBitsForSelectArm(KnownBits &Known, Value *Cond, Value *Arm, bool Invert, const SimplifyQuery &Q, unsigned Depth=0)
Adjust Known for the given select Arm to include information from the select Cond.
LLVM_ABI FPClassTest fneg(FPClassTest Mask)
Return the test mask which returns true if the value's sign bit is flipped.
FPClassTest
Floating-point class tests, supported by 'is_fpclass' intrinsic.
LLVM_ABI void computeKnownBits(const Value *V, KnownBits &Known, const DataLayout &DL, AssumptionCache *AC=nullptr, const Instruction *CxtI=nullptr, const DominatorTree *DT=nullptr, bool UseInstrInfo=true, unsigned Depth=0)
Determine which bits of V are known to be either zero or one and return them in the KnownZero/KnownOn...
LLVM_ABI FPClassTest inverse_fabs(FPClassTest Mask)
Return the test mask which returns true after fabs is applied to the value.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI Constant * ConstantFoldBinaryOpOperands(unsigned Opcode, Constant *LHS, Constant *RHS, const DataLayout &DL)
Attempt to constant fold a binary operation with the specified operands.
constexpr int PoisonMaskElem
LLVM_ABI raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
@ Mul
Product of integers.
@ Xor
Bitwise or logical XOR of integers.
LLVM_ABI FPClassTest unknown_sign(FPClassTest Mask)
Return the test mask which returns true if the value could have the same set of classes,...
DWARFExpression::Operation Op
constexpr unsigned BitWidth
LLVM_ABI KnownBits analyzeKnownBitsFromAndXorOr(const Operator *I, const KnownBits &KnownLHS, const KnownBits &KnownRHS, const SimplifyQuery &SQ, unsigned Depth=0)
Using KnownBits LHS/RHS produce the known bits for logic op (and/xor/or).
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
gep_type_iterator gep_type_begin(const User *GEP)
unsigned Log2(Align A)
Returns the log2 of the alignment.
This struct is a compact representation of a valid (non-zero power of two) alignment.
static KnownBits makeConstant(const APInt &C)
Create known bits from a known constant.
KnownBits anyextOrTrunc(unsigned BitWidth) const
Return known bits for an "any" extension or truncation of the value we're tracking.
bool isNonNegative() const
Returns true if this value is known to be non-negative.
void makeNonNegative()
Make this value non-negative.
static LLVM_ABI KnownBits ashr(const KnownBits &LHS, const KnownBits &RHS, bool ShAmtNonZero=false, bool Exact=false)
Compute known bits for ashr(LHS, RHS).
unsigned getBitWidth() const
Get the bit width of this value.
void resetAll()
Resets the known state of all bits.
KnownBits unionWith(const KnownBits &RHS) const
Returns KnownBits information that is known to be true for either this or RHS or both.
KnownBits intersectWith(const KnownBits &RHS) const
Returns KnownBits information that is known to be true for both this and RHS.
KnownBits sext(unsigned BitWidth) const
Return known bits for a sign extension of the value we're tracking.
static KnownBits add(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false)
Compute knownbits resulting from addition of LHS and RHS.
KnownBits zextOrTrunc(unsigned BitWidth) const
Return known bits for a zero extension or truncation of the value we're tracking.
APInt getMaxValue() const
Return the maximal unsigned value possible given these KnownBits.
static LLVM_ABI KnownBits srem(const KnownBits &LHS, const KnownBits &RHS)
Compute known bits for srem(LHS, RHS).
static LLVM_ABI KnownBits udiv(const KnownBits &LHS, const KnownBits &RHS, bool Exact=false)
Compute known bits for udiv(LHS, RHS).
bool isNegative() const
Returns true if this value is known to be negative.
static KnownBits sub(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false)
Compute knownbits resulting from subtraction of LHS and RHS.
static LLVM_ABI KnownBits shl(const KnownBits &LHS, const KnownBits &RHS, bool NUW=false, bool NSW=false, bool ShAmtNonZero=false)
Compute known bits for shl(LHS, RHS).
FPClassTest KnownFPClasses
Floating-point classes the value could be one of.
void copysign(const KnownFPClass &Sign)
bool isKnownNever(FPClassTest Mask) const
Return true if it's known this can never be one of the mask entries.