LLVM 19.0.0git
MipsABIFlags.h
Go to the documentation of this file.
1//===--- MipsABIFlags.h - MIPS ABI flags ----------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the constants for the ABI flags structure contained
10// in the .MIPS.abiflags section.
11//
12// https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_SUPPORT_MIPSABIFLAGS_H
17#define LLVM_SUPPORT_MIPSABIFLAGS_H
18
19namespace llvm {
20namespace Mips {
21
22// Values for the xxx_size bytes of an ABI flags structure.
23enum AFL_REG {
24 AFL_REG_NONE = 0x00, // No registers
25 AFL_REG_32 = 0x01, // 32-bit registers
26 AFL_REG_64 = 0x02, // 64-bit registers
27 AFL_REG_128 = 0x03 // 128-bit registers
28};
29
30// Masks for the ases word of an ABI flags structure.
31enum AFL_ASE {
32 AFL_ASE_DSP = 0x00000001, // DSP ASE
33 AFL_ASE_DSPR2 = 0x00000002, // DSP R2 ASE
34 AFL_ASE_EVA = 0x00000004, // Enhanced VA Scheme
35 AFL_ASE_MCU = 0x00000008, // MCU (MicroController) ASE
36 AFL_ASE_MDMX = 0x00000010, // MDMX ASE
37 AFL_ASE_MIPS3D = 0x00000020, // MIPS-3D ASE
38 AFL_ASE_MT = 0x00000040, // MT ASE
39 AFL_ASE_SMARTMIPS = 0x00000080, // SmartMIPS ASE
40 AFL_ASE_VIRT = 0x00000100, // VZ ASE
41 AFL_ASE_MSA = 0x00000200, // MSA ASE
42 AFL_ASE_MIPS16 = 0x00000400, // MIPS16 ASE
43 AFL_ASE_MICROMIPS = 0x00000800, // MICROMIPS ASE
44 AFL_ASE_XPA = 0x00001000, // XPA ASE
45 AFL_ASE_CRC = 0x00008000, // CRC ASE
46 AFL_ASE_GINV = 0x00020000 // GINV ASE
47};
48
49// Values for the isa_ext word of an ABI flags structure.
50enum AFL_EXT {
51 AFL_EXT_NONE = 0, // None
52 AFL_EXT_XLR = 1, // RMI Xlr instruction
53 AFL_EXT_OCTEON2 = 2, // Cavium Networks Octeon2
54 AFL_EXT_OCTEONP = 3, // Cavium Networks OcteonP
55 AFL_EXT_LOONGSON_3A = 4, // Loongson 3A
56 AFL_EXT_OCTEON = 5, // Cavium Networks Octeon
57 AFL_EXT_5900 = 6, // MIPS R5900 instruction
58 AFL_EXT_4650 = 7, // MIPS R4650 instruction
59 AFL_EXT_4010 = 8, // LSI R4010 instruction
60 AFL_EXT_4100 = 9, // NEC VR4100 instruction
61 AFL_EXT_3900 = 10, // Toshiba R3900 instruction
62 AFL_EXT_10000 = 11, // MIPS R10000 instruction
63 AFL_EXT_SB1 = 12, // Broadcom SB-1 instruction
64 AFL_EXT_4111 = 13, // NEC VR4111/VR4181 instruction
65 AFL_EXT_4120 = 14, // NEC VR4120 instruction
66 AFL_EXT_5400 = 15, // NEC VR5400 instruction
67 AFL_EXT_5500 = 16, // NEC VR5500 instruction
68 AFL_EXT_LOONGSON_2E = 17, // ST Microelectronics Loongson 2E
69 AFL_EXT_LOONGSON_2F = 18, // ST Microelectronics Loongson 2F
70 AFL_EXT_OCTEON3 = 19 // Cavium Networks Octeon3
71};
72
73// Values for the flags1 word of an ABI flags structure.
75
76// MIPS object attribute tags
77enum {
78 Tag_GNU_MIPS_ABI_FP = 4, // Floating-point ABI used by this object file
79 Tag_GNU_MIPS_ABI_MSA = 8, // MSA ABI used by this object file
80};
81
82// Values for the fp_abi word of an ABI flags structure
83// and for the Tag_GNU_MIPS_ABI_FP attribute tag.
85 Val_GNU_MIPS_ABI_FP_ANY = 0, // not tagged
86 Val_GNU_MIPS_ABI_FP_DOUBLE = 1, // hard float / -mdouble-float
87 Val_GNU_MIPS_ABI_FP_SINGLE = 2, // hard float / -msingle-float
88 Val_GNU_MIPS_ABI_FP_SOFT = 3, // soft float
89 Val_GNU_MIPS_ABI_FP_OLD_64 = 4, // -mips32r2 -mfp64
91 Val_GNU_MIPS_ABI_FP_64 = 6, // -mips32r2 -mfp64
92 Val_GNU_MIPS_ABI_FP_64A = 7 // -mips32r2 -mfp64 -mno-odd-spreg
93};
94
95// Values for the Tag_GNU_MIPS_ABI_MSA attribute tag.
97 Val_GNU_MIPS_ABI_MSA_ANY = 0, // not tagged
98 Val_GNU_MIPS_ABI_MSA_128 = 1 // 128-bit MSA
99};
100}
101}
102
103#endif
@ AFL_ASE_SMARTMIPS
Definition: MipsABIFlags.h:39
@ AFL_ASE_MICROMIPS
Definition: MipsABIFlags.h:43
@ AFL_FLAGS1_ODDSPREG
Definition: MipsABIFlags.h:74
@ AFL_EXT_LOONGSON_2F
Definition: MipsABIFlags.h:69
@ AFL_EXT_LOONGSON_2E
Definition: MipsABIFlags.h:68
@ AFL_EXT_LOONGSON_3A
Definition: MipsABIFlags.h:55
@ Val_GNU_MIPS_ABI_FP_SOFT
Definition: MipsABIFlags.h:88
@ Val_GNU_MIPS_ABI_FP_SINGLE
Definition: MipsABIFlags.h:87
@ Val_GNU_MIPS_ABI_FP_DOUBLE
Definition: MipsABIFlags.h:86
@ Val_GNU_MIPS_ABI_FP_XX
Definition: MipsABIFlags.h:90
@ Val_GNU_MIPS_ABI_FP_OLD_64
Definition: MipsABIFlags.h:89
@ Val_GNU_MIPS_ABI_FP_ANY
Definition: MipsABIFlags.h:85
@ Val_GNU_MIPS_ABI_FP_64A
Definition: MipsABIFlags.h:92
@ Val_GNU_MIPS_ABI_FP_64
Definition: MipsABIFlags.h:91
@ Tag_GNU_MIPS_ABI_FP
Definition: MipsABIFlags.h:78
@ Tag_GNU_MIPS_ABI_MSA
Definition: MipsABIFlags.h:79
@ Val_GNU_MIPS_ABI_MSA_ANY
Definition: MipsABIFlags.h:97
@ Val_GNU_MIPS_ABI_MSA_128
Definition: MipsABIFlags.h:98
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18