LLVM 20.0.0git
MipsMCTargetDesc.cpp
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1//===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file provides Mips specific target descriptions.
10//
11//===----------------------------------------------------------------------===//
12
13#include "MipsMCTargetDesc.h"
14#include "MipsAsmBackend.h"
15#include "MipsBaseInfo.h"
16#include "MipsELFStreamer.h"
17#include "MipsInstPrinter.h"
18#include "MipsMCAsmInfo.h"
19#include "MipsMCNaCl.h"
20#include "MipsTargetStreamer.h"
25#include "llvm/MC/MCInstrInfo.h"
29#include "llvm/MC/MCSymbol.h"
34
35using namespace llvm;
36
37#define GET_INSTRINFO_MC_DESC
38#define ENABLE_INSTR_PREDICATE_VERIFIER
39#include "MipsGenInstrInfo.inc"
40
41#define GET_SUBTARGETINFO_MC_DESC
42#include "MipsGenSubtargetInfo.inc"
43
44#define GET_REGINFO_MC_DESC
45#include "MipsGenRegisterInfo.inc"
46
47/// Select the Mips CPU for the given triple and cpu name.
49 if (CPU.empty() || CPU == "generic") {
50 if (TT.getSubArch() == llvm::Triple::MipsSubArch_r6) {
51 if (TT.isMIPS32())
52 CPU = "mips32r6";
53 else
54 CPU = "mips64r6";
55 } else {
56 if (TT.isMIPS32())
57 CPU = "mips32";
58 else
59 CPU = "mips64";
60 }
61 }
62 return CPU;
63}
64
66 MCInstrInfo *X = new MCInstrInfo();
67 InitMipsMCInstrInfo(X);
68 return X;
69}
70
73 InitMipsMCRegisterInfo(X, Mips::RA);
74 return X;
75}
76
78 StringRef CPU, StringRef FS) {
79 CPU = MIPS_MC::selectMipsCPU(TT, CPU);
80 return createMipsMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
81}
82
84 const Triple &TT,
85 const MCTargetOptions &Options) {
86 MCAsmInfo *MAI = new MipsELFMCAsmInfo(TT, Options);
87
88 unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
90 MAI->addInitialFrameState(Inst);
91
92 return MAI;
93}
94
96 unsigned SyntaxVariant,
97 const MCAsmInfo &MAI,
98 const MCInstrInfo &MII,
99 const MCRegisterInfo &MRI) {
100 return new MipsInstPrinter(MAI, MII, MRI);
101}
102
104 std::unique_ptr<MCAsmBackend> &&MAB,
105 std::unique_ptr<MCObjectWriter> &&OW,
106 std::unique_ptr<MCCodeEmitter> &&Emitter) {
107 MCStreamer *S;
108 if (!T.isOSNaCl())
109 S = createMipsELFStreamer(Context, std::move(MAB), std::move(OW),
110 std::move(Emitter));
111 else
112 S = createMipsNaClELFStreamer(Context, std::move(MAB), std::move(OW),
113 std::move(Emitter));
114 return S;
115}
116
119 MCInstPrinter *InstPrint) {
120 return new MipsTargetAsmStreamer(S, OS);
121}
122
124 return new MipsTargetStreamer(S);
125}
126
127static MCTargetStreamer *
129 return new MipsTargetELFStreamer(S, STI);
130}
131
132namespace {
133
134class MipsMCInstrAnalysis : public MCInstrAnalysis {
135public:
136 MipsMCInstrAnalysis(const MCInstrInfo *Info) : MCInstrAnalysis(Info) {}
137
138 bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
139 uint64_t &Target) const override {
140 unsigned NumOps = Inst.getNumOperands();
141 if (NumOps == 0)
142 return false;
143 switch (Info->get(Inst.getOpcode()).operands()[NumOps - 1].OperandType) {
146 // j, jal, jalx, jals
147 // Absolute branch within the current 256 MB-aligned region
148 uint64_t Region = Addr & ~uint64_t(0xfffffff);
149 Target = Region + Inst.getOperand(NumOps - 1).getImm();
150 return true;
151 }
153 // b, beq ...
154 Target = Addr + Inst.getOperand(NumOps - 1).getImm();
155 return true;
156 default:
157 return false;
158 }
159 }
160};
161}
162
164 return new MipsMCInstrAnalysis(Info);
165}
166
170 // Register the MC asm info.
172
173 // Register the MC instruction info.
175
176 // Register the MC register info.
178
179 // Register the elf streamer.
181
182 // Register the asm target streamer.
184
187
188 // Register the MC subtarget info.
190
191 // Register the MC instruction analyzer.
193
194 // Register the MCInstPrinter.
196
199
200 // Register the asm backend.
202 }
203
204 // Register the MC Code Emitter
207
210}
unsigned const MachineRegisterInfo * MRI
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:128
dxil DXContainer Global Emitter
uint64_t Addr
uint64_t Size
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
static LVOptions Options
Definition: LVOptions.cpp:25
static MCRegisterInfo * createMipsMCRegisterInfo(const Triple &TT)
static MCTargetStreamer * createMipsObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTargetMC()
static MCTargetStreamer * createMipsAsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint)
static MCStreamer * createMCStreamer(const Triple &T, MCContext &Context, std::unique_ptr< MCAsmBackend > &&MAB, std::unique_ptr< MCObjectWriter > &&OW, std::unique_ptr< MCCodeEmitter > &&Emitter)
static MCSubtargetInfo * createMipsMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
static MCInstrInfo * createMipsMCInstrInfo()
static MCInstPrinter * createMipsMCInstPrinter(const Triple &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
static MCTargetStreamer * createMipsNullTargetStreamer(MCStreamer &S)
static MCAsmInfo * createMipsMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT, const MCTargetOptions &Options)
static MCInstrAnalysis * createMipsMCInstrAnalysis(const MCInstrInfo *Info)
raw_pwrite_stream & OS
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:56
void addInitialFrameState(const MCCFIInstruction &Inst)
Definition: MCAsmInfo.cpp:75
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:582
Context object for machine code objects.
Definition: MCContext.h:83
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:46
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:185
unsigned getNumOperands() const
Definition: MCInst.h:209
unsigned getOpcode() const
Definition: MCInst.h:199
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:207
virtual bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size, uint64_t &Target) const
Given a branch instruction try to get the address the branch targets.
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:26
int64_t getImm() const
Definition: MCInst.h:81
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Streaming machine code generation interface.
Definition: MCStreamer.h:213
Generic base class for all target subtargets.
Target specific streamer interface.
Definition: MCStreamer.h:94
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:51
constexpr bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:147
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
@ MipsSubArch_r6
Definition: Triple.h:155
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
@ OPERAND_IMMEDIATE
Definition: MCInstrDesc.h:60
@ OPERAND_UNKNOWN
Definition: MCInstrDesc.h:59
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MCCodeEmitter * createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, MCContext &Ctx)
MCCodeEmitter * createMipsMCCodeEmitterEB(const MCInstrInfo &MCII, MCContext &Ctx)
MCELFStreamer * createMipsELFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > MAB, std::unique_ptr< MCObjectWriter > OW, std::unique_ptr< MCCodeEmitter > Emitter)
Target & getTheMips64Target()
Target & getTheMips64elTarget()
Target & getTheMipselTarget()
MCELFStreamer * createMipsNaClELFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > TAB, std::unique_ptr< MCObjectWriter > OW, std::unique_ptr< MCCodeEmitter > Emitter)
Target & getTheMipsTarget()
MCAsmBackend * createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
RegisterMCAsmInfoFn - Helper template for registering a target assembly info implementation.
static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn)
RegisterMCRegInfo - Register a MCRegisterInfo implementation for the given target.
static void RegisterMCAsmBackend(Target &T, Target::MCAsmBackendCtorTy Fn)
RegisterMCAsmBackend - Register a MCAsmBackend implementation for the given target.
static void RegisterMCCodeEmitter(Target &T, Target::MCCodeEmitterCtorTy Fn)
RegisterMCCodeEmitter - Register a MCCodeEmitter implementation for the given target.
static void RegisterMCSubtargetInfo(Target &T, Target::MCSubtargetInfoCtorFnTy Fn)
RegisterMCSubtargetInfo - Register a MCSubtargetInfo implementation for the given target.
static void RegisterObjectTargetStreamer(Target &T, Target::ObjectTargetStreamerCtorTy Fn)
static void RegisterMCInstrAnalysis(Target &T, Target::MCInstrAnalysisCtorFnTy Fn)
RegisterMCInstrAnalysis - Register a MCInstrAnalysis implementation for the given target.
static void RegisterELFStreamer(Target &T, Target::ELFStreamerCtorTy Fn)
static void RegisterNullTargetStreamer(Target &T, Target::NullTargetStreamerCtorTy Fn)
static void RegisterMCInstPrinter(Target &T, Target::MCInstPrinterCtorTy Fn)
RegisterMCInstPrinter - Register a MCInstPrinter implementation for the given target.
static void RegisterMCInstrInfo(Target &T, Target::MCInstrInfoCtorFnTy Fn)
RegisterMCInstrInfo - Register a MCInstrInfo implementation for the given target.
static void RegisterAsmTargetStreamer(Target &T, Target::AsmTargetStreamerCtorTy Fn)