LLVM 17.0.0git
MipsMCTargetDesc.cpp
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1//===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file provides Mips specific target descriptions.
10//
11//===----------------------------------------------------------------------===//
12
13#include "MipsMCTargetDesc.h"
14#include "MipsAsmBackend.h"
15#include "MipsBaseInfo.h"
16#include "MipsELFStreamer.h"
17#include "MipsInstPrinter.h"
18#include "MipsMCAsmInfo.h"
19#include "MipsMCNaCl.h"
20#include "MipsTargetStreamer.h"
25#include "llvm/MC/MCInstrInfo.h"
29#include "llvm/MC/MCSymbol.h"
35
36using namespace llvm;
37
38#define GET_INSTRINFO_MC_DESC
39#define ENABLE_INSTR_PREDICATE_VERIFIER
40#include "MipsGenInstrInfo.inc"
41
42#define GET_SUBTARGETINFO_MC_DESC
43#include "MipsGenSubtargetInfo.inc"
44
45#define GET_REGINFO_MC_DESC
46#include "MipsGenRegisterInfo.inc"
47
48/// Select the Mips CPU for the given triple and cpu name.
50 if (CPU.empty() || CPU == "generic") {
51 if (TT.getSubArch() == llvm::Triple::MipsSubArch_r6) {
52 if (TT.isMIPS32())
53 CPU = "mips32r6";
54 else
55 CPU = "mips64r6";
56 } else {
57 if (TT.isMIPS32())
58 CPU = "mips32";
59 else
60 CPU = "mips64";
61 }
62 }
63 return CPU;
64}
65
67 MCInstrInfo *X = new MCInstrInfo();
68 InitMipsMCInstrInfo(X);
69 return X;
70}
71
74 InitMipsMCRegisterInfo(X, Mips::RA);
75 return X;
76}
77
79 StringRef CPU, StringRef FS) {
80 CPU = MIPS_MC::selectMipsCPU(TT, CPU);
81 return createMipsMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
82}
83
85 const Triple &TT,
86 const MCTargetOptions &Options) {
87 MCAsmInfo *MAI = new MipsMCAsmInfo(TT, Options);
88
89 unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
91 MAI->addInitialFrameState(Inst);
92
93 return MAI;
94}
95
97 unsigned SyntaxVariant,
98 const MCAsmInfo &MAI,
99 const MCInstrInfo &MII,
100 const MCRegisterInfo &MRI) {
101 return new MipsInstPrinter(MAI, MII, MRI);
102}
103
105 std::unique_ptr<MCAsmBackend> &&MAB,
106 std::unique_ptr<MCObjectWriter> &&OW,
107 std::unique_ptr<MCCodeEmitter> &&Emitter,
108 bool RelaxAll) {
109 MCStreamer *S;
110 if (!T.isOSNaCl())
111 S = createMipsELFStreamer(Context, std::move(MAB), std::move(OW),
112 std::move(Emitter), RelaxAll);
113 else
114 S = createMipsNaClELFStreamer(Context, std::move(MAB), std::move(OW),
115 std::move(Emitter), RelaxAll);
116 return S;
117}
118
121 MCInstPrinter *InstPrint,
122 bool isVerboseAsm) {
123 return new MipsTargetAsmStreamer(S, OS);
124}
125
127 return new MipsTargetStreamer(S);
128}
129
130static MCTargetStreamer *
132 return new MipsTargetELFStreamer(S, STI);
133}
134
135namespace {
136
137class MipsMCInstrAnalysis : public MCInstrAnalysis {
138public:
139 MipsMCInstrAnalysis(const MCInstrInfo *Info) : MCInstrAnalysis(Info) {}
140
141 bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
142 uint64_t &Target) const override {
143 unsigned NumOps = Inst.getNumOperands();
144 if (NumOps == 0)
145 return false;
146 switch (Info->get(Inst.getOpcode()).operands()[NumOps - 1].OperandType) {
149 // j, jal, jalx, jals
150 // Absolute branch within the current 256 MB-aligned region
151 uint64_t Region = Addr & ~uint64_t(0xfffffff);
152 Target = Region + Inst.getOperand(NumOps - 1).getImm();
153 return true;
154 }
156 // b, beq ...
157 Target = Addr + Inst.getOperand(NumOps - 1).getImm();
158 return true;
159 default:
160 return false;
161 }
162 }
163};
164}
165
167 return new MipsMCInstrAnalysis(Info);
168}
169
173 // Register the MC asm info.
175
176 // Register the MC instruction info.
178
179 // Register the MC register info.
181
182 // Register the elf streamer.
184
185 // Register the asm target streamer.
187
190
191 // Register the MC subtarget info.
193
194 // Register the MC instruction analyzer.
196
197 // Register the MCInstPrinter.
199
202
203 // Register the asm backend.
205 }
206
207 // Register the MC Code Emitter
210
213}
unsigned const MachineRegisterInfo * MRI
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:127
dxil DXContainer Global Emitter
uint64_t Addr
uint64_t Size
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
static LVOptions Options
Definition: LVOptions.cpp:25
static MCRegisterInfo * createMipsMCRegisterInfo(const Triple &TT)
static MCTargetStreamer * createMipsObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
static MCStreamer * createMCStreamer(const Triple &T, MCContext &Context, std::unique_ptr< MCAsmBackend > &&MAB, std::unique_ptr< MCObjectWriter > &&OW, std::unique_ptr< MCCodeEmitter > &&Emitter, bool RelaxAll)
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTargetMC()
static MCTargetStreamer * createMipsAsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool isVerboseAsm)
static MCSubtargetInfo * createMipsMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
static MCInstrInfo * createMipsMCInstrInfo()
static MCInstPrinter * createMipsMCInstPrinter(const Triple &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
static MCTargetStreamer * createMipsNullTargetStreamer(MCStreamer &S)
static MCAsmInfo * createMipsMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT, const MCTargetOptions &Options)
static MCInstrAnalysis * createMipsMCInstrAnalysis(const MCInstrInfo *Info)
LLVMContext & Context
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:56
void addInitialFrameState(const MCCFIInstruction &Inst)
Definition: MCAsmInfo.cpp:86
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:540
Context object for machine code objects.
Definition: MCContext.h:76
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:44
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
unsigned getNumOperands() const
Definition: MCInst.h:208
unsigned getOpcode() const
Definition: MCInst.h:198
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:206
virtual bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size, uint64_t &Target) const
Given a branch instruction try to get the address the branch targets.
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:26
int64_t getImm() const
Definition: MCInst.h:80
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Streaming machine code generation interface.
Definition: MCStreamer.h:212
Generic base class for all target subtargets.
Target specific streamer interface.
Definition: MCStreamer.h:93
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
constexpr bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:134
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
@ MipsSubArch_r6
Definition: Triple.h:154
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
@ OPERAND_IMMEDIATE
Definition: MCInstrDesc.h:60
@ OPERAND_UNKNOWN
Definition: MCInstrDesc.h:59
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MCCodeEmitter * createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, MCContext &Ctx)
MCCodeEmitter * createMipsMCCodeEmitterEB(const MCInstrInfo &MCII, MCContext &Ctx)
Target & getTheMips64Target()
MCELFStreamer * createMipsELFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > MAB, std::unique_ptr< MCObjectWriter > OW, std::unique_ptr< MCCodeEmitter > Emitter, bool RelaxAll)
MCELFStreamer * createMipsNaClELFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > TAB, std::unique_ptr< MCObjectWriter > OW, std::unique_ptr< MCCodeEmitter > Emitter, bool RelaxAll)
Target & getTheMips64elTarget()
Target & getTheMipselTarget()
Target & getTheMipsTarget()
MCAsmBackend * createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
RegisterMCAsmInfoFn - Helper template for registering a target assembly info implementation.
static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn)
RegisterMCRegInfo - Register a MCRegisterInfo implementation for the given target.
static void RegisterMCAsmBackend(Target &T, Target::MCAsmBackendCtorTy Fn)
RegisterMCAsmBackend - Register a MCAsmBackend implementation for the given target.
static void RegisterMCCodeEmitter(Target &T, Target::MCCodeEmitterCtorTy Fn)
RegisterMCCodeEmitter - Register a MCCodeEmitter implementation for the given target.
static void RegisterMCSubtargetInfo(Target &T, Target::MCSubtargetInfoCtorFnTy Fn)
RegisterMCSubtargetInfo - Register a MCSubtargetInfo implementation for the given target.
static void RegisterObjectTargetStreamer(Target &T, Target::ObjectTargetStreamerCtorTy Fn)
static void RegisterMCInstrAnalysis(Target &T, Target::MCInstrAnalysisCtorFnTy Fn)
RegisterMCInstrAnalysis - Register a MCInstrAnalysis implementation for the given target.
static void RegisterELFStreamer(Target &T, Target::ELFStreamerCtorTy Fn)
static void RegisterNullTargetStreamer(Target &T, Target::NullTargetStreamerCtorTy Fn)
static void RegisterMCInstPrinter(Target &T, Target::MCInstPrinterCtorTy Fn)
RegisterMCInstPrinter - Register a MCInstPrinter implementation for the given target.
static void RegisterMCInstrInfo(Target &T, Target::MCInstrInfoCtorFnTy Fn)
RegisterMCInstrInfo - Register a MCInstrInfo implementation for the given target.
static void RegisterAsmTargetStreamer(Target &T, Target::AsmTargetStreamerCtorTy Fn)