13#ifndef LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H
14#define LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H
35 unsigned getMSACtrlReg(
const SDValue RegIdx)
const;
39 std::pair<SDNode *, SDNode *> selectMULT(
SDNode *
N,
unsigned Opc,
48 unsigned ShiftAmount)
const;
97 unsigned MinSizeInBits)
const override;
100 unsigned ImmBitSize)
const;
137 bool SelectInlineAsmMemoryOperand(
const SDValue &
Op,
139 std::vector<SDValue> &OutOps)
override;
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
const char LLVMTargetMachineRef TM
Class for arbitrary precision integers.
Represent the analysis usage information of a pass.
This class represents an Operation in the Expression.
Representation of each machine instruction.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
MipsSEDAGToDAGISel(MipsTargetMachine &TM, CodeGenOptLevel OL)
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
This is an optimization pass for GlobalISel generic memory operations.
FunctionPass * createMipsSEISelDag(MipsTargetMachine &TM, CodeGenOptLevel OptLevel)
CodeGenOptLevel
Code generation optimization level.