LLVM 20.0.0git
Public Member Functions | List of all members
llvm::ARCInstrInfo Class Reference

#include "Target/ARC/ARCInstrInfo.h"

Inheritance diagram for llvm::ARCInstrInfo:
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Public Member Functions

 ARCInstrInfo (const ARCSubtarget &)
 
const ARCRegisterInfogetRegisterInfo () const
 
Register isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex) const override
 If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.
 
Register isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex) const override
 If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.
 
unsigned getInstSizeInBytes (const MachineInstr &MI) const override
 
bool analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
 Analyze the branching code at the end of MBB, returning true if it cannot be understood (e.g.
 
unsigned insertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &, int *BytesAdded=nullptr) const override
 
unsigned removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
 
void copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override
 
void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool IsKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
 
void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
 
bool reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override
 Return the inverse opcode of the specified Branch instruction.
 
bool isPostIncrement (const MachineInstr &MI) const override
 
bool isPreIncrement (const MachineInstr &MI) const
 
virtual bool getBaseAndOffsetPosition (const MachineInstr &MI, unsigned &BasePos, unsigned &OffsetPos) const override
 
MachineBasicBlock::iterator loadImmediate (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned Reg, uint64_t Value) const
 

Detailed Description

Definition at line 26 of file ARCInstrInfo.h.

Constructor & Destructor Documentation

◆ ARCInstrInfo()

ARCInstrInfo::ARCInstrInfo ( const ARCSubtarget ST)

Definition at line 46 of file ARCInstrInfo.cpp.

Member Function Documentation

◆ analyzeBranch()

bool ARCInstrInfo::analyzeBranch ( MachineBasicBlock MBB,
MachineBasicBlock *&  TBB,
MachineBasicBlock *&  FBB,
SmallVectorImpl< MachineOperand > &  Cond,
bool  AllowModify 
) const
override

Analyze the branching code at the end of MBB, returning true if it cannot be understood (e.g.

it's a switch dispatch or isn't implemented for a target). Upon success, this returns false and returns with the following information in various cases:

  1. If this block ends with no branches (it just falls through to its succ) just return false, leaving TBB/FBB null.
  2. If this block ends with only an unconditional branch, it sets TBB to be the destination block.
  3. If this block ends with a conditional branch and it falls through to a successor block, it sets TBB to be the branch destination block and a list of operands that evaluate the condition. These operands can be passed to other TargetInstrInfo methods to create new branches.
  4. If this block ends with a conditional branch followed by an unconditional branch, it returns the 'true' destination in TBB, the 'false' destination in FBB, and a list of operands that evaluate the condition. These operands can be passed to other TargetInstrInfo methods to create new branches.

Note that RemoveBranch and insertBranch must be implemented to support cases where this method returns success.

If AllowModify is true, then this routine is allowed to modify the basic block (e.g. delete instructions after the unconditional branch).

Definition at line 170 of file ARCInstrInfo.cpp.

References assert(), llvm::MachineBasicBlock::begin(), Cond, llvm::MachineBasicBlock::end(), llvm::MachineInstr::eraseFromParent(), I, llvm::isCondBranchOpcode(), isJumpOpcode(), llvm::isUncondBranchOpcode(), MBB, and TBB.

◆ copyPhysReg()

void ARCInstrInfo::copyPhysReg ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  I,
const DebugLoc DL,
MCRegister  DestReg,
MCRegister  SrcReg,
bool  KillSrc 
) const
override

◆ getBaseAndOffsetPosition()

bool ARCInstrInfo::getBaseAndOffsetPosition ( const MachineInstr MI,
unsigned BasePos,
unsigned OffsetPos 
) const
overridevirtual

Definition at line 423 of file ARCInstrInfo.cpp.

References isPostIncrement(), isPreIncrement(), and MI.

◆ getInstSizeInBytes()

unsigned ARCInstrInfo::getInstSizeInBytes ( const MachineInstr MI) const
override

◆ getRegisterInfo()

const ARCRegisterInfo & llvm::ARCInstrInfo::getRegisterInfo ( ) const
inline

Definition at line 33 of file ARCInstrInfo.h.

Referenced by llvm::ARCSubtarget::getRegisterInfo().

◆ insertBranch()

unsigned ARCInstrInfo::insertBranch ( MachineBasicBlock MBB,
MachineBasicBlock TBB,
MachineBasicBlock FBB,
ArrayRef< MachineOperand Cond,
const DebugLoc DL,
int *  BytesAdded = nullptr 
) const
override

◆ isLoadFromStackSlot()

Register ARCInstrInfo::isLoadFromStackSlot ( const MachineInstr MI,
int &  FrameIndex 
) const
override

If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.

If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.

Definition at line 68 of file ARCInstrInfo.cpp.

References isLoad(), isZeroImm(), and MI.

◆ isPostIncrement()

bool ARCInstrInfo::isPostIncrement ( const MachineInstr MI) const
override

Definition at line 411 of file ARCInstrInfo.cpp.

References F, MI, PostInc, TSF_AddModeMask, TSF_AddrModeOff, and llvm::MCInstrDesc::TSFlags.

Referenced by getBaseAndOffsetPosition().

◆ isPreIncrement()

bool ARCInstrInfo::isPreIncrement ( const MachineInstr MI) const

Definition at line 417 of file ARCInstrInfo.cpp.

References F, MI, PreInc, TSF_AddModeMask, TSF_AddrModeOff, and llvm::MCInstrDesc::TSFlags.

Referenced by getBaseAndOffsetPosition().

◆ isStoreToStackSlot()

Register ARCInstrInfo::isStoreToStackSlot ( const MachineInstr MI,
int &  FrameIndex 
) const
override

If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.

If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.

Definition at line 87 of file ARCInstrInfo.cpp.

References isStore(), isZeroImm(), and MI.

◆ loadImmediate()

MachineBasicBlock::iterator ARCInstrInfo::loadImmediate ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
unsigned  Reg,
uint64_t  Value 
) const

◆ loadRegFromStackSlot()

void ARCInstrInfo::loadRegFromStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
Register  DestReg,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI,
Register  VReg 
) const
override

◆ removeBranch()

unsigned ARCInstrInfo::removeBranch ( MachineBasicBlock MBB,
int *  BytesRemoved = nullptr 
) const
override

◆ reverseBranchCondition()

bool ARCInstrInfo::reverseBranchCondition ( SmallVectorImpl< MachineOperand > &  Cond) const
override

Return the inverse opcode of the specified Branch instruction.

Definition at line 349 of file ARCInstrInfo.cpp.

References assert(), Cond, and getOppositeBranchCondition().

◆ storeRegToStackSlot()

void ARCInstrInfo::storeRegToStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
Register  SrcReg,
bool  IsKill,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI,
Register  VReg 
) const
override

The documentation for this class was generated from the following files: