LLVM 24.0.0git
SelectionDAGDumper.cpp
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1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
16#include "llvm/ADT/SmallPtrSet.h"
17#include "llvm/ADT/StringExtras.h"
18#include "llvm/CodeGen/ISDOpcodes.h"
19#include "llvm/CodeGen/MachineBasicBlock.h"
20#include "llvm/CodeGen/MachineConstantPool.h"
21#include "llvm/CodeGen/MachineMemOperand.h"
22#include "llvm/CodeGen/SelectionDAG.h"
23#include "llvm/CodeGen/SelectionDAGNodes.h"
24#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
25#include "llvm/CodeGen/TargetInstrInfo.h"
26#include "llvm/CodeGen/TargetLowering.h"
27#include "llvm/CodeGen/TargetRegisterInfo.h"
28#include "llvm/CodeGen/TargetSubtargetInfo.h"
29#include "llvm/CodeGen/ValueTypes.h"
30#include "llvm/CodeGenTypes/MachineValueType.h"
31#include "llvm/Config/llvm-config.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/Constants.h"
34#include "llvm/IR/DebugInfoMetadata.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Function.h"
37#include "llvm/IR/Intrinsics.h"
38#include "llvm/IR/ModuleSlotTracker.h"
39#include "llvm/IR/Value.h"
40#include "llvm/Support/Casting.h"
41#include "llvm/Support/CommandLine.h"
42#include "llvm/Support/Compiler.h"
43#include "llvm/Support/Debug.h"
44#include "llvm/Support/ErrorHandling.h"
45#include "llvm/Support/Printable.h"
46#include "llvm/Support/raw_ostream.h"
47#include "llvm/Target/TargetMachine.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58static cl::opt<bool>
59 PrintSDNodeAddrs("print-sdnode-addrs", cl::Hidden,
60 cl::desc("Print addresses of SDNodes when dumping"));
61
62std::string SDNode::getOperationName(const SelectionDAG *G) const {
63 switch (getOpcode()) {
64 default:
65 if (getOpcode() < ISD::BUILTIN_OP_END)
66 return "<<Unknown DAG Node>>";
67 if (isMachineOpcode()) {
68 if (G)
69 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
70 if (getMachineOpcode() < TII->getNumOpcodes())
71 return std::string(TII->getName(getMachineOpcode()));
72 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
73 }
74 if (G) {
75 const SelectionDAGTargetInfo &TSI = G->getSelectionDAGInfo();
76 if (const char *Name = TSI.getTargetNodeName(getOpcode()))
77 return Name;
78 const TargetLowering &TLI = G->getTargetLoweringInfo();
79 const char *Name = TLI.getTargetNodeName(getOpcode());
80 if (Name) return Name;
81 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
82 }
83 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
84
85 // clang-format off
86#ifndef NDEBUG
87 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
88#endif
89 case ISD::PREFETCH: return "Prefetch";
90 case ISD::ARITH_FENCE: return "ArithFence";
91 case ISD::MEMBARRIER: return "MemBarrier";
92 case ISD::ATOMIC_FENCE: return "AtomicFence";
93 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
94 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
95 case ISD::ATOMIC_SWAP: return "AtomicSwap";
96 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
97 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
98 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
99 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
100 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
101 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
102 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
103 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
104 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
105 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
106 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
107 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
108 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub";
109 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
110 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
111 case ISD::ATOMIC_LOAD_FMINIMUM: return "AtomicLoadFMinimum";
112 case ISD::ATOMIC_LOAD_FMAXIMUM: return "AtomicLoadFMaximum";
113 case ISD::ATOMIC_LOAD_UINC_WRAP:
114 return "AtomicLoadUIncWrap";
115 case ISD::ATOMIC_LOAD_UDEC_WRAP:
116 return "AtomicLoadUDecWrap";
117 case ISD::ATOMIC_LOAD_USUB_COND:
118 return "AtomicLoadUSubCond";
119 case ISD::ATOMIC_LOAD_USUB_SAT:
120 return "AtomicLoadUSubSat";
121 case ISD::ATOMIC_LOAD: return "AtomicLoad";
122 case ISD::ATOMIC_STORE: return "AtomicStore";
123 case ISD::PCMARKER: return "PCMarker";
124 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
125 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
126 case ISD::SRCVALUE: return "SrcValue";
127 case ISD::MDNODE_SDNODE: return "MDNode";
128 case ISD::EntryToken: return "EntryToken";
129 case ISD::TokenFactor: return "TokenFactor";
130 case ISD::AssertSext: return "AssertSext";
131 case ISD::AssertZext: return "AssertZext";
132 case ISD::AssertNoFPClass: return "AssertNoFPClass";
133 case ISD::AssertAlign: return "AssertAlign";
134
135 case ISD::BasicBlock: return "BasicBlock";
136 case ISD::VALUETYPE: return "ValueType";
137 case ISD::Register: return "Register";
138 case ISD::RegisterMask: return "RegisterMask";
139 case ISD::Constant:
140 if (cast<ConstantSDNode>(this)->isOpaque())
141 return "OpaqueConstant";
142 return "Constant";
143 case ISD::ConstantFP: return "ConstantFP";
144 case ISD::GlobalAddress: return "GlobalAddress";
145 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
146 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress";
147 case ISD::FrameIndex: return "FrameIndex";
148 case ISD::JumpTable: return "JumpTable";
149 case ISD::JUMP_TABLE_DEBUG_INFO:
150 return "JUMP_TABLE_DEBUG_INFO";
151 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
152 case ISD::RETURNADDR: return "RETURNADDR";
153 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
154 case ISD::FRAMEADDR: return "FRAMEADDR";
155 case ISD::SPONENTRY: return "SPONENTRY";
156 case ISD::STACKADDRESS: return "STACKADDRESS";
157 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
158 case ISD::READ_REGISTER: return "READ_REGISTER";
159 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
160 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
161 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
162 case ISD::EH_RETURN: return "EH_RETURN";
163 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
164 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
165 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
166 case ISD::ConstantPool: return "ConstantPool";
167 case ISD::TargetIndex: return "TargetIndex";
168 case ISD::ExternalSymbol: return "ExternalSymbol";
169 case ISD::BlockAddress: return "BlockAddress";
170 case ISD::INTRINSIC_WO_CHAIN:
171 case ISD::INTRINSIC_VOID:
172 case ISD::INTRINSIC_W_CHAIN: {
173 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
174 unsigned IID = getOperand(OpNo)->getAsZExtVal();
175 if (IID < Intrinsic::num_intrinsics)
176 return Intrinsic::getBaseName((Intrinsic::ID)IID).str();
177 if (!G)
178 return "Unknown intrinsic";
179 llvm_unreachable("Invalid intrinsic ID");
180 }
181
182 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
183 case ISD::TargetConstant:
184 if (cast<ConstantSDNode>(this)->isOpaque())
185 return "OpaqueTargetConstant";
186 return "TargetConstant";
187
188 case ISD::TargetConstantFP: return "TargetConstantFP";
189 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
190 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
191 case ISD::TargetFrameIndex: return "TargetFrameIndex";
192 case ISD::TargetJumpTable: return "TargetJumpTable";
193 case ISD::TargetConstantPool: return "TargetConstantPool";
194 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
195 case ISD::MCSymbol: return "MCSymbol";
196 case ISD::TargetBlockAddress: return "TargetBlockAddress";
197
198 case ISD::CopyToReg: return "CopyToReg";
199 case ISD::CopyFromReg: return "CopyFromReg";
200 case ISD::UNDEF: return "undef";
201 case ISD::POISON: return "poison";
202 case ISD::VSCALE: return "vscale";
203 case ISD::MERGE_VALUES: return "merge_values";
204 case ISD::INLINEASM: return "inlineasm";
205 case ISD::INLINEASM_BR: return "inlineasm_br";
206 case ISD::EH_LABEL: return "eh_label";
207 case ISD::ANNOTATION_LABEL: return "annotation_label";
208 case ISD::HANDLENODE: return "handlenode";
209
210 // Unary operators
211 case ISD::FABS: return "fabs";
212 case ISD::FMINNUM: return "fminnum";
213 case ISD::STRICT_FMINNUM: return "strict_fminnum";
214 case ISD::FMAXNUM: return "fmaxnum";
215 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
216 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
217 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
218 case ISD::FMINIMUM: return "fminimum";
219 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
220 case ISD::FMAXIMUM: return "fmaximum";
221 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
222 case ISD::FMINIMUMNUM: return "fminimumnum";
223 case ISD::FMAXIMUMNUM: return "fmaximumnum";
224 case ISD::PSEUDO_FMIN: return "pseudo_fmin";
225 case ISD::PSEUDO_FMAX: return "pseudo_fmax";
226 case ISD::STRICT_PSEUDO_FMIN: return "strict_pseudo_fmin";
227 case ISD::STRICT_PSEUDO_FMAX: return "strict_pseudo_fmax";
228 case ISD::FNEG: return "fneg";
229 case ISD::FSQRT: return "fsqrt";
230 case ISD::STRICT_FSQRT: return "strict_fsqrt";
231 case ISD::FCBRT: return "fcbrt";
232 case ISD::FSIN: return "fsin";
233 case ISD::STRICT_FSIN: return "strict_fsin";
234 case ISD::FCOS: return "fcos";
235 case ISD::STRICT_FCOS: return "strict_fcos";
236 case ISD::FSINCOS: return "fsincos";
237 case ISD::FSINCOSPI: return "fsincospi";
238 case ISD::FMODF: return "fmodf";
239 case ISD::FTAN: return "ftan";
240 case ISD::STRICT_FTAN: return "strict_ftan";
241 case ISD::FASIN: return "fasin";
242 case ISD::STRICT_FASIN: return "strict_fasin";
243 case ISD::FACOS: return "facos";
244 case ISD::STRICT_FACOS: return "strict_facos";
245 case ISD::FATAN: return "fatan";
246 case ISD::STRICT_FATAN: return "strict_fatan";
247 case ISD::FATAN2: return "fatan2";
248 case ISD::STRICT_FATAN2: return "strict_fatan2";
249 case ISD::FSINH: return "fsinh";
250 case ISD::STRICT_FSINH: return "strict_fsinh";
251 case ISD::FCOSH: return "fcosh";
252 case ISD::STRICT_FCOSH: return "strict_fcosh";
253 case ISD::FTANH: return "ftanh";
254 case ISD::STRICT_FTANH: return "strict_ftanh";
255 case ISD::FTRUNC: return "ftrunc";
256 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
257 case ISD::FFLOOR: return "ffloor";
258 case ISD::STRICT_FFLOOR: return "strict_ffloor";
259 case ISD::FCEIL: return "fceil";
260 case ISD::STRICT_FCEIL: return "strict_fceil";
261 case ISD::FRINT: return "frint";
262 case ISD::STRICT_FRINT: return "strict_frint";
263 case ISD::FNEARBYINT: return "fnearbyint";
264 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
265 case ISD::FROUND: return "fround";
266 case ISD::STRICT_FROUND: return "strict_fround";
267 case ISD::FROUNDEVEN: return "froundeven";
268 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
269 case ISD::FEXP: return "fexp";
270 case ISD::STRICT_FEXP: return "strict_fexp";
271 case ISD::FEXP2: return "fexp2";
272 case ISD::STRICT_FEXP2: return "strict_fexp2";
273 case ISD::FEXP10: return "fexp10";
274 case ISD::FLOG: return "flog";
275 case ISD::STRICT_FLOG: return "strict_flog";
276 case ISD::FLOG2: return "flog2";
277 case ISD::STRICT_FLOG2: return "strict_flog2";
278 case ISD::FLOG10: return "flog10";
279 case ISD::STRICT_FLOG10: return "strict_flog10";
280
281 // Binary operators
282 case ISD::ADD: return "add";
283 case ISD::PTRADD: return "ptradd";
284 case ISD::SUB: return "sub";
285 case ISD::MUL: return "mul";
286 case ISD::MULHU: return "mulhu";
287 case ISD::MULHS: return "mulhs";
288 case ISD::AVGFLOORU: return "avgflooru";
289 case ISD::AVGFLOORS: return "avgfloors";
290 case ISD::AVGCEILU: return "avgceilu";
291 case ISD::AVGCEILS: return "avgceils";
292 case ISD::ABDS: return "abds";
293 case ISD::ABDU: return "abdu";
294 case ISD::SDIV: return "sdiv";
295 case ISD::UDIV: return "udiv";
296 case ISD::SREM: return "srem";
297 case ISD::UREM: return "urem";
298 case ISD::SMUL_LOHI: return "smul_lohi";
299 case ISD::UMUL_LOHI: return "umul_lohi";
300 case ISD::SDIVREM: return "sdivrem";
301 case ISD::UDIVREM: return "udivrem";
302 case ISD::AND: return "and";
303 case ISD::OR: return "or";
304 case ISD::XOR: return "xor";
305 case ISD::SHL: return "shl";
306 case ISD::SRA: return "sra";
307 case ISD::SRL: return "srl";
308 case ISD::ROTL: return "rotl";
309 case ISD::ROTR: return "rotr";
310 case ISD::FSHL: return "fshl";
311 case ISD::FSHR: return "fshr";
312 case ISD::CLMUL: return "clmul";
313 case ISD::CLMULR: return "clmulr";
314 case ISD::CLMULH: return "clmulh";
315 case ISD::PEXT: return "pext";
316 case ISD::PDEP: return "pdep";
317 case ISD::FADD: return "fadd";
318 case ISD::STRICT_FADD: return "strict_fadd";
319 case ISD::FSUB: return "fsub";
320 case ISD::STRICT_FSUB: return "strict_fsub";
321 case ISD::FMUL: return "fmul";
322 case ISD::STRICT_FMUL: return "strict_fmul";
323 case ISD::FDIV: return "fdiv";
324 case ISD::STRICT_FDIV: return "strict_fdiv";
325 case ISD::FMA: return "fma";
326 case ISD::STRICT_FMA: return "strict_fma";
327 case ISD::FMAD: return "fmad";
328 case ISD::FMULADD: return "fmuladd";
329 case ISD::FREM: return "frem";
330 case ISD::STRICT_FREM: return "strict_frem";
331 case ISD::FCOPYSIGN: return "fcopysign";
332 case ISD::FGETSIGN: return "fgetsign";
333 case ISD::FCANONICALIZE: return "fcanonicalize";
334 case ISD::IS_FPCLASS: return "is_fpclass";
335 case ISD::FPOW: return "fpow";
336 case ISD::STRICT_FPOW: return "strict_fpow";
337 case ISD::SMIN: return "smin";
338 case ISD::SMAX: return "smax";
339 case ISD::UMIN: return "umin";
340 case ISD::UMAX: return "umax";
341 case ISD::SCMP: return "scmp";
342 case ISD::UCMP: return "ucmp";
343
344 case ISD::FLDEXP: return "fldexp";
345 case ISD::STRICT_FLDEXP: return "strict_fldexp";
346 case ISD::FFREXP: return "ffrexp";
347 case ISD::FPOWI: return "fpowi";
348 case ISD::STRICT_FPOWI: return "strict_fpowi";
349 case ISD::SETCC: return "setcc";
350 case ISD::SETCCCARRY: return "setcccarry";
351 case ISD::STRICT_FSETCC: return "strict_fsetcc";
352 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
353 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
354 case ISD::SELECT: return "select";
355 case ISD::VSELECT: return "vselect";
356 case ISD::SELECT_CC: return "select_cc";
357 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
358 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
359 case ISD::CONCAT_VECTORS: return "concat_vectors";
360 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
361 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
362 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
363 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
364 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
365 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
366 case ISD::VECTOR_SPLICE_LEFT: return "vector_splice_left";
367 case ISD::VECTOR_SPLICE_RIGHT: return "vector_splice_right";
368 case ISD::SPLAT_VECTOR: return "splat_vector";
369 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
370 case ISD::VECTOR_REVERSE: return "vector_reverse";
371 case ISD::STEP_VECTOR: return "step_vector";
372 case ISD::CARRY_FALSE: return "carry_false";
373 case ISD::ADDC: return "addc";
374 case ISD::ADDE: return "adde";
375 case ISD::UADDO_CARRY: return "uaddo_carry";
376 case ISD::SADDO_CARRY: return "saddo_carry";
377 case ISD::SADDO: return "saddo";
378 case ISD::UADDO: return "uaddo";
379 case ISD::SSUBO: return "ssubo";
380 case ISD::USUBO: return "usubo";
381 case ISD::SMULO: return "smulo";
382 case ISD::UMULO: return "umulo";
383 case ISD::SUBC: return "subc";
384 case ISD::SUBE: return "sube";
385 case ISD::USUBO_CARRY: return "usubo_carry";
386 case ISD::SSUBO_CARRY: return "ssubo_carry";
387 case ISD::SHL_PARTS: return "shl_parts";
388 case ISD::SRA_PARTS: return "sra_parts";
389 case ISD::SRL_PARTS: return "srl_parts";
390
391 case ISD::SADDSAT: return "saddsat";
392 case ISD::UADDSAT: return "uaddsat";
393 case ISD::SSUBSAT: return "ssubsat";
394 case ISD::USUBSAT: return "usubsat";
395 case ISD::SSHLSAT: return "sshlsat";
396 case ISD::USHLSAT: return "ushlsat";
397
398 case ISD::SMULFIX: return "smulfix";
399 case ISD::SMULFIXSAT: return "smulfixsat";
400 case ISD::UMULFIX: return "umulfix";
401 case ISD::UMULFIXSAT: return "umulfixsat";
402
403 case ISD::SDIVFIX: return "sdivfix";
404 case ISD::SDIVFIXSAT: return "sdivfixsat";
405 case ISD::UDIVFIX: return "udivfix";
406 case ISD::UDIVFIXSAT: return "udivfixsat";
407
408 // Conversion operators.
409 case ISD::SIGN_EXTEND: return "sign_extend";
410 case ISD::ZERO_EXTEND: return "zero_extend";
411 case ISD::ANY_EXTEND: return "any_extend";
412 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
413 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
414 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
415 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
416 case ISD::TRUNCATE: return "truncate";
417 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s";
418 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u";
419 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u";
420 case ISD::FP_ROUND: return "fp_round";
421 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
422 case ISD::FP_EXTEND: return "fp_extend";
423 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
424
425 case ISD::SINT_TO_FP: return "sint_to_fp";
426 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
427 case ISD::UINT_TO_FP: return "uint_to_fp";
428 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
429 case ISD::FP_TO_SINT: return "fp_to_sint";
430 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
431 case ISD::FP_TO_UINT: return "fp_to_uint";
432 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
433 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
434 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
435 case ISD::BITCAST: return "bitcast";
436 case ISD::ADDRSPACECAST: return "addrspacecast";
437 case ISD::FP16_TO_FP: return "fp16_to_fp";
438 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
439 case ISD::FP_TO_FP16: return "fp_to_fp16";
440 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
441 case ISD::BF16_TO_FP: return "bf16_to_fp";
442 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
443 case ISD::FP_TO_BF16: return "fp_to_bf16";
444 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
445 case ISD::CONVERT_FROM_ARBITRARY_FP: return "convert_from_arbitrary_fp";
446 case ISD::CONVERT_TO_ARBITRARY_FP: return "convert_to_arbitrary_fp";
447 case ISD::LROUND: return "lround";
448 case ISD::STRICT_LROUND: return "strict_lround";
449 case ISD::LLROUND: return "llround";
450 case ISD::STRICT_LLROUND: return "strict_llround";
451 case ISD::LRINT: return "lrint";
452 case ISD::STRICT_LRINT: return "strict_lrint";
453 case ISD::LLRINT: return "llrint";
454 case ISD::STRICT_LLRINT: return "strict_llrint";
455
456 // Control flow instructions
457 case ISD::BR: return "br";
458 case ISD::BRIND: return "brind";
459 case ISD::BR_JT: return "br_jt";
460 case ISD::BRCOND: return "brcond";
461 case ISD::BR_CC: return "br_cc";
462 case ISD::CALLSEQ_START: return "callseq_start";
463 case ISD::CALLSEQ_END: return "callseq_end";
464
465 // EH instructions
466 case ISD::CATCHRET: return "catchret";
467 case ISD::CLEANUPRET: return "cleanupret";
468
469 // Other operators
470 case ISD::LOAD: return "load";
471 case ISD::STORE: return "store";
472 case ISD::MLOAD: return "masked_load";
473 case ISD::MSTORE: return "masked_store";
474 case ISD::MGATHER: return "masked_gather";
475 case ISD::MSCATTER: return "masked_scatter";
476 case ISD::VECTOR_COMPRESS: return "vector_compress";
477 case ISD::VAARG: return "vaarg";
478 case ISD::VACOPY: return "vacopy";
479 case ISD::VAEND: return "vaend";
480 case ISD::VASTART: return "vastart";
481 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
482 case ISD::EXTRACT_ELEMENT: return "extract_element";
483 case ISD::BUILD_PAIR: return "build_pair";
484 case ISD::STACKSAVE: return "stacksave";
485 case ISD::STACKRESTORE: return "stackrestore";
486 case ISD::TRAP: return "trap";
487 case ISD::DEBUGTRAP: return "debugtrap";
488 case ISD::UBSANTRAP: return "ubsantrap";
489 case ISD::LIFETIME_START: return "lifetime.start";
490 case ISD::LIFETIME_END: return "lifetime.end";
491 case ISD::FAKE_USE:
492 return "fake_use";
493 case ISD::RELOC_NONE:
494 return "reloc_none";
495 case ISD::COND_LOOP:
496 return "cond_loop";
497 case ISD::PSEUDO_PROBE:
498 return "pseudoprobe";
499 case ISD::GC_TRANSITION_START: return "gc_transition.start";
500 case ISD::GC_TRANSITION_END: return "gc_transition.end";
501 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
502 case ISD::FREEZE: return "freeze";
503 case ISD::PREALLOCATED_SETUP:
504 return "call_setup";
505 case ISD::PREALLOCATED_ARG:
506 return "call_alloc";
507
508 // Floating point environment manipulation
509 case ISD::GET_ROUNDING: return "get_rounding";
510 case ISD::SET_ROUNDING: return "set_rounding";
511 case ISD::GET_FPENV: return "get_fpenv";
512 case ISD::SET_FPENV: return "set_fpenv";
513 case ISD::RESET_FPENV: return "reset_fpenv";
514 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
515 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
516 case ISD::GET_FPMODE: return "get_fpmode";
517 case ISD::SET_FPMODE: return "set_fpmode";
518 case ISD::RESET_FPMODE: return "reset_fpmode";
519
520 // Convergence control instructions
521 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
522 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
523 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
524 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
525
526 // Bit manipulation
527 case ISD::ABS: return "abs";
528 case ISD::ABS_MIN_POISON: return "abs_min_poison";
529 case ISD::BITREVERSE: return "bitreverse";
530 case ISD::BSWAP: return "bswap";
531 case ISD::CTPOP: return "ctpop";
532 case ISD::CTTZ: return "cttz";
533 case ISD::CTTZ_ZERO_POISON: return "cttz_zero_poison";
534 case ISD::CTLZ: return "ctlz";
535 case ISD::CTLZ_ZERO_POISON: return "ctlz_zero_poison";
536 case ISD::CTLS: return "ctls";
537 case ISD::PARITY: return "parity";
538
539 // Trampolines
540 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
541 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
542
543 // clang-format on
544
545 case ISD::CONDCODE:
546 switch (cast<CondCodeSDNode>(this)->get()) {
547 default: llvm_unreachable("Unknown setcc condition!");
548 case ISD::SETOEQ: return "setoeq";
549 case ISD::SETOGT: return "setogt";
550 case ISD::SETOGE: return "setoge";
551 case ISD::SETOLT: return "setolt";
552 case ISD::SETOLE: return "setole";
553 case ISD::SETONE: return "setone";
554
555 case ISD::SETO: return "seto";
556 case ISD::SETUO: return "setuo";
557 case ISD::SETUEQ: return "setueq";
558 case ISD::SETUGT: return "setugt";
559 case ISD::SETUGE: return "setuge";
560 case ISD::SETULT: return "setult";
561 case ISD::SETULE: return "setule";
562 case ISD::SETUNE: return "setune";
563
564 case ISD::SETEQ: return "seteq";
565 case ISD::SETGT: return "setgt";
566 case ISD::SETGE: return "setge";
567 case ISD::SETLT: return "setlt";
568 case ISD::SETLE: return "setle";
569 case ISD::SETNE: return "setne";
570
571 case ISD::SETTRUE: return "settrue";
572 case ISD::SETTRUE2: return "settrue2";
573 case ISD::SETFALSE: return "setfalse";
574 case ISD::SETFALSE2: return "setfalse2";
575 }
576 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
577 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
578 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
579 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
580 case ISD::VECREDUCE_ADD: return "vecreduce_add";
581 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
582 case ISD::VECREDUCE_AND: return "vecreduce_and";
583 case ISD::VECREDUCE_OR: return "vecreduce_or";
584 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
585 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
586 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
587 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
588 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
589 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
590 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
591 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
592 case ISD::VECREDUCE_FMINIMUMNUM:
593 return "vecreduce_fminimumnum";
594 case ISD::VECREDUCE_FMAXIMUMNUM:
595 return "vecreduce_fmaximumnum";
596 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
597 case ISD::STACKMAP:
598 return "stackmap";
599 case ISD::PATCHPOINT:
600 return "patchpoint";
601 case ISD::CLEAR_CACHE:
602 return "clear_cache";
603
604 case ISD::EXPERIMENTAL_VECTOR_HISTOGRAM:
605 return "histogram";
606
607 case ISD::CTTZ_ELTS:
608 return "cttz_elts";
609 case ISD::CTTZ_ELTS_ZERO_POISON:
610 return "cttz_elts_zero_poison";
611
612 case ISD::VECTOR_FIND_LAST_ACTIVE:
613 return "find_last_active";
614
615 case ISD::GET_ACTIVE_LANE_MASK:
616 return "get_active_lane_mask";
617
618 case ISD::VECTOR_MATCH:
619 return "vector_match";
620
621 case ISD::PARTIAL_REDUCE_UMLA:
622 return "partial_reduce_umla";
623 case ISD::PARTIAL_REDUCE_SMLA:
624 return "partial_reduce_smla";
625 case ISD::PARTIAL_REDUCE_SUMLA:
626 return "partial_reduce_sumla";
627 case ISD::PARTIAL_REDUCE_FMLA:
628 return "partial_reduce_fmla";
629 case ISD::LOOP_DEPENDENCE_WAR_MASK:
630 return "loop_dep_war";
631 case ISD::LOOP_DEPENDENCE_RAW_MASK:
632 return "loop_dep_raw";
633 case ISD::MASKED_UDIV:
634 return "masked_udiv";
635 case ISD::MASKED_SDIV:
636 return "masked_sdiv";
637 case ISD::MASKED_UREM:
638 return "masked_urem";
639 case ISD::MASKED_SREM:
640 return "masked_srem";
641
642 // Vector Predication
643#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
644 case ISD::SDID: \
645 return #NAME;
646#include "llvm/IR/VPIntrinsics.def"
647 }
648}
649
650const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
651 switch (AM) {
652 default: return "";
653 case ISD::PRE_INC: return "<pre-inc>";
654 case ISD::PRE_DEC: return "<pre-dec>";
655 case ISD::POST_INC: return "<post-inc>";
656 case ISD::POST_DEC: return "<post-dec>";
657 }
658}
659
660static Printable PrintNodeId(const SDNode &Node) {
661 return Printable([&Node](raw_ostream &OS) {
662#ifndef NDEBUG
663 static const raw_ostream::Colors Color[] = {
664 raw_ostream::BLACK, raw_ostream::RED, raw_ostream::GREEN,
665 raw_ostream::YELLOW, raw_ostream::BLUE, raw_ostream::MAGENTA,
666 raw_ostream::CYAN,
667 };
668 OS.changeColor(Color[Node.PersistentId % std::size(Color)]);
669 OS << 't' << Node.PersistentId;
670 OS.resetColor();
671#else
672 OS << (const void*)&Node;
673#endif
674 });
675}
676
677// Print the MMO with more information from the SelectionDAG.
678static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
679 const MachineFunction *MF, const Module *M,
680 const MachineFrameInfo *MFI,
681 const TargetInstrInfo *TII, LLVMContext &Ctx) {
682 ModuleSlotTracker MST(M);
683 if (MF)
684 MST.incorporateFunction(MF->getFunction());
685 SmallVector<StringRef, 0> SSNs;
686 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
687}
688
689static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
690 const SelectionDAG *G) {
691 if (G) {
692 const MachineFunction *MF = &G->getMachineFunction();
693 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
694 &MF->getFrameInfo(),
695 G->getSubtarget().getInstrInfo(), *G->getContext());
696 }
697
698 LLVMContext Ctx;
699 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
700 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
701}
702
703#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
704LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
705
706LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
707 print(dbgs(), G);
708 dbgs() << '\n';
709}
710#endif
711
712void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
713 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
714 if (i) OS << ",";
715 if (getValueType(i) == MVT::Other)
716 OS << "ch";
717 else
718 OS << getValueType(i).getEVTString();
719 }
720}
721
722void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
723 if (getFlags().hasNoUnsignedWrap())
724 OS << " nuw";
725
726 if (getFlags().hasNoSignedWrap())
727 OS << " nsw";
728
729 if (getFlags().hasExact())
730 OS << " exact";
731
732 if (getFlags().hasDisjoint())
733 OS << " disjoint";
734
735 if (getFlags().hasSameSign())
736 OS << " samesign";
737
738 if (getFlags().hasInBounds())
739 OS << " inbounds";
740
741 if (getFlags().hasNonNeg())
742 OS << " nneg";
743
744 if (getFlags().hasNonNull())
745 OS << " nonnull";
746
747 if (getFlags().hasNoNaNs())
748 OS << " nnan";
749
750 if (getFlags().hasNoInfs())
751 OS << " ninf";
752
753 if (getFlags().hasNoSignedZeros())
754 OS << " nsz";
755
756 if (getFlags().hasAllowReciprocal())
757 OS << " arcp";
758
759 if (getFlags().hasAllowContract())
760 OS << " contract";
761
762 if (getFlags().hasApproximateFuncs())
763 OS << " afn";
764
765 if (getFlags().hasAllowReassociation())
766 OS << " reassoc";
767
768 if (getFlags().hasNoFPExcept())
769 OS << " nofpexcept";
770
771 if (getFlags().hasNoConvergent())
772 OS << " noconvergent";
773
774 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
775 if (!MN->memoperands_empty()) {
776 OS << "<";
777 OS << "Mem:";
778 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
779 e = MN->memoperands_end(); i != e; ++i) {
780 printMemOperand(OS, **i, G);
781 if (std::next(i) != e)
782 OS << " ";
783 }
784 OS << ">";
785 }
786 } else if (const ShuffleVectorSDNode *SVN =
787 dyn_cast<ShuffleVectorSDNode>(this)) {
788 OS << "<";
789 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
790 int Idx = SVN->getMaskElt(i);
791 if (i) OS << ",";
792 if (Idx < 0)
793 OS << "u";
794 else
795 OS << Idx;
796 }
797 OS << ">";
798 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
799 OS << '<' << CSDN->getAPIntValue() << '>';
800 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
801 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
802 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
803 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
804 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
805 else {
806 OS << "<APFloat(";
807 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
808 OS << ")>";
809 }
810 } else if (const GlobalAddressSDNode *GADN =
811 dyn_cast<GlobalAddressSDNode>(this)) {
812 int64_t offset = GADN->getOffset();
813 OS << '<';
814 GADN->getGlobal()->printAsOperand(OS);
815 OS << '>';
816 if (offset > 0)
817 OS << " + " << offset;
818 else
819 OS << " " << offset;
820 if (unsigned int TF = GADN->getTargetFlags())
821 OS << " [TF=" << TF << ']';
822 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
823 OS << "<" << FIDN->getIndex() << ">";
824 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
825 OS << "<" << JTDN->getIndex() << ">";
826 if (unsigned int TF = JTDN->getTargetFlags())
827 OS << " [TF=" << TF << ']';
828 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
829 int offset = CP->getOffset();
830 if (CP->isMachineConstantPoolEntry())
831 OS << "<" << *CP->getMachineCPVal() << ">";
832 else
833 OS << "<" << *CP->getConstVal() << ">";
834 if (offset > 0)
835 OS << " + " << offset;
836 else
837 OS << " " << offset;
838 if (unsigned int TF = CP->getTargetFlags())
839 OS << " [TF=" << TF << ']';
840 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
841 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
842 if (unsigned TF = TI->getTargetFlags())
843 OS << " [TF=" << TF << ']';
844 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
845 OS << "<";
846 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
847 if (LBB)
848 OS << LBB->getName() << " ";
849 OS << (const void*)BBDN->getBasicBlock() << ">";
850 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
851 OS << ' ' << printReg(R->getReg(),
852 G ? G->getSubtarget().getRegisterInfo() : nullptr);
853 } else if (const ExternalSymbolSDNode *ES =
854 dyn_cast<ExternalSymbolSDNode>(this)) {
855 OS << "'" << ES->getSymbol() << "'";
856 if (unsigned int TF = ES->getTargetFlags())
857 OS << " [TF=" << TF << ']';
858 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
859 if (M->getValue())
860 OS << "<" << M->getValue() << ">";
861 else
862 OS << "<null>";
863 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
864 if (MD->getMD())
865 OS << "<" << MD->getMD() << ">";
866 else
867 OS << "<null>";
868 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
869 OS << ":" << N->getVT();
870 }
871 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
872 OS << "<";
873
874 printMemOperand(OS, *LD->getMemOperand(), G);
875
876 bool doExt = true;
877 switch (LD->getExtensionType()) {
878 default: doExt = false; break;
879 case ISD::EXTLOAD: OS << ", anyext"; break;
880 case ISD::SEXTLOAD: OS << ", sext"; break;
881 case ISD::ZEXTLOAD: OS << ", zext"; break;
882 }
883 if (doExt)
884 OS << " from " << LD->getMemoryVT();
885
886 const char *AM = getIndexedModeName(LD->getAddressingMode());
887 if (*AM)
888 OS << ", " << AM;
889
890 OS << ">";
891 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
892 OS << "<";
893 printMemOperand(OS, *ST->getMemOperand(), G);
894
895 if (ST->isTruncatingStore())
896 OS << ", trunc to " << ST->getMemoryVT();
897
898 const char *AM = getIndexedModeName(ST->getAddressingMode());
899 if (*AM)
900 OS << ", " << AM;
901
902 OS << ">";
903 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
904 OS << "<";
905
906 printMemOperand(OS, *MLd->getMemOperand(), G);
907
908 bool doExt = true;
909 switch (MLd->getExtensionType()) {
910 default: doExt = false; break;
911 case ISD::EXTLOAD: OS << ", anyext"; break;
912 case ISD::SEXTLOAD: OS << ", sext"; break;
913 case ISD::ZEXTLOAD: OS << ", zext"; break;
914 }
915 if (doExt)
916 OS << " from " << MLd->getMemoryVT();
917
918 const char *AM = getIndexedModeName(MLd->getAddressingMode());
919 if (*AM)
920 OS << ", " << AM;
921
922 if (MLd->isExpandingLoad())
923 OS << ", expanding";
924
925 OS << ">";
926 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
927 OS << "<";
928 printMemOperand(OS, *MSt->getMemOperand(), G);
929
930 if (MSt->isTruncatingStore())
931 OS << ", trunc to " << MSt->getMemoryVT();
932
933 const char *AM = getIndexedModeName(MSt->getAddressingMode());
934 if (*AM)
935 OS << ", " << AM;
936
937 if (MSt->isCompressingStore())
938 OS << ", compressing";
939
940 OS << ">";
941 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
942 OS << "<";
943 printMemOperand(OS, *MGather->getMemOperand(), G);
944
945 bool doExt = true;
946 switch (MGather->getExtensionType()) {
947 default: doExt = false; break;
948 case ISD::EXTLOAD: OS << ", anyext"; break;
949 case ISD::SEXTLOAD: OS << ", sext"; break;
950 case ISD::ZEXTLOAD: OS << ", zext"; break;
951 }
952 if (doExt)
953 OS << " from " << MGather->getMemoryVT();
954
955 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
956 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
957 OS << ", " << Signed << " " << Scaled << " offset";
958
959 OS << ">";
960 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
961 OS << "<";
962 printMemOperand(OS, *MScatter->getMemOperand(), G);
963
964 if (MScatter->isTruncatingStore())
965 OS << ", trunc to " << MScatter->getMemoryVT();
966
967 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
968 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
969 OS << ", " << Signed << " " << Scaled << " offset";
970
971 OS << ">";
972 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
973 OS << "<";
974 interleaveComma(M->memoperands(), OS, [&](const MachineMemOperand *MMO) {
975 printMemOperand(OS, *MMO, G);
976 });
977 if (auto *A = dyn_cast<AtomicSDNode>(M))
978 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
979 bool doExt = true;
980 switch (A->getExtensionType()) {
981 default: doExt = false; break;
982 case ISD::EXTLOAD: OS << ", anyext"; break;
983 case ISD::SEXTLOAD: OS << ", sext"; break;
984 case ISD::ZEXTLOAD: OS << ", zext"; break;
985 }
986 if (doExt)
987 OS << " from " << A->getMemoryVT();
988 }
989 OS << ">";
990 } else if (const BlockAddressSDNode *BA =
991 dyn_cast<BlockAddressSDNode>(this)) {
992 int64_t offset = BA->getOffset();
993 OS << "<";
994 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
995 OS << ", ";
996 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
997 OS << ">";
998 if (offset > 0)
999 OS << " + " << offset;
1000 else
1001 OS << " " << offset;
1002 if (unsigned int TF = BA->getTargetFlags())
1003 OS << " [TF=" << TF << ']';
1004 } else if (const AddrSpaceCastSDNode *ASC =
1005 dyn_cast<AddrSpaceCastSDNode>(this)) {
1006 OS << '['
1007 << ASC->getSrcAddressSpace()
1008 << " -> "
1009 << ASC->getDestAddressSpace()
1010 << ']';
1011 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
1012 OS << '<' << AA->getAlign().value() << '>';
1013 }
1014
1015 if (VerboseDAGDumping) {
1016 if (unsigned Order = getIROrder())
1017 OS << " [ORD=" << Order << ']';
1018
1019 if (getNodeId() != -1)
1020 OS << " [ID=" << getNodeId() << ']';
1021 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
1022 OS << " # D:" << isDivergent();
1023
1024 if (G && !G->GetDbgValues(this).empty()) {
1025 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
1026 for (SDDbgValue *Dbg : G->GetDbgValues(this))
1027 if (!Dbg->isInvalidated())
1028 Dbg->print(OS);
1029 } else if (getHasDebugValue())
1030 OS << " [NoOfDbgValues>0]";
1031
1032 if (const auto *MD = G ? G->getPCSections(this) : nullptr) {
1033 OS << " [pcsections ";
1034 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent());
1035 OS << ']';
1036 }
1037
1038 if (MDNode *MMRA = G ? G->getMMRAMetadata(this) : nullptr) {
1039 OS << " [mmra ";
1040 MMRA->printAsOperand(OS,
1041 G->getMachineFunction().getFunction().getParent());
1042 OS << ']';
1043 }
1044 }
1045}
1046
1047LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
1048 OS << " DbgVal(Order=" << getOrder() << ')';
1049 if (isInvalidated())
1050 OS << "(Invalidated)";
1051 if (isEmitted())
1052 OS << "(Emitted)";
1053 OS << "(";
1054 bool Comma = false;
1055 for (const SDDbgOperand &Op : getLocationOps()) {
1056 if (Comma)
1057 OS << ", ";
1058 switch (Op.getKind()) {
1059 case SDDbgOperand::SDNODE:
1060 if (Op.getSDNode())
1061 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
1062 else
1063 OS << "SDNODE";
1064 break;
1065 case SDDbgOperand::CONST:
1066 OS << "CONST";
1067 break;
1068 case SDDbgOperand::FRAMEIX:
1069 OS << "FRAMEIX=" << Op.getFrameIx();
1070 break;
1071 case SDDbgOperand::VREG:
1072 OS << "VREG=" << printReg(Op.getVReg());
1073 break;
1074 }
1075 Comma = true;
1076 }
1077 OS << ")";
1078 if (isIndirect()) OS << "(Indirect)";
1079 if (isVariadic())
1080 OS << "(Variadic)";
1081 OS << ":\"" << Var->getName() << '"';
1082#ifndef NDEBUG
1083 if (Expr->getNumElements())
1084 Expr->dump();
1085#endif
1086}
1087
1088#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1089LLVM_DUMP_METHOD void SDDbgValue::dump() const {
1090 if (isInvalidated())
1091 return;
1092 print(dbgs());
1093 dbgs() << "\n";
1094}
1095#endif
1096
1097/// Return true if this node is so simple that we should just print it inline
1098/// if it appears as an operand.
1099static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
1100 // Avoid lots of cluttering when inline printing nodes with associated
1101 // DbgValues in verbose mode.
1102 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
1103 return false;
1104 if (Node.getOpcode() == ISD::EntryToken)
1105 return false;
1106 return Node.getNumOperands() == 0;
1107}
1108
1109#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1110static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
1111 for (const SDValue &Op : N->op_values()) {
1112 if (shouldPrintInline(*Op.getNode(), G))
1113 continue;
1114 if (Op.getNode()->hasOneUse())
1115 DumpNodes(Op.getNode(), indent+2, G);
1116 }
1117
1118 dbgs().indent(indent);
1119 N->dump(G);
1120}
1121
1122LLVM_DUMP_METHOD void SelectionDAG::dump() const { dump(false); }
1123
1124LLVM_DUMP_METHOD void SelectionDAG::dump(bool Sorted) const {
1125 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1126
1127 auto dumpEachNode = [this](const SDNode &N) {
1128 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1129 (!shouldPrintInline(N, this) || N.use_empty()))
1130 DumpNodes(&N, 2, this);
1131 };
1132
1133 if (Sorted) {
1134 SmallVector<const SDNode *> SortedNodes;
1135 SortedNodes.reserve(AllNodes.size());
1136 getTopologicallyOrderedNodes(SortedNodes);
1137 for (const SDNode *N : SortedNodes)
1138 dumpEachNode(*N);
1139 } else {
1140 for (const SDNode &N : allnodes())
1141 dumpEachNode(N);
1142 }
1143
1144 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1145 dbgs() << "\n";
1146
1147 if (VerboseDAGDumping) {
1148 if (DbgBegin() != DbgEnd())
1149 dbgs() << "SDDbgValues:\n";
1150 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1151 Dbg->dump();
1152 if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
1153 dbgs() << "Byval SDDbgValues:\n";
1154 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1155 Dbg->dump();
1156 }
1157 dbgs() << "\n";
1158}
1159#endif
1160
1161void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
1162 OS << PrintNodeId(*this) << ": ";
1163 print_types(OS, G);
1164 OS << " = " << getOperationName(G);
1165 print_details(OS, G);
1166}
1167
1168static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
1169 const SDValue Value) {
1170 if (!Value.getNode()) {
1171 OS << "<null>";
1172 return false;
1173 }
1174
1175 if (shouldPrintInline(*Value.getNode(), G)) {
1176 OS << Value->getOperationName(G) << ':';
1177 Value->print_types(OS, G);
1178 Value->print_details(OS, G);
1179 return true;
1180 }
1181
1182 OS << PrintNodeId(*Value.getNode());
1183 if (unsigned RN = Value.getResNo())
1184 OS << ':' << RN;
1185 return false;
1186}
1187
1188#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1189using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
1190
1191static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1192 const SelectionDAG *G, VisitedSDNodeSet &once) {
1193 if (!once.insert(N).second) // If we've been here before, return now.
1194 return;
1195
1196 // Dump the current SDNode, but don't end the line yet.
1197 OS.indent(indent);
1198 N->printr(OS, G);
1199
1200 // Having printed this SDNode, walk the children:
1201 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1202 if (i) OS << ",";
1203 OS << " ";
1204
1205 const SDValue Op = N->getOperand(i);
1206 bool printedInline = printOperand(OS, G, Op);
1207 if (printedInline)
1208 once.insert(Op.getNode());
1209 }
1210
1211 OS << "\n";
1212
1213 // Dump children that have grandchildren on their own line(s).
1214 for (const SDValue &Op : N->op_values())
1215 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1216}
1217
1218LLVM_DUMP_METHOD void SDNode::dumpr() const {
1219 VisitedSDNodeSet once;
1220 DumpNodesr(dbgs(), this, 0, nullptr, once);
1221}
1222
1223LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
1224 VisitedSDNodeSet once;
1225 DumpNodesr(dbgs(), this, 0, G, once);
1226}
1227#endif
1228
1229static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1230 const SelectionDAG *G, unsigned depth,
1231 unsigned indent) {
1232 if (depth == 0)
1233 return;
1234
1235 OS.indent(indent);
1236
1237 N->print(OS, G);
1238
1239 for (const SDValue &Op : N->op_values()) {
1240 // Don't follow chain operands.
1241 if (Op.getValueType() == MVT::Other)
1242 continue;
1243 // Don't print children that were fully rendered inline.
1244 if (shouldPrintInline(*Op.getNode(), G))
1245 continue;
1246 OS << '\n';
1247 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1248 }
1249}
1250
1251void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1252 unsigned depth) const {
1253 printrWithDepthHelper(OS, this, G, depth, 0);
1254}
1255
1256void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1257 // Don't print impossibly deep things.
1258 printrWithDepth(OS, G, 10);
1259}
1260
1261#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1262LLVM_DUMP_METHOD
1263void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1264 printrWithDepth(dbgs(), G, depth);
1265}
1266
1267LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1268 // Don't print impossibly deep things.
1269 dumprWithDepth(G, 10);
1270}
1271#endif
1272
1273void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1274 printr(OS, G);
1275 // Under VerboseDAGDumping divergence will be printed always.
1276 if (isDivergent() && !VerboseDAGDumping)
1277 OS << " # D:1";
1278 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1279 if (i) OS << ", "; else OS << " ";
1280 printOperand(OS, G, getOperand(i));
1281 }
1282 if (DebugLoc DL = getDebugLoc()) {
1283 OS << ", ";
1284 DL.print(OS);
1285 }
1286 if (PrintSDNodeAddrs)
1287 OS << " ; " << this;
1288}
APFloat.h
This file declares a class to represent arbitrary precision floating point values and provide a varie...
APInt.h
This file implements a class to represent arbitrary precision integral constant values and operations...
Scaled
@ Scaled
Definition ARCInstrInfo.cpp:35
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition ARMSLSHardening.cpp:73
A
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
LLVM_DUMP_METHOD
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition Compiler.h:678
Constants.h
This file contains the declarations for the subclasses of Constant, which represent the different fla...
TII
const HexagonInstrInfo * TII
Definition HexagonCopyToCombine.cpp:118
hasNoSignedWrap
static bool hasNoSignedWrap(BinaryOperator &I)
Definition InstructionCombining.cpp:406
hasNoUnsignedWrap
static bool hasNoUnsignedWrap(BinaryOperator &I)
Definition InstructionCombining.cpp:401
G
#define G(x, y, z)
Definition MD5.cpp:55
MachineConstantPool.h
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
PrintNodeId
static Printable PrintNodeId(const SDNode &Node)
Definition SelectionDAGDumper.cpp:660
VisitedSDNodeSet
SmallPtrSet< const SDNode *, 32 > VisitedSDNodeSet
Definition SelectionDAGDumper.cpp:1189
VerboseDAGDumping
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
printOperand
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
Definition SelectionDAGDumper.cpp:1168
shouldPrintInline
static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G)
Return true if this node is so simple that we should just print it inline if it appears as an operand...
Definition SelectionDAGDumper.cpp:1099
DumpNodesr
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once)
Definition SelectionDAGDumper.cpp:1191
PrintSDNodeAddrs
static cl::opt< bool > PrintSDNodeAddrs("print-sdnode-addrs", cl::Hidden, cl::desc("Print addresses of SDNodes when dumping"))
printMemOperand
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
Definition SelectionDAGDumper.cpp:678
DumpNodes
static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G)
Definition SelectionDAGDumper.cpp:1110
printrWithDepthHelper
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent)
Definition SelectionDAGDumper.cpp:1229
SmallPtrSet.h
This file defines the SmallPtrSet class.
StringExtras.h
This file contains some functions that are useful when dealing with strings.
TargetLowering.h
This file describes how to lower LLVM code to machine code.
llvm::APFloatBase::IEEEsingle
static const fltSemantics & IEEEsingle()
Definition APFloat.h:304
llvm::APFloatBase::IEEEdouble
static const fltSemantics & IEEEdouble()
Definition APFloat.h:305
llvm::DebugLoc
A debug info location.
Definition DebugLoc.h:126
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition GlobalValue.h:728
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
llvm::LoadSDNode
This class is used to represent ISD::LOAD nodes.
Definition SelectionDAGNodes.h:2687
llvm::MDNode
Metadata node.
Definition Metadata.h:1081
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition MachineFrameInfo.h:112
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition MachineFunction.h:794
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition MachineFunction.h:739
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition MachineMemOperand.h:141
llvm::MachineMemOperand::print
LLVM_ABI void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
Definition MachineOperand.cpp:1241
llvm::MachineSDNode
An SDNode that represents everything that will be needed to construct a MachineInstr.
Definition SelectionDAGNodes.h:3297
llvm::MachineSDNode::mmo_iterator
ArrayRef< MachineMemOperand * >::const_iterator mmo_iterator
Definition SelectionDAGNodes.h:3327
llvm::MaskedLoadSDNode
This class is used to represent an MLOAD node.
Definition SelectionDAGNodes.h:2994
llvm::MaskedStoreSDNode
This class is used to represent an MSTORE node.
Definition SelectionDAGNodes.h:3023
llvm::MemSDNode
This is an abstract virtual class for memory operations.
Definition SelectionDAGNodes.h:1431
llvm::ModuleSlotTracker
Manage lifetime of a slot tracker for printing IR.
Definition ModuleSlotTracker.h:45
llvm::ModuleSlotTracker::incorporateFunction
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition AsmWriter.cpp:968
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition Module.h:68
llvm::Printable
Simple wrapper around std::function<void(raw_ostream&)>.
Definition Printable.h:38
llvm::SDDbgOperand
Holds the information for a single machine location through SDISel; either an SDNode,...
Definition SDNodeDbgValue.h:32
llvm::SDDbgOperand::VREG
@ VREG
Value is a virtual register.
Definition SDNodeDbgValue.h:38
llvm::SDDbgOperand::FRAMEIX
@ FRAMEIX
Value is contents of a stack location.
Definition SDNodeDbgValue.h:37
llvm::SDDbgOperand::SDNODE
@ SDNODE
Value is the result of an expression.
Definition SDNodeDbgValue.h:35
llvm::SDDbgOperand::CONST
@ CONST
Value is a constant.
Definition SDNodeDbgValue.h:36
llvm::SDDbgValue
Holds the information from a dbg_value node through SDISel.
Definition SDNodeDbgValue.h:134
llvm::SDDbgValue::isEmitted
bool isEmitted() const
Definition SDNodeDbgValue.h:230
llvm::SDDbgValue::print
LLVM_DUMP_METHOD void print(raw_ostream &OS) const
Definition SelectionDAGDumper.cpp:1047
llvm::SDDbgValue::getOrder
unsigned getOrder() const
Returns the SDNodeOrder.
Definition SDNodeDbgValue.h:219
llvm::SDDbgValue::dump
LLVM_DUMP_METHOD void dump() const
Definition SelectionDAGDumper.cpp:1089
llvm::SDDbgValue::isInvalidated
bool isInvalidated() const
Definition SDNodeDbgValue.h:225
llvm::SDDbgValue::getLocationOps
ArrayRef< SDDbgOperand > getLocationOps() const
Definition SDNodeDbgValue.h:186
llvm::SDDbgValue::isIndirect
bool isIndirect() const
Returns whether this is an indirect value.
Definition SDNodeDbgValue.h:210
llvm::SDDbgValue::isVariadic
bool isVariadic() const
Definition SDNodeDbgValue.h:212
llvm::SDNode
Represents one node in the SelectionDAG.
Definition SelectionDAGNodes.h:515
llvm::SDNode::isMachineOpcode
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
Definition SelectionDAGNodes.h:763
llvm::SDNode::dumprFull
LLVM_ABI void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
Definition SelectionDAGDumper.cpp:1267
llvm::SDNode::getNodeId
int getNodeId() const
Return the unique node id.
Definition SelectionDAGNodes.h:794
llvm::SDNode::dump
LLVM_ABI void dump() const
Dump this node, for debugging.
Definition SelectionDAGDumper.cpp:704
llvm::SDNode::getOpcode
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
Definition SelectionDAGNodes.h:710
llvm::SDNode::isDivergent
bool isDivergent() const
Definition SelectionDAGNodes.h:781
llvm::SDNode::getIndexedModeName
static LLVM_ABI const char * getIndexedModeName(ISD::MemIndexedMode AM)
Definition SelectionDAGDumper.cpp:650
llvm::SDNode::getIROrder
unsigned getIROrder() const
Return the node ordering.
Definition SelectionDAGNodes.h:814
llvm::SDNode::getHasDebugValue
bool getHasDebugValue() const
Definition SelectionDAGNodes.h:778
llvm::SDNode::dumpr
LLVM_ABI void dumpr() const
Dump (recursively) this node and its use-def subgraph.
Definition SelectionDAGDumper.cpp:1218
llvm::SDNode::getFlags
SDNodeFlags getFlags() const
Definition SelectionDAGNodes.h:1116
llvm::SDNode::getOperationName
LLVM_ABI std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
Definition SelectionDAGDumper.cpp:62
llvm::SDNode::printrFull
LLVM_ABI void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
Definition SelectionDAGDumper.cpp:1256
llvm::SDNode::SelectionDAG
friend class SelectionDAG
Definition SelectionDAGNodes.h:656
llvm::SDNode::printr
LLVM_ABI void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition SelectionDAGDumper.cpp:1161
llvm::SDNode::getAsZExtVal
uint64_t getAsZExtVal() const
Helper method returns the zero-extended integer value of a ConstantSDNode.
Definition SelectionDAGNodes.h:1883
llvm::SDNode::getNumValues
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
Definition SelectionDAGNodes.h:1132
llvm::SDNode::getNumOperands
unsigned getNumOperands() const
Return the number of values used by this operation.
Definition SelectionDAGNodes.h:1044
llvm::SDNode::getMachineOpcode
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
Definition SelectionDAGNodes.h:773
llvm::SDNode::getOperand
const SDValue & getOperand(unsigned Num) const
Definition SelectionDAGNodes.h:1065
llvm::SDNode::print
LLVM_ABI void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition SelectionDAGDumper.cpp:1273
llvm::SDNode::getDebugLoc
const DebugLoc & getDebugLoc() const
Return the source location info.
Definition SelectionDAGNodes.h:820
llvm::SDNode::printrWithDepth
LLVM_ABI void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
Definition SelectionDAGDumper.cpp:1251
llvm::SDNode::dumprWithDepth
LLVM_ABI void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
Definition SelectionDAGDumper.cpp:1263
llvm::SDNode::getValueType
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
Definition SelectionDAGNodes.h:1135
llvm::SDNode::print_details
LLVM_ABI void print_details(raw_ostream &OS, const SelectionDAG *G) const
Definition SelectionDAGDumper.cpp:722
llvm::SDNode::print_types
LLVM_ABI void print_types(raw_ostream &OS, const SelectionDAG *G) const
Definition SelectionDAGDumper.cpp:712
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition SelectionDAGNodes.h:147
llvm::SelectionDAGTargetInfo
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
Definition SelectionDAGTargetInfo.h:33
llvm::SelectionDAGTargetInfo::getTargetNodeName
virtual const char * getTargetNodeName(unsigned Opcode) const
Returns the name of the given target-specific opcode, suitable for debug printing.
Definition SelectionDAGTargetInfo.h:42
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition SelectionDAG.h:227
llvm::SelectionDAG::getRoot
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
Definition SelectionDAG.h:593
llvm::SelectionDAG::ByvalParmDbgEnd
SDDbgInfo::DbgIterator ByvalParmDbgEnd() const
Definition SelectionDAG.h:2028
llvm::SelectionDAG::ByvalParmDbgBegin
SDDbgInfo::DbgIterator ByvalParmDbgBegin() const
Definition SelectionDAG.h:2025
llvm::SelectionDAG::DbgEnd
SDDbgInfo::DbgIterator DbgEnd() const
Definition SelectionDAG.h:2023
llvm::SelectionDAG::dump
LLVM_ABI void dump() const
Dump the textual format of this DAG.
Definition SelectionDAGDumper.cpp:1122
llvm::SelectionDAG::DbgBegin
SDDbgInfo::DbgIterator DbgBegin() const
Definition SelectionDAG.h:2022
llvm::SelectionDAG::allnodes
iterator_range< allnodes_iterator > allnodes()
Definition SelectionDAG.h:585
llvm::SelectionDAG::getNode
LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
Definition SelectionDAG.cpp:11818
llvm::SelectionDAG::getTopologicallyOrderedNodes
LLVM_ABI void getTopologicallyOrderedNodes(SmallVectorImpl< const SDNode * > &SortedNodes) const
Get all the nodes in their topological order without modifying any states.
Definition SelectionDAG.cpp:13563
llvm::ShuffleVectorSDNode
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
Definition SelectionDAGNodes.h:1780
llvm::SmallPtrSetImpl::insert
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition SmallPtrSet.h:373
llvm::SmallPtrSet
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition SmallPtrSet.h:519
llvm::SmallVectorImpl::reserve
void reserve(size_type N)
Definition SmallVector.h:698
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition SmallVector.h:1252
llvm::SrcValueSDNode
An SDNode that holds an arbitrary LLVM IR Value.
Definition SelectionDAGNodes.h:2468
llvm::StoreSDNode
This class is used to represent ISD::STORE nodes.
Definition SelectionDAGNodes.h:2715
llvm::StringRef::str
std::string str() const
Get the contents as an std::string.
Definition StringRef.h:222
llvm::TargetIndexSDNode
Completely target-dependent object reference.
Definition SelectionDAGNodes.h:2284
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition TargetInstrInfo.h:116
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition TargetLowering.h:4186
llvm::TargetLowering::getTargetNodeName
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
Definition TargetLowering.cpp:51
llvm::VTSDNode
This class is used to represent EVT's, which are used to parameterize some operations.
Definition SelectionDAGNodes.h:2636
llvm::Value
LLVM Value Representation.
Definition Value.h:75
llvm::Value::getName
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
Definition Value.cpp:319
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
llvm::raw_ostream::Colors
Colors
Definition raw_ostream.h:94
llvm::raw_ostream::changeColor
virtual raw_ostream & changeColor(enum Colors Color, bool Bold=false, bool BG=false)
Changes the foreground color of text that will be output from this point forward.
Definition raw_ostream.cpp:504
llvm::raw_ostream::resetColor
virtual raw_ostream & resetColor()
Resets the colors to terminal defaults.
Definition raw_ostream.cpp:517
llvm::raw_ostream::BLACK
static constexpr Colors BLACK
Definition raw_ostream.h:115
llvm::raw_ostream::GREEN
static constexpr Colors GREEN
Definition raw_ostream.h:117
llvm::raw_ostream::indent
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
Definition raw_ostream.cpp:479
llvm::raw_ostream::BLUE
static constexpr Colors BLUE
Definition raw_ostream.h:119
llvm::raw_ostream::RED
static constexpr Colors RED
Definition raw_ostream.h:116
llvm::raw_ostream::MAGENTA
static constexpr Colors MAGENTA
Definition raw_ostream.h:120
llvm::raw_ostream::YELLOW
static constexpr Colors YELLOW
Definition raw_ostream.h:118
llvm::raw_ostream::CYAN
static constexpr Colors CYAN
Definition raw_ostream.h:121
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition ErrorHandling.h:164
llvm::AA
Abstract Attribute helper functions.
Definition Attributor.h:165
llvm::ISD::SETCC
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition ISDOpcodes.h:830
llvm::ISD::MERGE_VALUES
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition ISDOpcodes.h:261
llvm::ISD::STACKRESTORE
@ STACKRESTORE
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain.
Definition ISDOpcodes.h:1289
llvm::ISD::STACKSAVE
@ STACKSAVE
STACKSAVE - STACKSAVE has one operand, an input chain.
Definition ISDOpcodes.h:1285
llvm::ISD::TargetConstantPool
@ TargetConstantPool
Definition ISDOpcodes.h:189
llvm::ISD::CONVERGENCECTRL_ANCHOR
@ CONVERGENCECTRL_ANCHOR
The llvm.experimental.convergence.* intrinsics.
Definition ISDOpcodes.h:1602
llvm::ISD::MDNODE_SDNODE
@ MDNODE_SDNODE
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR.
Definition ISDOpcodes.h:1334
llvm::ISD::STRICT_FSETCC
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition ISDOpcodes.h:514
llvm::ISD::PTRADD
@ PTRADD
PTRADD represents pointer arithmetic semantics, for targets that opt in using shouldPreservePtrArith(...
Definition ISDOpcodes.h:1592
llvm::ISD::DELETED_NODE
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition ISDOpcodes.h:45
llvm::ISD::POISON
@ POISON
POISON - A poison node.
Definition ISDOpcodes.h:236
llvm::ISD::SET_FPENV
@ SET_FPENV
Sets the current floating-point environment.
Definition ISDOpcodes.h:1161
llvm::ISD::PARTIAL_REDUCE_SMLA
@ PARTIAL_REDUCE_SMLA
PARTIAL_REDUCE_[U|S]MLA(Accumulator, Input1, Input2) The partial reduction nodes sign or zero extend ...
Definition ISDOpcodes.h:1573
llvm::ISD::LOOP_DEPENDENCE_RAW_MASK
@ LOOP_DEPENDENCE_RAW_MASK
Definition ISDOpcodes.h:1661
llvm::ISD::VECREDUCE_SEQ_FADD
@ VECREDUCE_SEQ_FADD
Generic reduction nodes.
Definition ISDOpcodes.h:1517
llvm::ISD::COND_LOOP
@ COND_LOOP
COND_LOOP is a conditional branch to self, used for implementing efficient conditional traps.
Definition ISDOpcodes.h:1483
llvm::ISD::MLOAD
@ MLOAD
Masked load and store - consecutive vector load and store operations with additional mask operand tha...
Definition ISDOpcodes.h:1456
llvm::ISD::EH_SJLJ_LONGJMP
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition ISDOpcodes.h:168
llvm::ISD::VECREDUCE_FMINIMUMNUM
@ VECREDUCE_FMINIMUMNUM
Definition ISDOpcodes.h:1544
llvm::ISD::FGETSIGN
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition ISDOpcodes.h:541
llvm::ISD::SMUL_LOHI
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition ISDOpcodes.h:275
llvm::ISD::INSERT_SUBVECTOR
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition ISDOpcodes.h:603
llvm::ISD::STACKADDRESS
@ STACKADDRESS
STACKADDRESS - Represents the llvm.stackaddress intrinsic.
Definition ISDOpcodes.h:127
llvm::ISD::JUMP_TABLE_DEBUG_INFO
@ JUMP_TABLE_DEBUG_INFO
JUMP_TABLE_DEBUG_INFO - Jumptable debug info.
Definition ISDOpcodes.h:1223
llvm::ISD::BSWAP
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:790
llvm::ISD::SMULFIX
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:395
llvm::ISD::VAEND
@ VAEND
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
Definition ISDOpcodes.h:1318
llvm::ISD::TargetBlockAddress
@ TargetBlockAddress
Definition ISDOpcodes.h:191
llvm::ISD::ATOMIC_STORE
@ ATOMIC_STORE
OUTCHAIN = ATOMIC_STORE(INCHAIN, val, ptr) This corresponds to "store atomic" instruction.
Definition ISDOpcodes.h:1404
llvm::ISD::ADDC
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:294
llvm::ISD::FRAME_TO_ARGS_OFFSET
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition ISDOpcodes.h:145
llvm::ISD::RESET_FPENV
@ RESET_FPENV
Set floating-point environment to default state.
Definition ISDOpcodes.h:1165
llvm::ISD::FMAD
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition ISDOpcodes.h:525
llvm::ISD::ADD
@ ADD
Simple integer binary arithmetic operators.
Definition ISDOpcodes.h:264
llvm::ISD::LOAD
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
Definition ISDOpcodes.h:1194
llvm::ISD::SMULFIXSAT
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:401
llvm::ISD::SET_FPMODE
@ SET_FPMODE
Sets the current dynamic floating-point control modes.
Definition ISDOpcodes.h:1184
llvm::ISD::ANY_EXTEND
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition ISDOpcodes.h:864
llvm::ISD::CTTZ_ELTS
@ CTTZ_ELTS
Returns the number of number of trailing (least significant) zero elements in a vector.
Definition ISDOpcodes.h:1619
llvm::ISD::ATOMIC_LOAD_USUB_COND
@ ATOMIC_LOAD_USUB_COND
Definition ISDOpcodes.h:1447
llvm::ISD::FMA
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:521
llvm::ISD::VECTOR_FIND_LAST_ACTIVE
@ VECTOR_FIND_LAST_ACTIVE
Finds the index of the last active mask element Operands: Mask.
Definition ISDOpcodes.h:1624
llvm::ISD::FMODF
@ FMODF
FMODF - Decomposes the operand into integral and fractional parts, each having the same type and sign...
Definition ISDOpcodes.h:1151
llvm::ISD::PSEUDO_FMIN
@ PSEUDO_FMIN
PSEUDO_FMIN is strictly equivalent to op0 olt op1 ?
Definition ISDOpcodes.h:1139
llvm::ISD::FATAN2
@ FATAN2
FATAN2 - atan2, inspired by libm.
Definition ISDOpcodes.h:1064
llvm::ISD::FSINCOSPI
@ FSINCOSPI
FSINCOSPI - Compute both the sine and cosine times pi more accurately than FSINCOS(pi*x),...
Definition ISDOpcodes.h:1147
llvm::ISD::INTRINSIC_VOID
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition ISDOpcodes.h:220
llvm::ISD::EH_SJLJ_SETUP_DISPATCH
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition ISDOpcodes.h:172
llvm::ISD::GlobalAddress
@ GlobalAddress
Definition ISDOpcodes.h:88
llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS
@ ATOMIC_CMP_SWAP_WITH_SUCCESS
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
Definition ISDOpcodes.h:1417
llvm::ISD::STRICT_FMINIMUM
@ STRICT_FMINIMUM
Definition ISDOpcodes.h:474
llvm::ISD::SINT_TO_FP
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition ISDOpcodes.h:891
llvm::ISD::CONCAT_VECTORS
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition ISDOpcodes.h:587
llvm::ISD::VECREDUCE_FMAX
@ VECREDUCE_FMAX
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
Definition ISDOpcodes.h:1535
llvm::ISD::FADD
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:418
llvm::ISD::VECREDUCE_FMAXIMUM
@ VECREDUCE_FMAXIMUM
FMINIMUM/FMAXIMUM nodes propatate NaNs and signed zeroes using the llvm.minimum and llvm....
Definition ISDOpcodes.h:1539
llvm::ISD::ABS
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:750
llvm::ISD::MEMBARRIER
@ MEMBARRIER
MEMBARRIER - Compiler barrier only; generate a no-op.
Definition ISDOpcodes.h:1391
llvm::ISD::ATOMIC_FENCE
@ ATOMIC_FENCE
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
Definition ISDOpcodes.h:1396
llvm::ISD::RESET_FPMODE
@ RESET_FPMODE
Sets default dynamic floating-point control modes.
Definition ISDOpcodes.h:1188
llvm::ISD::SIGN_EXTEND_VECTOR_INREG
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition ISDOpcodes.h:921
llvm::ISD::SDIVREM
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:280
llvm::ISD::FP16_TO_FP
@ FP16_TO_FP
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
Definition ISDOpcodes.h:1014
llvm::ISD::FMULADD
@ FMULADD
FMULADD - Performs a * b + c, with, or without, intermediate rounding.
Definition ISDOpcodes.h:531
llvm::ISD::FPTRUNC_ROUND
@ FPTRUNC_ROUND
FPTRUNC_ROUND - This corresponds to the fptrunc_round intrinsic.
Definition ISDOpcodes.h:518
llvm::ISD::FAKE_USE
@ FAKE_USE
FAKE_USE represents a use of the operand but does not do anything.
Definition ISDOpcodes.h:1479
llvm::ISD::BITCAST
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
Definition ISDOpcodes.h:1004
llvm::ISD::STRICT_PSEUDO_FMAX
@ STRICT_PSEUDO_FMAX
Definition ISDOpcodes.h:463
llvm::ISD::BUILD_PAIR
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition ISDOpcodes.h:254
llvm::ISD::CLMUL
@ CLMUL
Carry-less multiplication operations.
Definition ISDOpcodes.h:781
llvm::ISD::INIT_TRAMPOLINE
@ INIT_TRAMPOLINE
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
Definition ISDOpcodes.h:1362
llvm::ISD::FLDEXP
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
Definition ISDOpcodes.h:1062
llvm::ISD::SDIVFIX
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition ISDOpcodes.h:408
llvm::ISD::STRICT_FSQRT
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition ISDOpcodes.h:439
llvm::ISD::BUILTIN_OP_END
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition ISDOpcodes.h:1682
llvm::ISD::GlobalTLSAddress
@ GlobalTLSAddress
Definition ISDOpcodes.h:89
llvm::ISD::SRCVALUE
@ SRCVALUE
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
Definition ISDOpcodes.h:1330
llvm::ISD::CONVERT_FROM_ARBITRARY_FP
@ CONVERT_FROM_ARBITRARY_FP
CONVERT_FROM_ARBITRARY_FP - This operator converts from an arbitrary floating-point represented as an...
Definition ISDOpcodes.h:1032
llvm::ISD::EH_LABEL
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
Definition ISDOpcodes.h:1265
llvm::ISD::ATOMIC_LOAD_USUB_SAT
@ ATOMIC_LOAD_USUB_SAT
Definition ISDOpcodes.h:1448
llvm::ISD::CTLZ_ZERO_POISON
@ CTLZ_ZERO_POISON
Definition ISDOpcodes.h:799
llvm::ISD::EH_RETURN
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition ISDOpcodes.h:156
llvm::ISD::ANNOTATION_LABEL
@ ANNOTATION_LABEL
ANNOTATION_LABEL - Represents a mid basic block label used by annotations.
Definition ISDOpcodes.h:1271
llvm::ISD::SET_ROUNDING
@ SET_ROUNDING
Set rounding mode.
Definition ISDOpcodes.h:986
llvm::ISD::CONVERGENCECTRL_GLUE
@ CONVERGENCECTRL_GLUE
This does not correspond to any convergence control intrinsic.
Definition ISDOpcodes.h:1608
llvm::ISD::PARTIAL_REDUCE_UMLA
@ PARTIAL_REDUCE_UMLA
Definition ISDOpcodes.h:1574
llvm::ISD::SIGN_EXTEND
@ SIGN_EXTEND
Conversion operators.
Definition ISDOpcodes.h:855
llvm::ISD::AVGCEILS
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition ISDOpcodes.h:718
llvm::ISD::STRICT_UINT_TO_FP
@ STRICT_UINT_TO_FP
Definition ISDOpcodes.h:488
llvm::ISD::SCALAR_TO_VECTOR
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition ISDOpcodes.h:668
llvm::ISD::PREALLOCATED_SETUP
@ PREALLOCATED_SETUP
PREALLOCATED_SETUP - This has 2 operands: an input chain and a SRCVALUE with the preallocated call Va...
Definition ISDOpcodes.h:1323
llvm::ISD::READSTEADYCOUNTER
@ READSTEADYCOUNTER
READSTEADYCOUNTER - This corresponds to the readfixedcounter intrinsic.
Definition ISDOpcodes.h:1351
llvm::ISD::ADDROFRETURNADDR
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition ISDOpcodes.h:117
llvm::ISD::TargetExternalSymbol
@ TargetExternalSymbol
Definition ISDOpcodes.h:190
llvm::ISD::CONVERGENCECTRL_ENTRY
@ CONVERGENCECTRL_ENTRY
Definition ISDOpcodes.h:1603
llvm::ISD::BR
@ BR
Control flow instructions. These all have token chains.
Definition ISDOpcodes.h:1210
llvm::ISD::VECREDUCE_FADD
@ VECREDUCE_FADD
These reductions have relaxed evaluation order semantics, and have a single vector operand.
Definition ISDOpcodes.h:1532
llvm::ISD::TargetJumpTable
@ TargetJumpTable
Definition ISDOpcodes.h:188
llvm::ISD::TargetIndex
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition ISDOpcodes.h:198
llvm::ISD::PARTIAL_REDUCE_FMLA
@ PARTIAL_REDUCE_FMLA
Definition ISDOpcodes.h:1576
llvm::ISD::PREFETCH
@ PREFETCH
PREFETCH - This corresponds to a prefetch intrinsic.
Definition ISDOpcodes.h:1384
llvm::ISD::STRICT_PSEUDO_FMIN
@ STRICT_PSEUDO_FMIN
Definition ISDOpcodes.h:462
llvm::ISD::TRUNCATE_SSAT_U
@ TRUNCATE_SSAT_U
Definition ISDOpcodes.h:884
llvm::ISD::VECREDUCE_FMAXIMUMNUM
@ VECREDUCE_FMAXIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM nodes do not propagate NaNs and order signed zeroes using the llvm....
Definition ISDOpcodes.h:1543
llvm::ISD::FSINCOS
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
Definition ISDOpcodes.h:1143
llvm::ISD::SETCCCARRY
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition ISDOpcodes.h:838
llvm::ISD::FNEG
@ FNEG
Perform various unary floating-point operations inspired by libm.
Definition ISDOpcodes.h:1046
llvm::ISD::BR_CC
@ BR_CC
BR_CC - Conditional branch.
Definition ISDOpcodes.h:1240
llvm::ISD::SSUBO
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:353
llvm::ISD::PREALLOCATED_ARG
@ PREALLOCATED_ARG
PREALLOCATED_ARG - This has 3 operands: an input chain, a SRCVALUE with the preallocated call Value,...
Definition ISDOpcodes.h:1326
llvm::ISD::BRIND
@ BRIND
BRIND - Indirect branch.
Definition ISDOpcodes.h:1215
llvm::ISD::BR_JT
@ BR_JT
BR_JT - Jumptable branch.
Definition ISDOpcodes.h:1219
llvm::ISD::GC_TRANSITION_START
@ GC_TRANSITION_START
GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition s...
Definition ISDOpcodes.h:1491
llvm::ISD::VECTOR_INTERLEAVE
@ VECTOR_INTERLEAVE
VECTOR_INTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor to...
Definition ISDOpcodes.h:638
llvm::ISD::STEP_VECTOR
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition ISDOpcodes.h:694
llvm::ISD::FCANONICALIZE
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:544
llvm::ISD::IS_FPCLASS
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition ISDOpcodes.h:551
llvm::ISD::SSUBSAT
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:375
llvm::ISD::SELECT
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:807
llvm::ISD::ATOMIC_LOAD
@ ATOMIC_LOAD
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
Definition ISDOpcodes.h:1400
llvm::ISD::UNDEF
@ UNDEF
UNDEF - An undefined node.
Definition ISDOpcodes.h:233
llvm::ISD::EXTRACT_ELEMENT
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition ISDOpcodes.h:247
llvm::ISD::SPLAT_VECTOR
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition ISDOpcodes.h:675
llvm::ISD::AssertAlign
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition ISDOpcodes.h:69
llvm::ISD::VACOPY
@ VACOPY
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer,...
Definition ISDOpcodes.h:1314
llvm::ISD::GET_ACTIVE_LANE_MASK
@ GET_ACTIVE_LANE_MASK
GET_ACTIVE_LANE_MASK - this corrosponds to the llvm.get.active.lane.mask intrinsic.
Definition ISDOpcodes.h:1633
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition ISDOpcodes.h:81
llvm::ISD::CopyFromReg
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition ISDOpcodes.h:230
llvm::ISD::SADDO
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:349
llvm::ISD::TargetGlobalAddress
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition ISDOpcodes.h:185
llvm::ISD::ARITH_FENCE
@ ARITH_FENCE
ARITH_FENCE - This corresponds to a arithmetic fence intrinsic.
Definition ISDOpcodes.h:1388
llvm::ISD::CTLS
@ CTLS
Count leading redundant sign bits.
Definition ISDOpcodes.h:803
llvm::ISD::VECREDUCE_ADD
@ VECREDUCE_ADD
Integer reductions may have a result type larger than the vector element type.
Definition ISDOpcodes.h:1548
llvm::ISD::GET_ROUNDING
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition ISDOpcodes.h:981
llvm::ISD::STRICT_FP_TO_FP16
@ STRICT_FP_TO_FP16
Definition ISDOpcodes.h:1017
llvm::ISD::MULHU
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition ISDOpcodes.h:707
llvm::ISD::CLEANUPRET
@ CLEANUPRET
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition ISDOpcodes.h:1280
llvm::ISD::ATOMIC_LOAD_FMAXIMUM
@ ATOMIC_LOAD_FMAXIMUM
Definition ISDOpcodes.h:1441
llvm::ISD::GET_FPMODE
@ GET_FPMODE
Reads the current dynamic floating-point control modes.
Definition ISDOpcodes.h:1179
llvm::ISD::STRICT_FP16_TO_FP
@ STRICT_FP16_TO_FP
Definition ISDOpcodes.h:1016
llvm::ISD::GET_FPENV
@ GET_FPENV
Gets the current floating-point environment.
Definition ISDOpcodes.h:1156
llvm::ISD::SHL
@ SHL
Shift and rotation operations.
Definition ISDOpcodes.h:772
llvm::ISD::AssertNoFPClass
@ AssertNoFPClass
AssertNoFPClass - These nodes record if a register contains a float value that is known to be not som...
Definition ISDOpcodes.h:78
llvm::ISD::VECTOR_SHUFFLE
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition ISDOpcodes.h:652
llvm::ISD::PtrAuthGlobalAddress
@ PtrAuthGlobalAddress
A ptrauth constant.
Definition ISDOpcodes.h:100
llvm::ISD::EXTRACT_SUBVECTOR
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition ISDOpcodes.h:617
llvm::ISD::FMINNUM_IEEE
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
Definition ISDOpcodes.h:1119
llvm::ISD::STRICT_FMAXIMUM
@ STRICT_FMAXIMUM
Definition ISDOpcodes.h:473
llvm::ISD::EntryToken
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition ISDOpcodes.h:48
llvm::ISD::READ_REGISTER
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition ISDOpcodes.h:139
llvm::ISD::EXTRACT_VECTOR_ELT
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition ISDOpcodes.h:579
llvm::ISD::CopyToReg
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition ISDOpcodes.h:224
llvm::ISD::ZERO_EXTEND
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition ISDOpcodes.h:861
llvm::ISD::TargetConstantFP
@ TargetConstantFP
Definition ISDOpcodes.h:180
llvm::ISD::DEBUGTRAP
@ DEBUGTRAP
DEBUGTRAP - Trap intended to get the attention of a debugger.
Definition ISDOpcodes.h:1374
llvm::ISD::SELECT_CC
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition ISDOpcodes.h:822
llvm::ISD::VSCALE
@ VSCALE
VSCALE(IMM) - Returns the runtime scaling factor used to calculate the number of elements within a sc...
Definition ISDOpcodes.h:1507
llvm::ISD::ATOMIC_CMP_SWAP
@ ATOMIC_CMP_SWAP
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo,...
Definition ISDOpcodes.h:1411
llvm::ISD::LOCAL_RECOVER
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition ISDOpcodes.h:135
llvm::ISD::FMINNUM
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum maximum on two values, following IEEE-754 definition...
Definition ISDOpcodes.h:1103
llvm::ISD::UBSANTRAP
@ UBSANTRAP
UBSANTRAP - Trap with an immediate describing the kind of sanitizer failure.
Definition ISDOpcodes.h:1378
llvm::ISD::SSHLSAT
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition ISDOpcodes.h:387
llvm::ISD::PATCHPOINT
@ PATCHPOINT
The llvm.experimental.patchpoint.
Definition ISDOpcodes.h:1587
llvm::ISD::SMULO
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:357
llvm::ISD::ATOMIC_LOAD_FMINIMUM
@ ATOMIC_LOAD_FMINIMUM
Definition ISDOpcodes.h:1442
llvm::ISD::DYNAMIC_STACKALLOC
@ DYNAMIC_STACKALLOC
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary.
Definition ISDOpcodes.h:1204
llvm::ISD::TargetFrameIndex
@ TargetFrameIndex
Definition ISDOpcodes.h:187
llvm::ISD::VECTOR_SPLICE_LEFT
@ VECTOR_SPLICE_LEFT
VECTOR_SPLICE_LEFT(VEC1, VEC2, OFFSET) - Shifts CONCAT_VECTORS(VEC1, VEC2) left by OFFSET elements an...
Definition ISDOpcodes.h:656
llvm::ISD::ANY_EXTEND_VECTOR_INREG
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition ISDOpcodes.h:910
llvm::ISD::SIGN_EXTEND_INREG
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition ISDOpcodes.h:899
llvm::ISD::SMIN
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:730
llvm::ISD::MASKED_UDIV
@ MASKED_UDIV
Masked vector arithmetic that returns poison on disabled lanes.
Definition ISDOpcodes.h:1666
llvm::ISD::VECTOR_REVERSE
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition ISDOpcodes.h:643
llvm::ISD::LIFETIME_START
@ LIFETIME_START
This corresponds to the llvm.lifetime.
Definition ISDOpcodes.h:1473
llvm::ISD::SDIVFIXSAT
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:414
llvm::ISD::FP_EXTEND
@ FP_EXTEND
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:989
llvm::ISD::GLOBAL_OFFSET_TABLE
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition ISDOpcodes.h:103
llvm::ISD::VSELECT
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:816
llvm::ISD::UADDO_CARRY
@ UADDO_CARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:329
llvm::ISD::STRICT_SINT_TO_FP
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition ISDOpcodes.h:487
llvm::ISD::MGATHER
@ MGATHER
Masked gather and scatter - load and store operations for a vector of random addresses with additiona...
Definition ISDOpcodes.h:1468
llvm::ISD::HANDLENODE
@ HANDLENODE
HANDLENODE node - Used as a handle for various purposes.
Definition ISDOpcodes.h:1354
llvm::ISD::STRICT_BF16_TO_FP
@ STRICT_BF16_TO_FP
Definition ISDOpcodes.h:1025
llvm::ISD::PCMARKER
@ PCMARKER
PCMARKER - This corresponds to the pcmarker intrinsic.
Definition ISDOpcodes.h:1337
llvm::ISD::STRICT_FROUNDEVEN
@ STRICT_FROUNDEVEN
Definition ISDOpcodes.h:467
llvm::ISD::INLINEASM_BR
@ INLINEASM_BR
INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
Definition ISDOpcodes.h:1260
llvm::ISD::EH_DWARF_CFA
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition ISDOpcodes.h:150
llvm::ISD::BF16_TO_FP
@ BF16_TO_FP
BF16_TO_FP, FP_TO_BF16 - These operators are used to perform promotions and truncation for bfloat16.
Definition ISDOpcodes.h:1023
llvm::ISD::FRAMEADDR
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition ISDOpcodes.h:110
llvm::ISD::ATOMIC_LOAD_UDEC_WRAP
@ ATOMIC_LOAD_UDEC_WRAP
Definition ISDOpcodes.h:1446
llvm::ISD::STRICT_FP_TO_UINT
@ STRICT_FP_TO_UINT
Definition ISDOpcodes.h:481
llvm::ISD::PEXT
@ PEXT
Parallel bit extract (compress) and parallel bit deposit (expand).
Definition ISDOpcodes.h:786
llvm::ISD::STRICT_FP_ROUND
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition ISDOpcodes.h:503
llvm::ISD::STRICT_FP_TO_SINT
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:480
llvm::ISD::FMINIMUM
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
Definition ISDOpcodes.h:1125
llvm::ISD::FP_TO_SINT
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:937
llvm::ISD::READCYCLECOUNTER
@ READCYCLECOUNTER
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
Definition ISDOpcodes.h:1345
llvm::ISD::TargetConstant
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition ISDOpcodes.h:179
llvm::ISD::STRICT_FP_EXTEND
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:508
llvm::ISD::RELOC_NONE
@ RELOC_NONE
Issue a no-op relocation against a given symbol at the current location.
Definition ISDOpcodes.h:1599
llvm::ISD::AND
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition ISDOpcodes.h:742
llvm::ISD::TRAP
@ TRAP
TRAP - Trapping instruction.
Definition ISDOpcodes.h:1371
llvm::ISD::INTRINSIC_WO_CHAIN
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition ISDOpcodes.h:205
llvm::ISD::GET_FPENV_MEM
@ GET_FPENV_MEM
Gets the current floating-point environment.
Definition ISDOpcodes.h:1170
llvm::ISD::PSEUDO_PROBE
@ PSEUDO_PROBE
Pseudo probe for AutoFDO, as a place holder in a basic block to improve the sample counts quality.
Definition ISDOpcodes.h:1502
llvm::ISD::STRICT_FP_TO_BF16
@ STRICT_FP_TO_BF16
Definition ISDOpcodes.h:1026
llvm::ISD::SCMP
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:738
llvm::ISD::CARRY_FALSE
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition ISDOpcodes.h:285
llvm::ISD::AVGFLOORS
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition ISDOpcodes.h:713
llvm::ISD::VECTOR_MATCH
@ VECTOR_MATCH
VECTOR_MATCH - this corresponds to the llvm.experimental.vector.match intrinsic.
Definition ISDOpcodes.h:1642
llvm::ISD::VECTOR_SPLICE_RIGHT
@ VECTOR_SPLICE_RIGHT
VECTOR_SPLICE_RIGHT(VEC1, VEC2, OFFSET) - Shifts CONCAT_VECTORS(VEC1,VEC2) right by OFFSET elements a...
Definition ISDOpcodes.h:660
llvm::ISD::ADDE
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:304
llvm::ISD::STRICT_FADD
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition ISDOpcodes.h:428
llvm::ISD::STACKMAP
@ STACKMAP
The llvm.experimental.stackmap intrinsic.
Definition ISDOpcodes.h:1581
llvm::ISD::SPLAT_VECTOR_PARTS
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition ISDOpcodes.h:684
llvm::ISD::FREEZE
@ FREEZE
FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or is evaluated to UNDEF),...
Definition ISDOpcodes.h:241
llvm::ISD::INSERT_VECTOR_ELT
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition ISDOpcodes.h:568
llvm::ISD::TokenFactor
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition ISDOpcodes.h:53
llvm::ISD::ATOMIC_SWAP
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
Definition ISDOpcodes.h:1425
llvm::ISD::CTTZ_ZERO_POISON
@ CTTZ_ZERO_POISON
Bit counting operators with a poisoned result for zero inputs.
Definition ISDOpcodes.h:798
llvm::ISD::ExternalSymbol
@ ExternalSymbol
Definition ISDOpcodes.h:93
llvm::ISD::FFREXP
@ FFREXP
FFREXP - frexp, extract fractional and exponent component of a floating-point value.
Definition ISDOpcodes.h:1069
llvm::ISD::FP_ROUND
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition ISDOpcodes.h:970
llvm::ISD::VECTOR_COMPRESS
@ VECTOR_COMPRESS
VECTOR_COMPRESS(Vec, Mask, Passthru) consecutively place vector elements based on mask e....
Definition ISDOpcodes.h:702
llvm::ISD::SPONENTRY
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition ISDOpcodes.h:122
llvm::ISD::CLEAR_CACHE
@ CLEAR_CACHE
llvm.clear_cache intrinsic Operands: Input Chain, Start Addres, End Address Outputs: Output Chain
Definition ISDOpcodes.h:1674
llvm::ISD::CONVERGENCECTRL_LOOP
@ CONVERGENCECTRL_LOOP
Definition ISDOpcodes.h:1604
llvm::ISD::ZERO_EXTEND_VECTOR_INREG
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition ISDOpcodes.h:932
llvm::ISD::ADDRSPACECAST
@ ADDRSPACECAST
ADDRSPACECAST - This operator converts between pointers of different address spaces.
Definition ISDOpcodes.h:1008
llvm::ISD::EXPERIMENTAL_VECTOR_HISTOGRAM
@ EXPERIMENTAL_VECTOR_HISTOGRAM
Experimental vector histogram intrinsic Operands: Input Chain, Inc, Mask, Base, Index,...
Definition ISDOpcodes.h:1613
llvm::ISD::INLINEASM
@ INLINEASM
INLINEASM - Represents an inline asm block.
Definition ISDOpcodes.h:1257
llvm::ISD::STRICT_FNEARBYINT
@ STRICT_FNEARBYINT
Definition ISDOpcodes.h:459
llvm::ISD::FP_TO_SINT_SAT
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:956
llvm::ISD::VECREDUCE_FMINIMUM
@ VECREDUCE_FMINIMUM
Definition ISDOpcodes.h:1540
llvm::ISD::EH_SJLJ_SETJMP
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition ISDOpcodes.h:162
llvm::ISD::TRUNCATE
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition ISDOpcodes.h:867
llvm::ISD::VAARG
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
Definition ISDOpcodes.h:1309
llvm::ISD::BRCOND
@ BRCOND
BRCOND - Conditional branch.
Definition ISDOpcodes.h:1233
llvm::ISD::VECREDUCE_SEQ_FMUL
@ VECREDUCE_SEQ_FMUL
Definition ISDOpcodes.h:1518
llvm::ISD::CONVERT_TO_ARBITRARY_FP
@ CONVERT_TO_ARBITRARY_FP
CONVERT_TO_ARBITRARY_FP - Converts a native FP value to an arbitrary floating-point format,...
Definition ISDOpcodes.h:1041
llvm::ISD::SHL_PARTS
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition ISDOpcodes.h:844
llvm::ISD::CATCHRET
@ CATCHRET
CATCHRET - Represents a return from a catch block funclet.
Definition ISDOpcodes.h:1276
llvm::ISD::GC_TRANSITION_END
@ GC_TRANSITION_END
Definition ISDOpcodes.h:1492
llvm::ISD::AssertSext
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition ISDOpcodes.h:62
llvm::ISD::ATOMIC_LOAD_UINC_WRAP
@ ATOMIC_LOAD_UINC_WRAP
Definition ISDOpcodes.h:1445
llvm::ISD::FCOPYSIGN
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:537
llvm::ISD::PARTIAL_REDUCE_SUMLA
@ PARTIAL_REDUCE_SUMLA
Definition ISDOpcodes.h:1575
llvm::ISD::SADDSAT
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:366
llvm::ISD::CALLSEQ_START
@ CALLSEQ_START
CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence,...
Definition ISDOpcodes.h:1303
llvm::ISD::VECTOR_DEINTERLEAVE
@ VECTOR_DEINTERLEAVE
VECTOR_DEINTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor ...
Definition ISDOpcodes.h:627
llvm::ISD::GET_DYNAMIC_AREA_OFFSET
@ GET_DYNAMIC_AREA_OFFSET
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca.
Definition ISDOpcodes.h:1498
llvm::ISD::CTTZ_ELTS_ZERO_POISON
@ CTTZ_ELTS_ZERO_POISON
Definition ISDOpcodes.h:1620
llvm::ISD::SET_FPENV_MEM
@ SET_FPENV_MEM
Sets the current floating point environment.
Definition ISDOpcodes.h:1175
llvm::ISD::FMINIMUMNUM
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with FMINNUM_IEEE and FMAXNUM_IEEE besid...
Definition ISDOpcodes.h:1130
llvm::ISD::TRUNCATE_SSAT_S
@ TRUNCATE_SSAT_S
TRUNCATE_[SU]SAT_[SU] - Truncate for saturated operand [SU] located in middle, prefix for SAT means i...
Definition ISDOpcodes.h:882
llvm::ISD::ABDS
@ ABDS
ABDS/ABDU - Absolute difference - Return the absolute difference between two numbers interpreted as s...
Definition ISDOpcodes.h:725
llvm::ISD::ADJUST_TRAMPOLINE
@ ADJUST_TRAMPOLINE
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
Definition ISDOpcodes.h:1368
llvm::ISD::TRUNCATE_USAT_U
@ TRUNCATE_USAT_U
Definition ISDOpcodes.h:886
llvm::ISD::SADDO_CARRY
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:339
llvm::ISD::INTRINSIC_W_CHAIN
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition ISDOpcodes.h:213
llvm::ISD::TargetGlobalTLSAddress
@ TargetGlobalTLSAddress
Definition ISDOpcodes.h:186
llvm::ISD::ABS_MIN_POISON
@ ABS_MIN_POISON
ABS with a poison result for INT_MIN.
Definition ISDOpcodes.h:754
llvm::ISD::BUILD_VECTOR
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition ISDOpcodes.h:559
llvm::ISD::LOOP_DEPENDENCE_WAR_MASK
@ LOOP_DEPENDENCE_WAR_MASK
The llvm.loop.dependence.
Definition ISDOpcodes.h:1660
llvm::ISD::MemIndexedMode
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition ISDOpcodes.h:1769
llvm::Intrinsic::getBaseName
LLVM_ABI StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
Definition Intrinsics.cpp:57
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition DefaultTargetInfo.h:21
llvm::dyn_cast
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
llvm::make_range
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
Definition iterator_range.h:67
llvm::interleaveComma
void interleaveComma(const Container &c, StreamT &os, UnaryFunctor each_fn)
Definition STLExtras.h:2329
llvm::utostr
std::string utostr(uint64_t X, bool isNeg=false)
Definition StringExtras.h:322
llvm::get
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
Definition PointerIntPair.h:256
llvm::dbgs
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition Debug.cpp:209
llvm::isa
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
llvm::Op
DWARFExpression::Operation Op
Definition DWARFExpressionPrinter.cpp:24
llvm::cast
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
llvm::printReg
LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Definition TargetRegisterInfo.cpp:107
raw_ostream.h
N
#define N
llvm::EVT::getEVTString
LLVM_ABI std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition ValueTypes.cpp:162
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