19#define DEBUG_TYPE "SBVec:Legality"
28std::optional<ResultReason>
29LegalityAnalysis::notVectorizableBasedOnOpcodesAndTypes(
31 auto *I0 = cast<Instruction>(Bndl[0]);
32 auto Opcode = I0->getOpcode();
35 return cast<Instruction>(V)->getOpcode() != Opcode;
50 if (isa<FPMathOperator>(I0)) {
51 FastMathFlags FMF0 = cast<Instruction>(Bndl[0])->getFastMathFlags();
53 return cast<Instruction>(V)->getFastMathFlags() != FMF0;
60 bool CanHaveWrapFlags =
61 isa<OverflowingBinaryOperator>(I0) || isa<TruncInst>(I0);
62 if (CanHaveWrapFlags) {
63 bool NUW0 = I0->hasNoUnsignedWrap();
64 bool NSW0 = I0->hasNoSignedWrap();
66 return cast<Instruction>(V)->hasNoUnsignedWrap() != NUW0 ||
67 cast<Instruction>(V)->hasNoSignedWrap() != NSW0;
75 case Instruction::Opcode::ZExt:
76 case Instruction::Opcode::SExt:
77 case Instruction::Opcode::FPToUI:
78 case Instruction::Opcode::FPToSI:
79 case Instruction::Opcode::FPExt:
80 case Instruction::Opcode::PtrToInt:
81 case Instruction::Opcode::IntToPtr:
82 case Instruction::Opcode::SIToFP:
83 case Instruction::Opcode::UIToFP:
84 case Instruction::Opcode::Trunc:
85 case Instruction::Opcode::FPTrunc:
86 case Instruction::Opcode::BitCast: {
90 return cast<Instruction>(V)->getOpcode() == Opcode;
92 "Different opcodes, should have early returned!");
102 case Instruction::Opcode::FCmp:
103 case Instruction::Opcode::ICmp: {
105 auto Pred0 = cast<CmpInst>(I0)->getPredicate();
107 return cast<CmpInst>(V)->getPredicate() == Pred0;
113 case Instruction::Opcode::Select:
114 case Instruction::Opcode::FNeg:
115 case Instruction::Opcode::Add:
116 case Instruction::Opcode::FAdd:
117 case Instruction::Opcode::Sub:
118 case Instruction::Opcode::FSub:
119 case Instruction::Opcode::Mul:
120 case Instruction::Opcode::FMul:
121 case Instruction::Opcode::FRem:
122 case Instruction::Opcode::UDiv:
123 case Instruction::Opcode::SDiv:
124 case Instruction::Opcode::FDiv:
125 case Instruction::Opcode::URem:
126 case Instruction::Opcode::SRem:
127 case Instruction::Opcode::Shl:
128 case Instruction::Opcode::LShr:
129 case Instruction::Opcode::AShr:
130 case Instruction::Opcode::And:
131 case Instruction::Opcode::Or:
132 case Instruction::Opcode::Xor:
134 case Instruction::Opcode::Load:
135 if (VecUtils::areConsecutive<LoadInst>(Bndl, SE, DL))
138 case Instruction::Opcode::Store:
139 if (VecUtils::areConsecutive<StoreInst>(Bndl, SE, DL))
142 case Instruction::Opcode::PHI:
144 case Instruction::Opcode::Opaque:
146 case Instruction::Opcode::Br:
147 case Instruction::Opcode::Ret:
148 case Instruction::Opcode::AddrSpaceCast:
149 case Instruction::Opcode::InsertElement:
150 case Instruction::Opcode::InsertValue:
151 case Instruction::Opcode::ExtractElement:
152 case Instruction::Opcode::ExtractValue:
153 case Instruction::Opcode::ShuffleVector:
154 case Instruction::Opcode::Call:
155 case Instruction::Opcode::GetElementPtr:
156 case Instruction::Opcode::Switch:
158 case Instruction::Opcode::VAArg:
159 case Instruction::Opcode::Freeze:
160 case Instruction::Opcode::Fence:
161 case Instruction::Opcode::Invoke:
162 case Instruction::Opcode::CallBr:
163 case Instruction::Opcode::LandingPad:
164 case Instruction::Opcode::CatchPad:
165 case Instruction::Opcode::CleanupPad:
166 case Instruction::Opcode::CatchRet:
167 case Instruction::Opcode::CleanupRet:
168 case Instruction::Opcode::Resume:
169 case Instruction::Opcode::CatchSwitch:
170 case Instruction::Opcode::AtomicRMW:
171 case Instruction::Opcode::AtomicCmpXchg:
172 case Instruction::Opcode::Alloca:
173 case Instruction::Opcode::Unreachable:
183 dbgs() << *V <<
"\n";
188 bool SkipScheduling) {
190 if (
any_of(Bndl, [](
auto *V) {
return !isa<Instruction>(V); })) {
196 if (
auto ReasonOpt = notVectorizableBasedOnOpcodesAndTypes(Bndl))
197 return createLegalityResult<Pack>(*ReasonOpt);
201 if (!SkipScheduling) {
211 return createLegalityResult<Widen>();
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
size_t size() const
size - Get the array size.
void reserve(size_type N)
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
The instances of the Type class are immutable: once they are created, they are never changed.
LLVM Value Representation.
const LegalityResult & canVectorize(ArrayRef< Value * > Bndl, bool SkipScheduling=false)
Checks if it's legal to vectorize the instructions in Bndl.
The legality outcome is represented by a class rather than an enum class because in some cases the le...
LLVM_DUMP_METHOD void dump() const
virtual void print(raw_ostream &OS) const
bool trySchedule(ArrayRef< Instruction * > Instrs)
static Type * getExpectedType(const Value *V)
\Returns the expected type of Value V.
A SandboxIR Value has users. This is the base class.
static Type * getElementType(Type *Ty)
Returns Ty if scalar or its element type if vector.
Type
MessagePack types as defined in the standard, with the exception of Integer being divided into a sign...
static SmallVector< Value *, 4 > getOperand(ArrayRef< Value * > Bndl, unsigned OpIdx)
static void dumpBndl(ArrayRef< Value * > Bndl)
auto drop_begin(T &&RangeOrContainer, size_t N=1)
Return a range covering RangeOrContainer with the first N elements excluded.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.