LLVM 23.0.0git
ShrinkWrap.cpp
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1//===- ShrinkWrap.cpp - Compute safe point for prolog/epilog insertion ----===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This pass looks for safe point where the prologue and epilogue can be
10// inserted.
11// The safe point for the prologue (resp. epilogue) is called Save
12// (resp. Restore).
13// A point is safe for prologue (resp. epilogue) if and only if
14// it 1) dominates (resp. post-dominates) all the frame related operations and
15// between 2) two executions of the Save (resp. Restore) point there is an
16// execution of the Restore (resp. Save) point.
17//
18// For instance, the following points are safe:
19// for (int i = 0; i < 10; ++i) {
20// Save
21// ...
22// Restore
23// }
24// Indeed, the execution looks like Save -> Restore -> Save -> Restore ...
25// And the following points are not:
26// for (int i = 0; i < 10; ++i) {
27// Save
28// ...
29// }
30// for (int i = 0; i < 10; ++i) {
31// ...
32// Restore
33// }
34// Indeed, the execution looks like Save -> Save -> ... -> Restore -> Restore.
35//
36// This pass also ensures that the safe points are 3) cheaper than the regular
37// entry and exits blocks.
38//
39// Property #1 is ensured via the use of MachineDominatorTree and
40// MachinePostDominatorTree.
41// Property #2 is ensured via property #1 and MachineLoopInfo, i.e., both
42// points must be in the same loop.
43// Property #3 is ensured via the MachineBlockFrequencyInfo.
44//
45// If this pass found points matching all these properties, then
46// MachineFrameInfo is updated with this information.
47//
48//===----------------------------------------------------------------------===//
49
51#include "llvm/ADT/BitVector.h"
53#include "llvm/ADT/SetVector.h"
55#include "llvm/ADT/Statistic.h"
56#include "llvm/Analysis/CFG.h"
76#include "llvm/IR/Attributes.h"
77#include "llvm/IR/Function.h"
79#include "llvm/MC/MCAsmInfo.h"
80#include "llvm/Pass.h"
82#include "llvm/Support/Debug.h"
86#include <cassert>
87#include <memory>
88
89using namespace llvm;
90
91#define DEBUG_TYPE "shrink-wrap"
92
93STATISTIC(NumFunc, "Number of functions");
94STATISTIC(NumCandidates, "Number of shrink-wrapping candidates");
95STATISTIC(NumCandidatesDropped,
96 "Number of shrink-wrapping candidates dropped because of frequency");
97
99EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden,
100 cl::desc("enable the shrink-wrapping pass"));
102 "enable-shrink-wrap-region-split", cl::init(true), cl::Hidden,
103 cl::desc("enable splitting of the restore block if possible"));
104
105namespace {
106
107/// Class to determine where the safe point to insert the
108/// prologue and epilogue are.
109/// Unlike the paper from Fred C. Chow, PLDI'88, that introduces the
110/// shrink-wrapping term for prologue/epilogue placement, this pass
111/// does not rely on expensive data-flow analysis. Instead we use the
112/// dominance properties and loop information to decide which point
113/// are safe for such insertion.
114class ShrinkWrapImpl {
115 /// Hold callee-saved information.
117 MachineDominatorTree *MDT = nullptr;
118 MachinePostDominatorTree *MPDT = nullptr;
119
120 /// Current safe point found for the prologue.
121 /// The prologue will be inserted before the first instruction
122 /// in this basic block.
123 MachineBasicBlock *Save = nullptr;
124
125 /// Current safe point found for the epilogue.
126 /// The epilogue will be inserted before the first terminator instruction
127 /// in this basic block.
128 MachineBasicBlock *Restore = nullptr;
129
130 /// Hold the information of the basic block frequency.
131 /// Use to check the profitability of the new points.
132 MachineBlockFrequencyInfo *MBFI = nullptr;
133
134 /// Hold the loop information. Used to determine if Save and Restore
135 /// are in the same loop.
136 MachineLoopInfo *MLI = nullptr;
137
138 // Emit remarks.
140
141 /// Frequency of the Entry block.
142 BlockFrequency EntryFreq;
143
144 /// Current opcode for frame setup.
145 unsigned FrameSetupOpcode = ~0u;
146
147 /// Current opcode for frame destroy.
148 unsigned FrameDestroyOpcode = ~0u;
149
150 /// Stack pointer register, used by llvm.{savestack,restorestack}
151 Register SP;
152
153 /// Entry block.
154 const MachineBasicBlock *Entry = nullptr;
155
156 using SetOfRegs = SmallSetVector<unsigned, 16>;
157
158 /// Registers that need to be saved for the current function.
159 mutable SetOfRegs CurrentCSRs;
160
161 /// Current MachineFunction.
162 MachineFunction *MachineFunc = nullptr;
163
164 /// Is `true` for the block numbers where we assume possible stack accesses
165 /// or computation of stack-relative addresses on any CFG path including the
166 /// block itself. Is `false` for basic blocks where we can guarantee the
167 /// opposite. False positives won't lead to incorrect analysis results,
168 /// therefore this approach is fair.
169 BitVector StackAddressUsedBlockInfo;
170
171 /// Check if \p MI uses or defines a callee-saved register or
172 /// a frame index. If this is the case, this means \p MI must happen
173 /// after Save and before Restore.
174 bool useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS,
175 bool StackAddressUsed) const;
176
177 const SetOfRegs &getCurrentCSRs(RegScavenger *RS) const {
178 if (CurrentCSRs.empty()) {
179 BitVector SavedRegs;
180 const TargetFrameLowering *TFI =
181 MachineFunc->getSubtarget().getFrameLowering();
182
183 TFI->determineCalleeSaves(*MachineFunc, SavedRegs, RS);
184
185 for (int Reg = SavedRegs.find_first(); Reg != -1;
186 Reg = SavedRegs.find_next(Reg))
187 CurrentCSRs.insert((unsigned)Reg);
188 }
189 return CurrentCSRs;
190 }
191
192 /// Update the Save and Restore points such that \p MBB is in
193 /// the region that is dominated by Save and post-dominated by Restore
194 /// and Save and Restore still match the safe point definition.
195 /// Such point may not exist and Save and/or Restore may be null after
196 /// this call.
197 void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS);
198
199 // Try to find safe point based on dominance and block frequency without
200 // any change in IR.
201 bool performShrinkWrapping(
202 const ReversePostOrderTraversal<MachineBasicBlock *> &RPOT,
203 RegScavenger *RS);
204
205 /// This function tries to split the restore point if doing so can shrink the
206 /// save point further. \return True if restore point is split.
207 bool postShrinkWrapping(bool HasCandidate, MachineFunction &MF,
208 RegScavenger *RS);
209
210 /// This function analyzes if the restore point can split to create a new
211 /// restore point. This function collects
212 /// 1. Any preds of current restore that are reachable by callee save/FI
213 /// blocks
214 /// - indicated by DirtyPreds
215 /// 2. Any preds of current restore that are not DirtyPreds - indicated by
216 /// CleanPreds
217 /// Both sets should be non-empty for considering restore point split.
218 bool checkIfRestoreSplittable(
219 const MachineBasicBlock *CurRestore,
220 const DenseSet<const MachineBasicBlock *> &ReachableByDirty,
221 SmallVectorImpl<MachineBasicBlock *> &DirtyPreds,
222 SmallVectorImpl<MachineBasicBlock *> &CleanPreds,
223 const TargetInstrInfo *TII, RegScavenger *RS);
224
225 /// Initialize the pass for \p MF.
226 void init(MachineFunction &MF) {
227 RCI.runOnMachineFunction(MF);
228 Save = nullptr;
229 Restore = nullptr;
230 EntryFreq = MBFI->getEntryFreq();
231 const TargetSubtargetInfo &Subtarget = MF.getSubtarget();
232 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
233 FrameSetupOpcode = TII.getCallFrameSetupOpcode();
234 FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
236 Entry = &MF.front();
237 CurrentCSRs.clear();
238 MachineFunc = &MF;
239
240 ++NumFunc;
241 }
242
243 /// Check whether or not Save and Restore points are still interesting for
244 /// shrink-wrapping.
245 bool ArePointsInteresting() const { return Save != Entry && Save && Restore; }
246
247public:
248 ShrinkWrapImpl(MachineDominatorTree *MDT, MachinePostDominatorTree *MPDT,
249 MachineBlockFrequencyInfo *MBFI, MachineLoopInfo *MLI,
250 MachineOptimizationRemarkEmitter *ORE)
251 : MDT(MDT), MPDT(MPDT), MBFI(MBFI), MLI(MLI), ORE(ORE) {}
252
253 /// Check if shrink wrapping is enabled for this target and function.
254 static bool isShrinkWrapEnabled(const MachineFunction &MF);
255
256 bool run(MachineFunction &MF);
257};
258
259class ShrinkWrapLegacy : public MachineFunctionPass {
260public:
261 static char ID;
262
263 ShrinkWrapLegacy() : MachineFunctionPass(ID) {}
264
265 void getAnalysisUsage(AnalysisUsage &AU) const override {
266 AU.setPreservesAll();
267 AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
268 AU.addRequired<MachineDominatorTreeWrapperPass>();
269 AU.addRequired<MachinePostDominatorTreeWrapperPass>();
270 AU.addRequired<MachineLoopInfoWrapperPass>();
271 AU.addRequired<MachineOptimizationRemarkEmitterPass>();
273 }
274
275 MachineFunctionProperties getRequiredProperties() const override {
276 return MachineFunctionProperties().setNoVRegs();
277 }
278
279 StringRef getPassName() const override { return "Shrink Wrapping analysis"; }
280
281 /// Perform the shrink-wrapping analysis and update
282 /// the MachineFrameInfo attached to \p MF with the results.
283 bool runOnMachineFunction(MachineFunction &MF) override;
284};
285
286} // end anonymous namespace
287
288char ShrinkWrapLegacy::ID = 0;
289
290char &llvm::ShrinkWrapID = ShrinkWrapLegacy::ID;
291
292INITIALIZE_PASS_BEGIN(ShrinkWrapLegacy, DEBUG_TYPE, "Shrink Wrap Pass", false,
293 false)
299INITIALIZE_PASS_END(ShrinkWrapLegacy, DEBUG_TYPE, "Shrink Wrap Pass", false,
300 false)
301
302bool ShrinkWrapImpl::useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS,
303 bool StackAddressUsed) const {
304 /// Check if \p Op is known to access an address not on the function's stack .
305 /// At the moment, accesses where the underlying object is a global, function
306 /// argument, or jump table are considered non-stack accesses. Note that the
307 /// caller's stack may get accessed when passing an argument via the stack,
308 /// but not the stack of the current function.
309 ///
310 auto IsKnownNonStackPtr = [](MachineMemOperand *Op) {
311 if (Op->getValue()) {
312 const Value *UO = getUnderlyingObject(Op->getValue());
313 if (!UO)
314 return false;
315 if (auto *Arg = dyn_cast<Argument>(UO))
316 return !Arg->hasPassPointeeByValueCopyAttr();
317 return isa<GlobalValue>(UO);
318 }
319 if (const PseudoSourceValue *PSV = Op->getPseudoValue())
320 return PSV->isJumpTable() || PSV->isConstantPool();
321 return false;
322 };
323 // Load/store operations may access the stack indirectly when we previously
324 // computed an address to a stack location.
325 if (StackAddressUsed && MI.mayLoadOrStore() &&
326 (MI.isCall() || MI.hasUnmodeledSideEffects() || MI.memoperands_empty() ||
327 !all_of(MI.memoperands(), IsKnownNonStackPtr)))
328 return true;
329
330 if (MI.getOpcode() == FrameSetupOpcode ||
331 MI.getOpcode() == FrameDestroyOpcode) {
332 LLVM_DEBUG(dbgs() << "Frame instruction: " << MI << '\n');
333 return true;
334 }
335 const MachineFunction *MF = MI.getParent()->getParent();
337 for (const MachineOperand &MO : MI.operands()) {
338 bool UseOrDefCSR = false;
339 if (MO.isReg()) {
340 // Ignore instructions like DBG_VALUE which don't read/def the register.
341 if (!MO.isDef() && !MO.readsReg())
342 continue;
343 Register PhysReg = MO.getReg();
344 if (!PhysReg)
345 continue;
346 assert(PhysReg.isPhysical() && "Unallocated register?!");
347 // The stack pointer is not normally described as a callee-saved register
348 // in calling convention definitions, so we need to watch for it
349 // separately. An SP mentioned by a call instruction, we can ignore,
350 // though, as it's harmless and we do not want to effectively disable tail
351 // calls by forcing the restore point to post-dominate them.
352 // PPC's LR is also not normally described as a callee-saved register in
353 // calling convention definitions, so we need to watch for it, too. An LR
354 // mentioned implicitly by a return (or "branch to link register")
355 // instruction we can ignore, otherwise we may pessimize shrinkwrapping.
356 // PPC's Frame pointer (FP) is also not described as a callee-saved
357 // register. Until the FP is assigned a Physical Register PPC's FP needs
358 // to be checked separately.
359 UseOrDefCSR = (!MI.isCall() && PhysReg == SP) ||
360 RCI.getLastCalleeSavedAlias(PhysReg) ||
361 (!MI.isReturn() &&
362 TRI->isNonallocatableRegisterCalleeSave(PhysReg)) ||
363 TRI->isVirtualFrameRegister(PhysReg);
364 } else if (MO.isRegMask()) {
365 // Check if this regmask clobbers any of the CSRs.
366 for (unsigned Reg : getCurrentCSRs(RS)) {
367 if (MO.clobbersPhysReg(Reg)) {
368 UseOrDefCSR = true;
369 break;
370 }
371 }
372 }
373 // Skip FrameIndex operands in DBG_VALUE instructions.
374 if (UseOrDefCSR || (MO.isFI() && !MI.isDebugValue())) {
375 LLVM_DEBUG(dbgs() << "Use or define CSR(" << UseOrDefCSR << ") or FI("
376 << MO.isFI() << "): " << MI << '\n');
377 return true;
378 }
379 }
380 return false;
381}
382
383/// Helper function to find the immediate (post) dominator.
384template <typename ListOfBBs, typename DominanceAnalysis>
386 DominanceAnalysis &Dom, bool Strict = true) {
387 MachineBasicBlock *IDom = Dom.findNearestCommonDominator(iterator_range(BBs));
388 if (Strict && IDom == &Block)
389 return nullptr;
390 return IDom;
391}
392
394 MachineBasicBlock &Entry) {
395 // Check if the block is analyzable.
396 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
398 return !TII.analyzeBranch(Entry, TBB, FBB, Cond);
399}
400
401/// Determines if any predecessor of MBB is on the path from block that has use
402/// or def of CSRs/FI to MBB.
403/// ReachableByDirty: All blocks reachable from block that has use or def of
404/// CSR/FI.
405static bool
407 const MachineBasicBlock &MBB) {
408 for (const MachineBasicBlock *PredBB : MBB.predecessors())
409 if (ReachableByDirty.count(PredBB))
410 return true;
411 return false;
412}
413
414/// Derives the list of all the basic blocks reachable from MBB.
416 const MachineBasicBlock &MBB) {
417 SmallVector<MachineBasicBlock *, 4> Worklist(MBB.successors());
418 Visited.insert(&MBB);
419 while (!Worklist.empty()) {
420 MachineBasicBlock *SuccMBB = Worklist.pop_back_val();
421 if (!Visited.insert(SuccMBB).second)
422 continue;
423 Worklist.append(SuccMBB->succ_begin(), SuccMBB->succ_end());
424 }
425}
426
427/// Collect blocks reachable by use or def of CSRs/FI.
430 DenseSet<const MachineBasicBlock *> &ReachableByDirty) {
431 for (const MachineBasicBlock *MBB : DirtyBBs) {
432 if (ReachableByDirty.count(MBB))
433 continue;
434 // Mark all offsprings as reachable.
435 markAllReachable(ReachableByDirty, *MBB);
436 }
437}
438
439/// \return true if there is a clean path from SavePoint to the original
440/// Restore.
441static bool
445 SmallVector<MachineBasicBlock *, 4> Worklist(CleanPreds);
446 while (!Worklist.empty()) {
447 MachineBasicBlock *CleanBB = Worklist.pop_back_val();
448 if (CleanBB == SavePoint)
449 return true;
450 if (!Visited.insert(CleanBB).second || !CleanBB->pred_size())
451 continue;
452 Worklist.append(CleanBB->pred_begin(), CleanBB->pred_end());
453 }
454 return false;
455}
456
457/// This function updates the branches post restore point split.
458///
459/// Restore point has been split.
460/// Old restore point: MBB
461/// New restore point: NMBB
462/// Any basic block(say BBToUpdate) which had a fallthrough to MBB
463/// previously should
464/// 1. Fallthrough to NMBB iff NMBB is inserted immediately above MBB in the
465/// block layout OR
466/// 2. Branch unconditionally to NMBB iff NMBB is inserted at any other place.
467static void updateTerminator(MachineBasicBlock *BBToUpdate,
468 MachineBasicBlock *NMBB,
469 const TargetInstrInfo *TII) {
470 DebugLoc DL = BBToUpdate->findBranchDebugLoc();
471 // if NMBB isn't the new layout successor for BBToUpdate, insert unconditional
472 // branch to it
473 if (!BBToUpdate->isLayoutSuccessor(NMBB))
474 TII->insertUnconditionalBranch(*BBToUpdate, NMBB, DL);
475}
476
477/// This function splits the restore point and returns new restore point/BB.
478///
479/// DirtyPreds: Predessors of \p MBB that are ReachableByDirty
480///
481/// Decision has been made to split the restore point.
482/// old restore point: \p MBB
483/// new restore point: \p NMBB
484/// This function makes the necessary block layout changes so that
485/// 1. \p NMBB points to \p MBB unconditionally
486/// 2. All dirtyPreds that previously pointed to \p MBB point to \p NMBB
487static MachineBasicBlock *
490 const TargetInstrInfo *TII) {
491 MachineFunction *MF = MBB->getParent();
492
493 // get the list of DirtyPreds who have a fallthrough to MBB
494 // before the block layout change. This is just to ensure that if the NMBB is
495 // inserted after MBB, then we create unconditional branch from
496 // DirtyPred/CleanPred to NMBB
498 for (MachineBasicBlock *BB : DirtyPreds)
499 if (BB->getFallThrough(false) == MBB)
500 MBBFallthrough.insert(BB);
501
503 // Insert this block at the end of the function. Inserting in between may
504 // interfere with control flow optimizer decisions.
505 MF->insert(MF->end(), NMBB);
506
507 for (const MachineBasicBlock::RegisterMaskPair &LI : MBB->liveins())
508 NMBB->addLiveIn(LI.PhysReg);
509
510 TII->insertUnconditionalBranch(*NMBB, MBB, DebugLoc());
511
512 // After splitting, all predecessors of the restore point should be dirty
513 // blocks.
514 for (MachineBasicBlock *SuccBB : DirtyPreds)
515 SuccBB->ReplaceUsesOfBlockWith(MBB, NMBB);
516
517 NMBB->addSuccessor(MBB);
518
519 for (MachineBasicBlock *BBToUpdate : MBBFallthrough)
520 updateTerminator(BBToUpdate, NMBB, TII);
521
522 return NMBB;
523}
524
525/// This function undoes the restore point split done earlier.
526///
527/// DirtyPreds: All predecessors of \p NMBB that are ReachableByDirty.
528///
529/// Restore point was split and the change needs to be unrolled. Make necessary
530/// changes to reset restore point from \p NMBB to \p MBB.
534 const TargetInstrInfo *TII) {
535 // For a BB, if NMBB is fallthrough in the current layout, then in the new
536 // layout a. BB should fallthrough to MBB OR b. BB should undconditionally
537 // branch to MBB
539 for (MachineBasicBlock *BB : DirtyPreds)
540 if (BB->getFallThrough(false) == NMBB)
541 NMBBFallthrough.insert(BB);
542
543 NMBB->removeSuccessor(MBB);
544 for (MachineBasicBlock *SuccBB : DirtyPreds)
545 SuccBB->ReplaceUsesOfBlockWith(NMBB, MBB);
546
547 NMBB->erase(NMBB->begin(), NMBB->end());
548 NMBB->eraseFromParent();
549
550 for (MachineBasicBlock *BBToUpdate : NMBBFallthrough)
551 updateTerminator(BBToUpdate, MBB, TII);
552}
553
554// A block is deemed fit for restore point split iff there exist
555// 1. DirtyPreds - preds of CurRestore reachable from use or def of CSR/FI
556// 2. CleanPreds - preds of CurRestore that arent DirtyPreds
557bool ShrinkWrapImpl::checkIfRestoreSplittable(
558 const MachineBasicBlock *CurRestore,
559 const DenseSet<const MachineBasicBlock *> &ReachableByDirty,
562 const TargetInstrInfo *TII, RegScavenger *RS) {
563 for (const MachineInstr &MI : *CurRestore)
564 if (useOrDefCSROrFI(MI, RS, /*StackAddressUsed=*/true))
565 return false;
566
567 for (MachineBasicBlock *PredBB : CurRestore->predecessors()) {
568 if (!isAnalyzableBB(*TII, *PredBB))
569 return false;
570
571 if (ReachableByDirty.count(PredBB))
572 DirtyPreds.push_back(PredBB);
573 else
574 CleanPreds.push_back(PredBB);
575 }
576
577 return !(CleanPreds.empty() || DirtyPreds.empty());
578}
579
580bool ShrinkWrapImpl::postShrinkWrapping(bool HasCandidate, MachineFunction &MF,
581 RegScavenger *RS) {
583 return false;
584
585 MachineBasicBlock *InitSave = nullptr;
586 MachineBasicBlock *InitRestore = nullptr;
587
588 if (HasCandidate) {
589 InitSave = Save;
590 InitRestore = Restore;
591 } else {
592 InitRestore = nullptr;
593 InitSave = &MF.front();
594 for (MachineBasicBlock &MBB : MF) {
595 if (MBB.isEHFuncletEntry())
596 return false;
597 if (MBB.isReturnBlock()) {
598 // Do not support multiple restore points.
599 if (InitRestore)
600 return false;
601 InitRestore = &MBB;
602 }
603 }
604 }
605
606 if (!InitSave || !InitRestore || InitRestore == InitSave ||
607 !MDT->dominates(InitSave, InitRestore) ||
608 !MPDT->dominates(InitRestore, InitSave))
609 return false;
610
611 // Bail out of the optimization if any of the basic block is target of
612 // INLINEASM_BR instruction
613 for (MachineBasicBlock &MBB : MF)
615 return false;
616
617 DenseSet<const MachineBasicBlock *> DirtyBBs;
618 for (MachineBasicBlock &MBB : MF) {
619 if (!MDT->isReachableFromEntry(&MBB))
620 continue;
621 if (MBB.isEHPad()) {
622 DirtyBBs.insert(&MBB);
623 continue;
624 }
625 for (const MachineInstr &MI : MBB)
626 if (useOrDefCSROrFI(MI, RS, /*StackAddressUsed=*/true)) {
627 DirtyBBs.insert(&MBB);
628 break;
629 }
630 }
631
632 // Find blocks reachable from the use or def of CSRs/FI.
633 DenseSet<const MachineBasicBlock *> ReachableByDirty;
634 collectBlocksReachableByDirty(DirtyBBs, ReachableByDirty);
635
636 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
639 if (!checkIfRestoreSplittable(InitRestore, ReachableByDirty, DirtyPreds,
640 CleanPreds, TII, RS))
641 return false;
642
643 // Trying to reach out to the new save point which dominates all dirty blocks.
644 MachineBasicBlock *NewSave =
645 FindIDom<>(**DirtyPreds.begin(), DirtyPreds, *MDT, false);
646
647 while (NewSave && (hasDirtyPred(ReachableByDirty, *NewSave) ||
648 EntryFreq < MBFI->getBlockFreq(NewSave) ||
649 /*Entry freq has been observed more than a loop block in
650 some cases*/
651 MLI->getLoopFor(NewSave))) {
652 SmallVector<MachineBasicBlock*> ReachablePreds;
653 for (auto BB: NewSave->predecessors())
654 if (MDT->isReachableFromEntry(BB))
655 ReachablePreds.push_back(BB);
656 if (ReachablePreds.empty())
657 break;
658
659 NewSave = FindIDom<>(**ReachablePreds.begin(), ReachablePreds, *MDT,
660 false);
661 }
662
663 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
664 if (!NewSave || NewSave == InitSave ||
665 isSaveReachableThroughClean(NewSave, CleanPreds) ||
666 !TFI->canUseAsPrologue(*NewSave))
667 return false;
668
669 // Now we know that splitting a restore point can isolate the restore point
670 // from clean blocks and doing so can shrink the save point.
671 MachineBasicBlock *NewRestore =
672 tryToSplitRestore(InitRestore, DirtyPreds, TII);
673
674 // Make sure if the new restore point is valid as an epilogue, depending on
675 // targets.
676 if (!TFI->canUseAsEpilogue(*NewRestore)) {
677 rollbackRestoreSplit(MF, NewRestore, InitRestore, DirtyPreds, TII);
678 return false;
679 }
680
681 Save = NewSave;
682 Restore = NewRestore;
683
684 MDT->recalculate(MF);
685 MPDT->recalculate(MF);
686
687 assert((MDT->dominates(Save, Restore) && MPDT->dominates(Restore, Save)) &&
688 "Incorrect save or restore point due to dominance relations");
689 assert((!MLI->getLoopFor(Save) && !MLI->getLoopFor(Restore)) &&
690 "Unexpected save or restore point in a loop");
691 assert((EntryFreq >= MBFI->getBlockFreq(Save) &&
692 EntryFreq >= MBFI->getBlockFreq(Restore)) &&
693 "Incorrect save or restore point based on block frequency");
694 return true;
695}
696
697void ShrinkWrapImpl::updateSaveRestorePoints(MachineBasicBlock &MBB,
698 RegScavenger *RS) {
699 // Get rid of the easy cases first.
700 if (!Save)
701 Save = &MBB;
702 else
703 Save = MDT->findNearestCommonDominator(Save, &MBB);
704 assert(Save);
705
706 if (!Restore)
707 Restore = &MBB;
708 else if (MPDT->getNode(&MBB)) // If the block is not in the post dom tree, it
709 // means the block never returns. If that's the
710 // case, we don't want to call
711 // `findNearestCommonDominator`, which will
712 // return `Restore`.
713 Restore = MPDT->findNearestCommonDominator(Restore, &MBB);
714 else
715 Restore = nullptr; // Abort, we can't find a restore point in this case.
716
717 // Make sure we would be able to insert the restore code before the
718 // terminator.
719 if (Restore == &MBB) {
720 for (const MachineInstr &Terminator : MBB.terminators()) {
721 if (!useOrDefCSROrFI(Terminator, RS, /*StackAddressUsed=*/true))
722 continue;
723 // One of the terminator needs to happen before the restore point.
724 if (MBB.succ_empty()) {
725 Restore = nullptr; // Abort, we can't find a restore point in this case.
726 break;
727 }
728 // Look for a restore point that post-dominates all the successors.
729 // The immediate post-dominator is what we are looking for.
730 Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
731 break;
732 }
733 }
734
735 if (!Restore) {
737 dbgs() << "Restore point needs to be spanned on several blocks\n");
738 return;
739 }
740
741 // Make sure Save and Restore are suitable for shrink-wrapping:
742 // 1. all path from Save needs to lead to Restore before exiting.
743 // 2. all path to Restore needs to go through Save from Entry.
744 // We achieve that by making sure that:
745 // A. Save dominates Restore.
746 // B. Restore post-dominates Save.
747 // C. Save and Restore are in the same loop.
748 bool SaveDominatesRestore = false;
749 bool RestorePostDominatesSave = false;
750 while (Restore &&
751 (!(SaveDominatesRestore = MDT->dominates(Save, Restore)) ||
752 !(RestorePostDominatesSave = MPDT->dominates(Restore, Save)) ||
753 // Post-dominance is not enough in loops to ensure that all uses/defs
754 // are after the prologue and before the epilogue at runtime.
755 // E.g.,
756 // while(1) {
757 // Save
758 // Restore
759 // if (...)
760 // break;
761 // use/def CSRs
762 // }
763 // All the uses/defs of CSRs are dominated by Save and post-dominated
764 // by Restore. However, the CSRs uses are still reachable after
765 // Restore and before Save are executed.
766 //
767 // For now, just push the restore/save points outside of loops.
768 // FIXME: Refine the criteria to still find interesting cases
769 // for loops.
770 MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
771 // Fix (A).
772 if (!SaveDominatesRestore) {
773 Save = MDT->findNearestCommonDominator(Save, Restore);
774 continue;
775 }
776 // Fix (B).
777 if (!RestorePostDominatesSave)
778 Restore = MPDT->findNearestCommonDominator(Restore, Save);
779
780 // Fix (C).
781 if (Restore && (MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
782 if (MLI->getLoopDepth(Save) > MLI->getLoopDepth(Restore)) {
783 // Push Save outside of this loop if immediate dominator is different
784 // from save block. If immediate dominator is not different, bail out.
785 Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
786 if (!Save)
787 break;
788 } else {
789 // If the loop does not exit, there is no point in looking
790 // for a post-dominator outside the loop.
791 SmallVector<MachineBasicBlock*, 4> ExitBlocks;
792 MLI->getLoopFor(Restore)->getExitingBlocks(ExitBlocks);
793 // Push Restore outside of this loop.
794 // Look for the immediate post-dominator of the loop exits.
795 MachineBasicBlock *IPdom = Restore;
796 for (MachineBasicBlock *LoopExitBB: ExitBlocks) {
797 IPdom = FindIDom<>(*IPdom, LoopExitBB->successors(), *MPDT);
798 if (!IPdom)
799 break;
800 }
801 // If the immediate post-dominator is not in a less nested loop,
802 // then we are stuck in a program with an infinite loop.
803 // In that case, we will not find a safe point, hence, bail out.
804 if (IPdom && MLI->getLoopDepth(IPdom) < MLI->getLoopDepth(Restore))
805 Restore = IPdom;
806 else {
807 Restore = nullptr;
808 break;
809 }
810 }
811 }
812 }
813}
814
816 StringRef RemarkName, StringRef RemarkMessage,
817 const DiagnosticLocation &Loc,
818 const MachineBasicBlock *MBB) {
819 ORE->emit([&]() {
821 << RemarkMessage;
822 });
823
824 LLVM_DEBUG(dbgs() << RemarkMessage << '\n');
825 return false;
826}
827
828bool ShrinkWrapImpl::performShrinkWrapping(
829 const ReversePostOrderTraversal<MachineBasicBlock *> &RPOT,
830 RegScavenger *RS) {
831 for (MachineBasicBlock *MBB : RPOT) {
832 LLVM_DEBUG(dbgs() << "Look into: " << printMBBReference(*MBB) << '\n');
833
834 if (MBB->isEHFuncletEntry())
835 return giveUpWithRemarks(ORE, "UnsupportedEHFunclets",
836 "EH Funclets are not supported yet.",
837 MBB->front().getDebugLoc(), MBB);
838
840 // Push the prologue and epilogue outside of the region that may throw (or
841 // jump out via inlineasm_br), by making sure that all the landing pads
842 // are at least at the boundary of the save and restore points. The
843 // problem is that a basic block can jump out from the middle in these
844 // cases, which we do not handle.
845 updateSaveRestorePoints(*MBB, RS);
846 if (!ArePointsInteresting()) {
847 LLVM_DEBUG(dbgs() << "EHPad/inlineasm_br prevents shrink-wrapping\n");
848 return false;
849 }
850 continue;
851 }
852
853 bool StackAddressUsed = false;
854 // Check if we found any stack accesses in the predecessors. We are not
855 // doing a full dataflow analysis here to keep things simple but just
856 // rely on a reverse portorder traversal (RPOT) to guarantee predecessors
857 // are already processed except for loops (and accept the conservative
858 // result for loops).
859 for (const MachineBasicBlock *Pred : MBB->predecessors()) {
860 if (StackAddressUsedBlockInfo.test(Pred->getNumber())) {
861 StackAddressUsed = true;
862 break;
863 }
864 }
865
866 for (const MachineInstr &MI : *MBB) {
867 if (useOrDefCSROrFI(MI, RS, StackAddressUsed)) {
868 // Save (resp. restore) point must dominate (resp. post dominate)
869 // MI. Look for the proper basic block for those.
870 updateSaveRestorePoints(*MBB, RS);
871 // If we are at a point where we cannot improve the placement of
872 // save/restore instructions, just give up.
873 if (!ArePointsInteresting()) {
874 LLVM_DEBUG(dbgs() << "No Shrink wrap candidate found\n");
875 return false;
876 }
877 // No need to look for other instructions, this basic block
878 // will already be part of the handled region.
879 StackAddressUsed = true;
880 break;
881 }
882 }
883 StackAddressUsedBlockInfo[MBB->getNumber()] = StackAddressUsed;
884 }
885 if (!ArePointsInteresting()) {
886 // If the points are not interesting at this point, then they must be null
887 // because it means we did not encounter any frame/CSR related code.
888 // Otherwise, we would have returned from the previous loop.
889 assert(!Save && !Restore && "We miss a shrink-wrap opportunity?!");
890 LLVM_DEBUG(dbgs() << "Nothing to shrink-wrap\n");
891 return false;
892 }
893
894 LLVM_DEBUG(dbgs() << "\n ** Results **\nFrequency of the Entry: "
895 << EntryFreq.getFrequency() << '\n');
896
897 const TargetFrameLowering *TFI =
898 MachineFunc->getSubtarget().getFrameLowering();
899 do {
900 LLVM_DEBUG(dbgs() << "Shrink wrap candidates (#, Name, Freq):\nSave: "
901 << printMBBReference(*Save) << ' '
902 << printBlockFreq(*MBFI, *Save)
903 << "\nRestore: " << printMBBReference(*Restore) << ' '
904 << printBlockFreq(*MBFI, *Restore) << '\n');
905
906 bool IsSaveCheap, TargetCanUseSaveAsPrologue = false;
907 if (((IsSaveCheap = EntryFreq >= MBFI->getBlockFreq(Save)) &&
908 EntryFreq >= MBFI->getBlockFreq(Restore)) &&
909 ((TargetCanUseSaveAsPrologue = TFI->canUseAsPrologue(*Save)) &&
910 TFI->canUseAsEpilogue(*Restore)))
911 break;
913 dbgs() << "New points are too expensive or invalid for the target\n");
914 MachineBasicBlock *NewBB;
915 if (!IsSaveCheap || !TargetCanUseSaveAsPrologue) {
916 Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
917 if (!Save)
918 break;
919 NewBB = Save;
920 } else {
921 // Restore is expensive.
922 Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
923 if (!Restore)
924 break;
925 NewBB = Restore;
926 }
927 updateSaveRestorePoints(*NewBB, RS);
928 } while (Save && Restore);
929
930 if (!ArePointsInteresting()) {
931 ++NumCandidatesDropped;
932 return false;
933 }
934 return true;
935}
936
937bool ShrinkWrapImpl::run(MachineFunction &MF) {
938 LLVM_DEBUG(dbgs() << "**** Analysing " << MF.getName() << '\n');
939
940 init(MF);
941
942 ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.begin());
944 // If MF is irreducible, a block may be in a loop without
945 // MachineLoopInfo reporting it. I.e., we may use the
946 // post-dominance property in loops, which lead to incorrect
947 // results. Moreover, we may miss that the prologue and
948 // epilogue are not in the same loop, leading to unbalanced
949 // construction/deconstruction of the stack frame.
950 return giveUpWithRemarks(ORE, "UnsupportedIrreducibleCFG",
951 "Irreducible CFGs are not supported yet.",
952 MF.getFunction().getSubprogram(), &MF.front());
953 }
954
955 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
956 std::unique_ptr<RegScavenger> RS(
957 TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr);
958
959 bool Changed = false;
960
961 // Initially, conservatively assume that stack addresses can be used in each
962 // basic block and change the state only for those basic blocks for which we
963 // were able to prove the opposite.
964 StackAddressUsedBlockInfo.resize(MF.getNumBlockIDs(), true);
965 bool HasCandidate = performShrinkWrapping(RPOT, RS.get());
966 StackAddressUsedBlockInfo.clear();
967 Changed = postShrinkWrapping(HasCandidate, MF, RS.get());
968 if (!HasCandidate && !Changed)
969 return false;
970 if (!ArePointsInteresting())
971 return Changed;
972
973 LLVM_DEBUG(dbgs() << "Final shrink wrap candidates:\nSave: "
974 << printMBBReference(*Save) << ' '
975 << "\nRestore: " << printMBBReference(*Restore) << '\n');
976
977 MachineFrameInfo &MFI = MF.getFrameInfo();
978
979 // List of CalleeSavedInfo for registers will be added during prologepilog
980 // pass
981 SaveRestorePoints SavePoints({{Save, {}}});
982 SaveRestorePoints RestorePoints({{Restore, {}}});
983
984 MFI.setSavePoints(SavePoints);
985 MFI.setRestorePoints(RestorePoints);
986 ++NumCandidates;
987 return Changed;
988}
989
990bool ShrinkWrapLegacy::runOnMachineFunction(MachineFunction &MF) {
991 if (skipFunction(MF.getFunction()) || MF.empty() ||
992 !ShrinkWrapImpl::isShrinkWrapEnabled(MF))
993 return false;
994
995 MachineDominatorTree *MDT =
996 &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
997 MachinePostDominatorTree *MPDT =
998 &getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree();
999 MachineBlockFrequencyInfo *MBFI =
1000 &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
1001 MachineLoopInfo *MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
1002 MachineOptimizationRemarkEmitter *ORE =
1003 &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
1004
1005 return ShrinkWrapImpl(MDT, MPDT, MBFI, MLI, ORE).run(MF);
1006}
1007
1010 MFPropsModifier _(*this, MF);
1011 if (MF.empty() || !ShrinkWrapImpl::isShrinkWrapEnabled(MF))
1012 return PreservedAnalyses::all();
1013
1022
1023 ShrinkWrapImpl(&MDT, &MPDT, &MBFI, &MLI, &ORE).run(MF);
1024 return PreservedAnalyses::all();
1025}
1026
1027bool ShrinkWrapImpl::isShrinkWrapEnabled(const MachineFunction &MF) {
1029
1030 switch (EnableShrinkWrapOpt) {
1031 case cl::BOU_UNSET:
1032 return TFI->enableShrinkWrapping(MF) &&
1033 // Windows with CFI has some limitations that make it impossible
1034 // to use shrink-wrapping.
1036 // Sanitizers look at the value of the stack at the location
1037 // of the crash. Since a crash can happen anywhere, the
1038 // frame must be lowered before anything else happen for the
1039 // sanitizers to be able to get a correct stack frame.
1040 !(MF.getFunction().hasFnAttribute(Attribute::SanitizeAddress) ||
1041 MF.getFunction().hasFnAttribute(Attribute::SanitizeThread) ||
1042 MF.getFunction().hasFnAttribute(Attribute::SanitizeMemory) ||
1043 MF.getFunction().hasFnAttribute(Attribute::SanitizeType) ||
1044 MF.getFunction().hasFnAttribute(Attribute::SanitizeHWAddress));
1045 // If EnableShrinkWrap is set, it takes precedence on whatever the
1046 // target sets. The rational is that we assume we want to test
1047 // something related to shrink-wrapping.
1048 case cl::BOU_TRUE:
1049 return true;
1050 case cl::BOU_FALSE:
1051 return false;
1052 }
1053 llvm_unreachable("Invalid shrink-wrapping state");
1054}
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
aarch64 promote const
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file contains the simple types necessary to represent the attributes associated with functions a...
This file implements the BitVector class.
#define DEBUG_TYPE
const HexagonInstrInfo * TII
#define _
IRTranslator LLVM IR MI
===- MachineOptimizationRemarkEmitter.h - Opt Diagnostics -*- C++ -*-—===//
Register Reg
Register const TargetRegisterInfo * TRI
if(PassOpts->AAPipeline)
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition PassSupport.h:42
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition PassSupport.h:44
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition PassSupport.h:39
This file builds on the ADT/GraphTraits.h file to build a generic graph post order iterator.
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
const SmallVectorImpl< MachineOperand > & Cond
This file declares the machine register scavenger class.
This file implements a set that has insertion order iteration characteristics.
static void markAllReachable(DenseSet< const MachineBasicBlock * > &Visited, const MachineBasicBlock &MBB)
Derives the list of all the basic blocks reachable from MBB.
static void updateTerminator(MachineBasicBlock *BBToUpdate, MachineBasicBlock *NMBB, const TargetInstrInfo *TII)
This function updates the branches post restore point split.
static MachineBasicBlock * tryToSplitRestore(MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)
This function splits the restore point and returns new restore point/BB.
static bool hasDirtyPred(const DenseSet< const MachineBasicBlock * > &ReachableByDirty, const MachineBasicBlock &MBB)
Determines if any predecessor of MBB is on the path from block that has use or def of CSRs/FI to MBB.
static bool giveUpWithRemarks(MachineOptimizationRemarkEmitter *ORE, StringRef RemarkName, StringRef RemarkMessage, const DiagnosticLocation &Loc, const MachineBasicBlock *MBB)
static cl::opt< bool > EnablePostShrinkWrapOpt("enable-shrink-wrap-region-split", cl::init(true), cl::Hidden, cl::desc("enable splitting of the restore block if possible"))
static void rollbackRestoreSplit(MachineFunction &MF, MachineBasicBlock *NMBB, MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)
This function undoes the restore point split done earlier.
static bool isAnalyzableBB(const TargetInstrInfo &TII, MachineBasicBlock &Entry)
static bool isSaveReachableThroughClean(const MachineBasicBlock *SavePoint, ArrayRef< MachineBasicBlock * > CleanPreds)
static cl::opt< cl::boolOrDefault > EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, cl::desc("enable the shrink-wrapping pass"))
static void collectBlocksReachableByDirty(const DenseSet< const MachineBasicBlock * > &DirtyBBs, DenseSet< const MachineBasicBlock * > &ReachableByDirty)
Collect blocks reachable by use or def of CSRs/FI.
static MachineBasicBlock * FindIDom(MachineBasicBlock &Block, ListOfBBs BBs, DominanceAnalysis &Dom, bool Strict=true)
Helper function to find the immediate (post) dominator.
This file defines the SmallVector class.
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
Definition Statistic.h:171
#define LLVM_DEBUG(...)
Definition Debug.h:114
This file describes how to lower LLVM code to machine code.
PassT::Result & getResult(IRUnitT &IR, ExtraArgTs... ExtraArgs)
Get the result of an analysis pass for a given IR unit.
AnalysisUsage & addRequired()
void setPreservesAll()
Set by analyses that do not transform their input at all.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
bool test(unsigned Idx) const
Definition BitVector.h:480
int find_first() const
find_first - Returns the index of the first set bit, -1 if none of the bits are set.
Definition BitVector.h:319
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
Definition BitVector.h:360
void clear()
clear - Removes all bits from the bitvector.
Definition BitVector.h:354
int find_next(unsigned Prev) const
find_next - Returns the index of the next set bit following the "Prev" bit.
Definition BitVector.h:327
uint64_t getFrequency() const
Returns the frequency as a fixpoint number scaled by the entry frequency.
A debug info location.
Definition DebugLoc.h:123
Implements a dense probed hash-table based set.
Definition DenseSet.h:279
NodeT * findNearestCommonDominator(NodeT *A, NodeT *B) const
Find nearest common dominator basic block for basic block A and B.
bool dominates(const DomTreeNodeBase< NodeT > *A, const DomTreeNodeBase< NodeT > *B) const
dominates - Returns true iff A dominates B.
void recalculate(ParentType &Func)
recalculate - compute a dominator tree for the given function
bool isReachableFromEntry(const NodeT *A) const
isReachableFromEntry - Return true if A is dominated by the entry block of the function containing it...
DomTreeNodeBase< NodeT > * getNode(const NodeT *BB) const
getNode - return the (Post)DominatorTree node for the specified basic block.
DISubprogram * getSubprogram() const
Get the attached subprogram.
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition Function.cpp:729
void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const
Return all blocks inside the loop that have successors outside of the loop.
unsigned getLoopDepth(const BlockT *BB) const
Return the loop nesting level of the specified block.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
bool usesWindowsCFI() const
Definition MCAsmInfo.h:656
An RAII based helper class to modify MachineFunctionProperties when running pass.
bool isInlineAsmBrIndirectTarget() const
Returns true if this is the indirect dest of an INLINEASM_BR.
bool isEHPad() const
Returns true if the block is a landing pad.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
LLVM_ABI void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
LLVM_ABI void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
LLVM_ABI bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
LLVM_ABI void eraseFromParent()
This method unlinks 'this' from the containing function and deletes it.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
LLVM_ABI instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
iterator_range< iterator > terminators()
LLVM_ABI DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
iterator_range< succ_iterator > successors()
iterator_range< pred_iterator > predecessors()
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
LLVM_ABI BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
getblockFreq - Return block frequency.
Analysis pass which computes a MachineDominatorTree.
Analysis pass which computes a MachineDominatorTree.
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
bool dominates(const MachineInstr *A, const MachineInstr *B) const
void setSavePoints(SaveRestorePoints NewSavePoints)
void setRestorePoints(SaveRestorePoints NewRestorePoints)
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID's allocated.
const MachineBasicBlock & front() const
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineInstr - Allocate a new MachineInstr.
void insert(iterator MBBI, MachineBasicBlock *MBB)
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Representation of each machine instruction.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Analysis pass that exposes the MachineLoopInfo for a machine function.
A description of a memory reference used in the backend.
MachineOperand class - Representation of each machine instruction operand.
LLVM_ABI Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)
LLVM_ABI void emit(DiagnosticInfoOptimizationBase &OptDiag)
Emit an optimization remark.
Diagnostic information for missed-optimization remarks.
MachinePostDominatorTree - an analysis pass wrapper for DominatorTree used to compute the post-domina...
LLVM_ABI MachineBasicBlock * findNearestCommonDominator(ArrayRef< MachineBasicBlock * > Blocks) const
Returns the nearest common dominator of the given blocks.
A set of analyses that are preserved following a run of a transformation pass.
Definition Analysis.h:112
static PreservedAnalyses all()
Construct a special preserved set that preserves all passes.
Definition Analysis.h:118
Special value supplied for machine level alias analysis.
Wrapper class representing virtual and physical registers.
Definition Register.h:20
PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
A SetVector that performs no allocations if smaller than a certain size.
Definition SetVector.h:339
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void append(ItTy in_start, ItTy in_end)
Add the specified range to the end of the SmallVector.
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StringRef - Represent a constant reference to a string, i.e.
Definition StringRef.h:55
Information about stack frame layout on the target.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
virtual bool enableShrinkWrapping(const MachineFunction &MF) const
Returns true if the target will correctly handle shrink wrapping.
virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a epilogue for the target.
virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a prologue for the target.
TargetInstrInfo - Interface to description of machine instruction set.
Register getStackPointerRegisterToSaveRestore() const
If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetFrameLowering * getFrameLowering() const
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetRegisterInfo * getRegisterInfo() const =0
Return the target's register information.
virtual const TargetLowering * getTargetLowering() const
LLVM Value Representation.
Definition Value.h:75
std::pair< iterator, bool > insert(const ValueT &V)
Definition DenseSet.h:202
size_type count(const_arg_type_t< ValueT > V) const
Return 1 if the specified key is in the set, 0 otherwise.
Definition DenseSet.h:180
Changed
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
initializer< Ty > init(const Ty &Val)
PointerTypeMap run(const Module &M)
Compute the PointerTypeMap for the module M.
This is an optimization pass for GlobalISel generic memory operations.
Definition Types.h:26
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1737
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
AnalysisManager< MachineFunction > MachineFunctionAnalysisManager
LLVM_ABI char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI)
Return true if the control flow in RPOTraversal is irreducible.
Definition CFG.h:149
DenseMap< MachineBasicBlock *, std::vector< CalleeSavedInfo > > SaveRestorePoints
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition Debug.cpp:207
class LLVM_GSL_OWNER SmallVector
Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
iterator_range(Container &&) -> iterator_range< llvm::detail::IterOfRange< Container > >
DWARFExpression::Operation Op
LLVM_ABI Printable printBlockFreq(const BlockFrequencyInfo &BFI, BlockFrequency Freq)
Print the block frequency Freq relative to the current functions entry frequency.
LLVM_ABI const Value * getUnderlyingObject(const Value *V, unsigned MaxLookup=MaxLookupSearchDepth)
This method strips off any GEP address adjustments, pointer casts or llvm.threadlocal....
LLVM_ABI Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Pair of physical register and lane mask.