llvm::AMDGPUCallLowering Class Reference

#include "Target/AMDGPU/AMDGPUCallLowering.h"

Inheritance diagram for llvm::AMDGPUCallLowering:

Public Member Functions
	AMDGPUCallLowering (const AMDGPUTargetLowering &TLI)
bool	lowerReturn (MachineIRBuilder &B, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI) const override
	This hook behaves as the extended lowerReturn function, but for targets that do not support swifterror value promotion.
bool	lowerFormalArgumentsKernel (MachineIRBuilder &B, const Function &F, ArrayRef< ArrayRef< Register > > VRegs) const
bool	lowerFormalArguments (MachineIRBuilder &B, const Function &F, ArrayRef< ArrayRef< Register > > VRegs, FunctionLoweringInfo &FLI) const override
	This hook must be implemented to lower the incoming (formal) arguments, described by VRegs, for GlobalISel.
bool	passSpecialInputs (MachineIRBuilder &MIRBuilder, CCState &CCInfo, SmallVectorImpl< std::pair< MCRegister, Register > > &ArgRegs, CallLoweringInfo &Info) const
bool	doCallerAndCalleePassArgsTheSameWay (CallLoweringInfo &Info, MachineFunction &MF, SmallVectorImpl< ArgInfo > &InArgs) const
bool	areCalleeOutgoingArgsTailCallable (CallLoweringInfo &Info, MachineFunction &MF, SmallVectorImpl< ArgInfo > &OutArgs) const
bool	isEligibleForTailCallOptimization (MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info, SmallVectorImpl< ArgInfo > &InArgs, SmallVectorImpl< ArgInfo > &OutArgs) const
	Returns true if the call can be lowered as a tail call.
void	handleImplicitCallArguments (MachineIRBuilder &MIRBuilder, MachineInstrBuilder &CallInst, const GCNSubtarget &ST, const SIMachineFunctionInfo &MFI, CallingConv::ID CalleeCC, ArrayRef< std::pair< MCRegister, Register > > ImplicitArgRegs) const
bool	lowerTailCall (MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info, SmallVectorImpl< ArgInfo > &OutArgs) const
bool	lowerChainCall (MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const
	Lower a call to the @llvm.amdgcn.cs.chain intrinsic.
bool	lowerCall (MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const override
	This hook must be implemented to lower the given call instruction, including argument and return value marshalling.
Public Member Functions inherited from llvm::CallLowering
	CallLowering (const TargetLowering *TLI)
virtual	~CallLowering ()=default
virtual bool	supportSwiftError () const
void	insertSRetLoads (MachineIRBuilder &MIRBuilder, Type *RetTy, ArrayRef< Register > VRegs, Register DemoteReg, int FI) const
	Load the returned value from the stack into virtual registers in VRegs.
void	insertSRetStores (MachineIRBuilder &MIRBuilder, Type *RetTy, ArrayRef< Register > VRegs, Register DemoteReg) const
	Store the return value given by VRegs into stack starting at the offset specified in DemoteReg.
void	insertSRetIncomingArgument (const Function &F, SmallVectorImpl< ArgInfo > &SplitArgs, Register &DemoteReg, MachineRegisterInfo &MRI, const DataLayout &DL) const
	Insert the hidden sret ArgInfo to the beginning of SplitArgs.
void	insertSRetOutgoingArgument (MachineIRBuilder &MIRBuilder, const CallBase &CB, CallLoweringInfo &Info) const
	For the call-base described by CB, insert the hidden sret ArgInfo to the OrigArgs field of Info.
bool	checkReturn (CCState &CCInfo, SmallVectorImpl< BaseArgInfo > &Outs, CCAssignFn *Fn) const
void	getReturnInfo (CallingConv::ID CallConv, Type *RetTy, AttributeList Attrs, SmallVectorImpl< BaseArgInfo > &Outs, const DataLayout &DL) const
	Get the type and the ArgFlags for the split components of RetTy as returned by ComputeValueVTs.
bool	checkReturnTypeForCallConv (MachineFunction &MF) const
	Toplevel function to check the return type based on the target calling convention.
virtual bool	canLowerReturn (MachineFunction &MF, CallingConv::ID CallConv, SmallVectorImpl< BaseArgInfo > &Outs, bool IsVarArg) const
	This hook must be implemented to check whether the return values described by Outs can fit into the return registers.
virtual bool	lowerReturn (MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI, Register SwiftErrorVReg) const
	This hook must be implemented to lower outgoing return values, described by Val, into the specified virtual registers VRegs.
virtual bool	lowerReturn (MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI) const
	This hook behaves as the extended lowerReturn function, but for targets that do not support swifterror value promotion.
virtual bool	fallBackToDAGISel (const MachineFunction &MF) const
virtual bool	lowerFormalArguments (MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef< ArrayRef< Register > > VRegs, FunctionLoweringInfo &FLI) const
	This hook must be implemented to lower the incoming (formal) arguments, described by VRegs, for GlobalISel.
virtual bool	lowerCall (MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const
	This hook must be implemented to lower the given call instruction, including argument and return value marshalling.
bool	lowerCall (MachineIRBuilder &MIRBuilder, const CallBase &Call, ArrayRef< Register > ResRegs, ArrayRef< ArrayRef< Register > > ArgRegs, Register SwiftErrorVReg, std::optional< PtrAuthInfo > PAI, Register ConvergenceCtrlToken, std::function< unsigned()> GetCalleeReg) const
	Lower the given call instruction, including argument and return value marshalling.
virtual bool	enableBigEndian () const
	For targets which want to use big-endian can enable it with enableBigEndian() hook.
virtual bool	isTypeIsValidForThisReturn (EVT Ty) const
	For targets which support the "returned" parameter attribute, returns true if the given type is a valid one to use with "returned".

Static Public Member Functions
static CCAssignFn *	CCAssignFnForCall (CallingConv::ID CC, bool IsVarArg)
static CCAssignFn *	CCAssignFnForReturn (CallingConv::ID CC, bool IsVarArg)

Additional Inherited Members
Protected Member Functions inherited from llvm::CallLowering
const TargetLowering *	getTLI () const
	Getter for generic TargetLowering class.
template<class XXXTargetLowering >
const XXXTargetLowering *	getTLI () const
	Getter for target specific TargetLowering class.
ISD::ArgFlagsTy	getAttributesForArgIdx (const CallBase &Call, unsigned ArgIdx) const
ISD::ArgFlagsTy	getAttributesForReturn (const CallBase &Call) const
void	addArgFlagsFromAttributes (ISD::ArgFlagsTy &Flags, const AttributeList &Attrs, unsigned OpIdx) const
	Adds flags to Flags based off of the attributes in Attrs.
template<typename FuncInfoTy >
void	setArgFlags (ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, const FuncInfoTy &FuncInfo) const
void	splitToValueTypes (const ArgInfo &OrigArgInfo, SmallVectorImpl< ArgInfo > &SplitArgs, const DataLayout &DL, CallingConv::ID CallConv, SmallVectorImpl< uint64_t > *Offsets=nullptr) const
	Break OrigArgInfo into one or more pieces the calling convention can process, returned in SplitArgs.
bool	determineAssignments (ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, CCState &CCInfo) const
	Analyze the argument list in Args, using Assigner to populate CCInfo.
bool	determineAndHandleAssignments (ValueHandler &Handler, ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, bool IsVarArg, ArrayRef< Register > ThisReturnRegs=std::nullopt) const
	Invoke ValueAssigner::assignArg on each of the given Args and then use Handler to move them to the assigned locations.
bool	handleAssignments (ValueHandler &Handler, SmallVectorImpl< ArgInfo > &Args, CCState &CCState, SmallVectorImpl< CCValAssign > &ArgLocs, MachineIRBuilder &MIRBuilder, ArrayRef< Register > ThisReturnRegs=std::nullopt) const
	Use Handler to insert code to handle the argument/return values represented by Args.
bool	parametersInCSRMatch (const MachineRegisterInfo &MRI, const uint32_t *CallerPreservedMask, const SmallVectorImpl< CCValAssign > &ArgLocs, const SmallVectorImpl< ArgInfo > &OutVals) const
	Check whether parameters to a call that are passed in callee saved registers are the same as from the calling function.
bool	resultsCompatible (CallLoweringInfo &Info, MachineFunction &MF, SmallVectorImpl< ArgInfo > &InArgs, ValueAssigner &CalleeAssigner, ValueAssigner &CallerAssigner) const

Detailed Description

Definition at line 26 of file AMDGPUCallLowering.h.

Constructor & Destructor Documentation

AMDGPUCallLowering()

AMDGPUCallLowering::AMDGPUCallLowering

(

const AMDGPUTargetLowering &

TLI

)

Definition at line 265 of file AMDGPUCallLowering.cpp.

Member Function Documentation

areCalleeOutgoingArgsTailCallable()

bool AMDGPUCallLowering::areCalleeOutgoingArgsTailCallable	(	CallLoweringInfo &	Info,
		MachineFunction &	MF,
		SmallVectorImpl< ArgInfo > &	OutArgs
	)		const

Definition at line 1038 of file AMDGPUCallLowering.cpp.

References llvm::dbgs(), llvm::CallLowering::determineAssignments(), llvm::SmallVectorBase< Size_T >::empty(), getAssignFnsForCC(), llvm::SIMachineFunctionInfo::getBytesInStackArgArea(), llvm::Function::getCallingConv(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getRegInfo(), llvm::CCState::getStackSize(), llvm::MachineFunction::getSubtarget(), Info, LLVM_DEBUG, MRI, llvm::CallLowering::parametersInCSRMatch(), and TRI.

Referenced by isEligibleForTailCallOptimization().

CCAssignFnForCall()

CCAssignFn * AMDGPUCallLowering::CCAssignFnForCall ( CallingConv::ID  CC, bool  IsVarArg  )

static

Definition at line 1067 of file AMDGPUISelLowering.cpp.

References llvm::CallingConv::AMDGPU_CS, llvm::CallingConv::AMDGPU_CS_Chain, llvm::CallingConv::AMDGPU_CS_ChainPreserve, llvm::CallingConv::AMDGPU_ES, llvm::CallingConv::AMDGPU_Gfx, llvm::CallingConv::AMDGPU_GS, llvm::CallingConv::AMDGPU_HS, llvm::CallingConv::AMDGPU_KERNEL, llvm::CallingConv::AMDGPU_LS, llvm::CallingConv::AMDGPU_PS, llvm::CallingConv::AMDGPU_VS, llvm::CallingConv::C, CC, llvm::CallingConv::Cold, llvm::CallingConv::Fast, llvm::report_fatal_error(), and llvm::CallingConv::SPIR_KERNEL.

Referenced by llvm::AMDGPUTargetLowering::CCAssignFnForCall().

CCAssignFnForReturn()

CCAssignFn * AMDGPUCallLowering::CCAssignFnForReturn ( CallingConv::ID  CC, bool  IsVarArg  )

static

Definition at line 1094 of file AMDGPUISelLowering.cpp.

References llvm::CallingConv::AMDGPU_CS, llvm::CallingConv::AMDGPU_CS_Chain, llvm::CallingConv::AMDGPU_CS_ChainPreserve, llvm::CallingConv::AMDGPU_ES, llvm::CallingConv::AMDGPU_Gfx, llvm::CallingConv::AMDGPU_GS, llvm::CallingConv::AMDGPU_HS, llvm::CallingConv::AMDGPU_KERNEL, llvm::CallingConv::AMDGPU_LS, llvm::CallingConv::AMDGPU_PS, llvm::CallingConv::AMDGPU_VS, llvm::CallingConv::C, CC, llvm::CallingConv::Cold, llvm::CallingConv::Fast, llvm_unreachable, llvm::report_fatal_error(), and llvm::CallingConv::SPIR_KERNEL.

Referenced by llvm::AMDGPUTargetLowering::CCAssignFnForReturn().

doCallerAndCalleePassArgsTheSameWay()

bool AMDGPUCallLowering::doCallerAndCalleePassArgsTheSameWay	(	CallLoweringInfo &	Info,
		MachineFunction &	MF,
		SmallVectorImpl< ArgInfo > &	InArgs
	)		const

Definition at line 996 of file AMDGPUCallLowering.cpp.

References getAssignFnsForCC(), llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), Info, llvm::CallLowering::resultsCompatible(), and TRI.

Referenced by isEligibleForTailCallOptimization().

handleImplicitCallArguments()

void AMDGPUCallLowering::handleImplicitCallArguments	(	MachineIRBuilder &	MIRBuilder,
		MachineInstrBuilder &	CallInst,
		const GCNSubtarget &	ST,
		const SIMachineFunctionInfo &	MFI,
		CallingConv::ID	CalleeCC,
		ArrayRef< std::pair< MCRegister, Register > >	ImplicitArgRegs
	)		const

Definition at line 1155 of file AMDGPUCallLowering.cpp.

References llvm::MachineIRBuilder::buildCopy(), llvm::LLT::fixed_vector(), llvm::SIMachineFunctionInfo::getScratchRSrcReg(), llvm::RegState::Implicit, and llvm::AMDGPU::isChainCC().

Referenced by lowerCall(), and lowerTailCall().

isEligibleForTailCallOptimization()

bool AMDGPUCallLowering::isEligibleForTailCallOptimization	(	MachineIRBuilder &	MIRBuilder,
		CallLoweringInfo &	Info,
		SmallVectorImpl< ArgInfo > &	InArgs,
		SmallVectorImpl< ArgInfo > &	OutArgs
	)		const

Returns true if the call can be lowered as a tail call.

Definition at line 1095 of file AMDGPUCallLowering.cpp.

References A, llvm::any_of(), areCalleeOutgoingArgsTailCallable(), llvm::Function::args(), B, canGuaranteeTCO(), llvm::dbgs(), doCallerAndCalleePassArgsTheSameWay(), llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), llvm::MachineFunction::getTarget(), llvm::TargetOptions::GuaranteedTailCallOpt, Info, LLVM_DEBUG, mayTailCallThisCC(), llvm::TargetMachine::Options, and TRI.

Referenced by lowerCall().

lowerCall()

bool AMDGPUCallLowering::lowerCall ( MachineIRBuilder &  MIRBuilder, CallLoweringInfo &  Info  ) const

overridevirtual

This hook must be implemented to lower the given call instruction, including argument and return value marshalling.

Returns

true if the lowering succeeded, false otherwise.

Reimplemented from llvm::CallLowering.

Definition at line 1389 of file AMDGPUCallLowering.cpp.

References addCallTargetOperands(), llvm::MachineInstrBuilder::addDef(), llvm::MachineInstrBuilder::addImm(), llvm::CallingConv::AMDGPU_Gfx, assert(), llvm::MachineIRBuilder::buildInstr(), llvm::MachineIRBuilder::buildInstrNoInsert(), llvm::AMDGPUTargetLowering::CCAssignFnForReturn(), llvm::constrainOperandRegClass(), llvm::dbgs(), llvm::CallLowering::determineAndHandleAssignments(), llvm::CallLowering::determineAssignments(), DL, F, getAssignFnsForCC(), getCallOpcode(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::MachineIRBuilder::getMF(), llvm::MachineFunction::getRegInfo(), llvm::CCState::getStackSize(), llvm::MachineFunction::getSubtarget(), llvm::CallLowering::handleAssignments(), handleImplicitCallArguments(), llvm::RegState::Implicit, Info, llvm::MachineIRBuilder::insertInstr(), llvm::CallLowering::insertSRetLoads(), isEligibleForTailCallOptimization(), LLVM_DEBUG, lowerChainCall(), lowerTailCall(), MRI, llvm::MachineInstr::NoConvergent, passSpecialInputs(), llvm::MachineInstrBuilder::setMIFlag(), llvm::CallLowering::splitToValueTypes(), and TRI.

lowerChainCall()

bool AMDGPUCallLowering::lowerChainCall	(	MachineIRBuilder &	MIRBuilder,
		CallLoweringInfo &	Info
	)		const

Lower a call to the @llvm.amdgcn.cs.chain intrinsic.

Definition at line 1343 of file AMDGPUCallLowering.cpp.

References llvm::all_of(), llvm::CallingConv::AMDGPU_CS_Chain, assert(), llvm::MachineOperand::CreateGA(), llvm::MachineOperand::CreateReg(), DL, F, llvm::CallLowering::BaseArgInfo::Flags, llvm::MachineFunction::getFunction(), llvm::MachineIRBuilder::getMF(), Info, lowerTailCall(), llvm::none_of(), and llvm::CallLowering::splitToValueTypes().

Referenced by lowerCall().

lowerFormalArguments()

bool AMDGPUCallLowering::lowerFormalArguments ( MachineIRBuilder &  MIRBuilder, const Function &  F, ArrayRef< ArrayRef< Register > >  VRegs, FunctionLoweringInfo &  FLI  ) const

overridevirtual

This hook must be implemented to lower the incoming (formal) arguments, described by VRegs, for GlobalISel.

Each argument must end up in the related virtual registers described by VRegs. In other words, the first argument should end up in VRegs[0], the second in VRegs[1], and so on. For each argument, there will be one register for each non-aggregate type, as returned by computeValueLLTs. MIRBuilder is set to the proper insertion for the argument lowering. FLI is required for sret demotion.

Returns

True if the lowering succeeded, false otherwise.

Reimplemented from llvm::CallLowering.

Definition at line 581 of file AMDGPUCallLowering.cpp.

References llvm::MachineFunction::addLiveIn(), llvm::CCState::AllocateReg(), llvm::SITargetLowering::allocateSpecialInputSGPRs(), llvm::SITargetLowering::allocateSpecialInputVGPRsFixed(), llvm::SITargetLowering::allocateSystemSGPRs(), llvm::CallingConv::AMDGPU_KERNEL, llvm::CallingConv::AMDGPU_PS, B, llvm::MachineBasicBlock::begin(), llvm::FunctionLoweringInfo::CanLowerReturn, CC, llvm::AMDGPUTargetLowering::CCAssignFnForCall(), llvm::countr_zero(), llvm::FunctionLoweringInfo::DemoteRegister, llvm::CallLowering::determineAssignments(), DL, llvm::MachineBasicBlock::empty(), F, llvm::AttributeList::FirstArgIndex, llvm::MachineFunction::getInfo(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::CallLowering::handleAssignments(), llvm::GCNUserSGPRUsageInfo::hasFlatScratchInit(), llvm::GCNUserSGPRUsageInfo::hasImplicitBufferPtr(), Idx, Info, llvm::CallLowering::insertSRetIncomingArgument(), llvm::AMDGPU::isEntryFunctionCC(), llvm::AMDGPU::isGraphics(), lowerFormalArgumentsKernel(), MBB, MRI, llvm::CallLowering::setArgFlags(), llvm::CallLowering::splitToValueTypes(), llvm::CallLowering::ValueAssigner::StackSize, and TRI.

lowerFormalArgumentsKernel()

bool AMDGPUCallLowering::lowerFormalArgumentsKernel	(	MachineIRBuilder &	B,
		const Function &	F,
		ArrayRef< ArrayRef< Register > >	VRegs
	)		const

Definition at line 510 of file AMDGPUCallLowering.cpp.

References llvm::alignTo(), allocateHSAUserSGPRs(), llvm::SITargetLowering::allocateSpecialEntryInputVGPRs(), llvm::SITargetLowering::allocateSystemSGPRs(), assert(), B, llvm::commonAlignment(), llvm::AMDGPUAS::CONSTANT_ADDRESS, DL, F, llvm::AttributeList::FirstArgIndex, llvm::AMDGPUSubtarget::getExplicitKernelArgOffset(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getRegInfo(), llvm::GCNSubtarget::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), Info, MRI, llvm::LLT::pointer(), llvm::CallLowering::setArgFlags(), llvm::size(), and TRI.

Referenced by lowerFormalArguments().

lowerReturn()

bool AMDGPUCallLowering::lowerReturn ( MachineIRBuilder &  MIRBuilder, const Value *  Val, ArrayRef< Register >  VRegs, FunctionLoweringInfo &  FLI  ) const

overridevirtual

This hook behaves as the extended lowerReturn function, but for targets that do not support swifterror value promotion.

Reimplemented from llvm::CallLowering.

Definition at line 365 of file AMDGPUCallLowering.cpp.

References assert(), B, llvm::FunctionLoweringInfo::CanLowerReturn, CC, llvm::FunctionLoweringInfo::DemoteRegister, llvm::ArrayRef< T >::empty(), llvm::MachineFunction::getInfo(), llvm::Value::getType(), llvm::CallLowering::insertSRetStores(), llvm::AMDGPU::isKernel(), llvm::AMDGPU::isShader(), llvm::SIMachineFunctionInfo::returnsVoid(), and llvm::SIMachineFunctionInfo::setIfReturnsVoid().

lowerTailCall()

bool AMDGPUCallLowering::lowerTailCall	(	MachineIRBuilder &	MIRBuilder,
		CallLoweringInfo &	Info,
		SmallVectorImpl< ArgInfo > &	OutArgs
	)		const

Definition at line 1180 of file AMDGPUCallLowering.cpp.

References addCallTargetOperands(), llvm::MachineInstrBuilder::addImm(), llvm::alignTo(), llvm::CallingConv::AMDGPU_Gfx, assert(), llvm::MachineIRBuilder::buildInstr(), llvm::MachineIRBuilder::buildInstrNoInsert(), llvm::constrainOperandRegClass(), llvm::CallLowering::determineAssignments(), F, getAssignFnsForCC(), getCallOpcode(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::MachineIRBuilder::getMF(), llvm::MachineInstr::getOperand(), llvm::MachineFunction::getRegInfo(), llvm::CCState::getStackSize(), llvm::MachineFunction::getSubtarget(), llvm::MachineFunction::getTarget(), llvm::TargetOptions::GuaranteedTailCallOpt, llvm::CallLowering::handleAssignments(), handleImplicitCallArguments(), Idx, llvm::RegState::Implicit, Info, llvm::MachineIRBuilder::insertInstr(), llvm::isAligned(), llvm::AMDGPU::isChainCC(), llvm::Type::isIntegerTy(), MRI, llvm::TargetMachine::Options, llvm::CallLowering::ArgInfo::OrigValue, passSpecialInputs(), llvm::CallLowering::ArgInfo::Regs, llvm::MachineFrameInfo::setHasTailCall(), llvm::MachineOperand::setReg(), TRI, and llvm::CallLowering::BaseArgInfo::Ty.

Referenced by lowerCall(), and lowerChainCall().

passSpecialInputs()

bool AMDGPUCallLowering::passSpecialInputs	(	MachineIRBuilder &	MIRBuilder,
		CCState &	CCInfo,
		SmallVectorImpl< std::pair< MCRegister, Register > > &	ArgRegs,
		CallLoweringInfo &	Info
	)		const

Definition at line 750 of file AMDGPUCallLowering.cpp.

References llvm::CCState::AllocateReg(), assert(), llvm::MachineIRBuilder::buildConstant(), llvm::MachineIRBuilder::buildOr(), llvm::MachineIRBuilder::buildShl(), llvm::MachineIRBuilder::buildUndef(), llvm::ArgDescriptor::createArg(), llvm::dbgs(), llvm::AMDGPUFunctionArgInfo::DISPATCH_ID, llvm::AMDGPUFunctionArgInfo::DISPATCH_PTR, llvm::AMDGPUArgumentUsageInfo::FixedABIFunctionInfo, llvm::SIMachineFunctionInfo::getArgInfo(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::AMDGPUMachineFunction::getLDSKernelIdMetadata(), llvm::MachineIRBuilder::getMF(), llvm::AMDGPUFunctionArgInfo::getPreloadedValue(), llvm::MachineInstrBuilder::getReg(), llvm::MachineFunction::getRegInfo(), llvm::ArgDescriptor::getRegister(), llvm::MachineFunction::getSubtarget(), I, llvm::AMDGPUFunctionArgInfo::IMPLICIT_ARG_PTR, Info, llvm::ArgDescriptor::isMasked(), llvm::ArgDescriptor::isRegister(), llvm::AMDGPUFunctionArgInfo::LDS_KERNEL_ID, LLVM_DEBUG, MRI, llvm::AMDGPUFunctionArgInfo::QUEUE_PTR, llvm::report_fatal_error(), S32, llvm::LLT::scalar(), llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_X, llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_Y, llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_Z, llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_X, llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_Y, llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_Z, llvm::AMDGPUFunctionArgInfo::WorkItemIDX, llvm::AMDGPUFunctionArgInfo::WorkItemIDY, llvm::AMDGPUFunctionArgInfo::WorkItemIDZ, and Y.

Referenced by lowerCall(), and lowerTailCall().

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The documentation for this class was generated from the following files:

• lib/Target/AMDGPU/AMDGPUCallLowering.h
• lib/Target/AMDGPU/AMDGPUCallLowering.cpp
• lib/Target/AMDGPU/AMDGPUISelLowering.cpp