LLVM  14.0.0git
HexagonDepDecoders.inc
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1 //===----------------------------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 // Automatically generated file, do not edit!
9 //===----------------------------------------------------------------------===//
10 
11 
12 #if defined(__clang__)
13 #pragma clang diagnostic push
14 #pragma clang diagnostic ignored "-Wunused-function"
15 #endif
16 
17 static DecodeStatus s6_0ImmDecoder(MCInst &MI, unsigned tmp,
18  uint64_t, const void *Decoder) {
19  signedDecoder<6>(MI, tmp, Decoder);
21 }
22 static DecodeStatus s31_1ImmDecoder(MCInst &MI, unsigned tmp,
23  uint64_t, const void *Decoder) {
24  signedDecoder<12>(MI, tmp, Decoder);
26 }
27 static DecodeStatus s30_2ImmDecoder(MCInst &MI, unsigned tmp,
28  uint64_t, const void *Decoder) {
29  signedDecoder<13>(MI, tmp, Decoder);
31 }
32 static DecodeStatus s29_3ImmDecoder(MCInst &MI, unsigned tmp,
33  uint64_t, const void *Decoder) {
34  signedDecoder<14>(MI, tmp, Decoder);
36 }
37 static DecodeStatus s3_0ImmDecoder(MCInst &MI, unsigned tmp,
38  uint64_t, const void *Decoder) {
39  signedDecoder<3>(MI, tmp, Decoder);
41 }
42 static DecodeStatus s4_0ImmDecoder(MCInst &MI, unsigned tmp,
43  uint64_t, const void *Decoder) {
44  signedDecoder<4>(MI, tmp, Decoder);
46 }
47 static DecodeStatus s4_1ImmDecoder(MCInst &MI, unsigned tmp,
48  uint64_t, const void *Decoder) {
49  signedDecoder<5>(MI, tmp, Decoder);
51 }
52 static DecodeStatus s4_2ImmDecoder(MCInst &MI, unsigned tmp,
53  uint64_t, const void *Decoder) {
54  signedDecoder<6>(MI, tmp, Decoder);
56 }
57 static DecodeStatus s4_3ImmDecoder(MCInst &MI, unsigned tmp,
58  uint64_t, const void *Decoder) {
59  signedDecoder<7>(MI, tmp, Decoder);
61 }
62 static DecodeStatus s6_3ImmDecoder(MCInst &MI, unsigned tmp,
63  uint64_t, const void *Decoder) {
64  signedDecoder<9>(MI, tmp, Decoder);
66 }
67 static DecodeStatus s8_0ImmDecoder(MCInst &MI, unsigned tmp,
68  uint64_t, const void *Decoder) {
69  signedDecoder<8>(MI, tmp, Decoder);
71 }
72 
73 #if defined(__clang__)
74 #pragma clang diagnostic pop
75 #endif
76 
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
tmp
alloca< 16 x float >, align 16 %tmp2=alloca< 16 x float >, align 16 store< 16 x float > %A,< 16 x float > *%tmp %s=bitcast< 16 x float > *%tmp to i8 *%s2=bitcast< 16 x float > *%tmp2 to i8 *call void @llvm.memcpy.i64(i8 *%s, i8 *%s2, i64 64, i32 16) %R=load< 16 x float > *%tmp2 ret< 16 x float > %R } declare void @llvm.memcpy.i64(i8 *nocapture, i8 *nocapture, i64, i32) nounwind which compiles to:_foo:subl $140, %esp movaps %xmm3, 112(%esp) movaps %xmm2, 96(%esp) movaps %xmm1, 80(%esp) movaps %xmm0, 64(%esp) movl 60(%esp), %eax movl %eax, 124(%esp) movl 56(%esp), %eax movl %eax, 120(%esp) movl 52(%esp), %eax< many many more 32-bit copies > movaps(%esp), %xmm0 movaps 16(%esp), %xmm1 movaps 32(%esp), %xmm2 movaps 48(%esp), %xmm3 addl $140, %esp ret On Nehalem, it may even be cheaper to just use movups when unaligned than to fall back to lower-granularity chunks. Implement processor-specific optimizations for parity with GCC on these processors. GCC does two optimizations:1. ix86_pad_returns inserts a noop before ret instructions if immediately preceded by a conditional branch or is the target of a jump. 2. ix86_avoid_jump_misspredicts inserts noops in cases where a 16-byte block of code contains more than 3 branches. The first one is done for all AMDs, Core2, and "Generic" The second one is done for:Atom, Pentium Pro, all AMDs, Pentium 4, Nocona, Core 2, and "Generic" Testcase:int x(int a) { return(a &0xf0)> >4 tmp
Definition: README.txt:1347
uint64_t
DecodeStatus
MCDisassembler::DecodeStatus DecodeStatus
Definition: AArch64Disassembler.cpp:36
Success
#define Success
Definition: AArch64Disassembler.cpp:266