LLVM 20.0.0git
Public Member Functions | List of all members
llvm::HexagonRegisterInfo Class Reference

#include "Target/Hexagon/HexagonRegisterInfo.h"

Inheritance diagram for llvm::HexagonRegisterInfo:
Inheritance graph
[legend]

Public Member Functions

 HexagonRegisterInfo (unsigned HwMode)
 
const MCPhysReggetCalleeSavedRegs (const MachineFunction *MF) const override
 Code Generation virtual methods...
 
const uint32_tgetCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
 
BitVector getReservedRegs (const MachineFunction &MF) const override
 
bool eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
 
bool requiresRegisterScavenging (const MachineFunction &MF) const override
 Returns true since we may need scavenging for a temporary register when generating hardware loop instructions.
 
bool requiresFrameIndexScavenging (const MachineFunction &MF) const override
 Returns true.
 
bool useFPForScavengingIndex (const MachineFunction &MF) const override
 Returns true if the frame pointer is valid.
 
bool shouldCoalesce (MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override
 
Register getFrameRegister (const MachineFunction &MF) const override
 
Register getFrameRegister () const
 
Register getStackRegister () const
 
unsigned getHexagonSubRegIndex (const TargetRegisterClass &RC, unsigned GenIdx) const
 
const MCPhysReggetCallerSavedRegs (const MachineFunction *MF, const TargetRegisterClass *RC) const
 
const TargetRegisterClassgetPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
 
bool isEHReturnCalleeSaveReg (Register Reg) const
 

Detailed Description

Definition at line 29 of file HexagonRegisterInfo.h.

Constructor & Destructor Documentation

◆ HexagonRegisterInfo()

HexagonRegisterInfo::HexagonRegisterInfo ( unsigned  HwMode)

Definition at line 56 of file HexagonRegisterInfo.cpp.

Member Function Documentation

◆ eliminateFrameIndex()

bool HexagonRegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  II,
int  SPAdj,
unsigned  FIOperandNum,
RegScavenger RS = nullptr 
) const
override

◆ getCalleeSavedRegs()

const MCPhysReg * HexagonRegisterInfo::getCalleeSavedRegs ( const MachineFunction MF) const
override

◆ getCallerSavedRegs()

const MCPhysReg * HexagonRegisterInfo::getCallerSavedRegs ( const MachineFunction MF,
const TargetRegisterClass RC 
) const

◆ getCallPreservedMask()

const uint32_t * HexagonRegisterInfo::getCallPreservedMask ( const MachineFunction MF,
CallingConv::ID   
) const
override

Definition at line 141 of file HexagonRegisterInfo.cpp.

Referenced by llvm::HexagonTargetLowering::LowerCall().

◆ getFrameRegister() [1/2]

Register HexagonRegisterInfo::getFrameRegister ( ) const

Definition at line 411 of file HexagonRegisterInfo.cpp.

Referenced by getFrameRegister().

◆ getFrameRegister() [2/2]

Register HexagonRegisterInfo::getFrameRegister ( const MachineFunction MF) const
override

◆ getHexagonSubRegIndex()

unsigned HexagonRegisterInfo::getHexagonSubRegIndex ( const TargetRegisterClass RC,
unsigned  GenIdx 
) const

◆ getPointerRegClass()

const TargetRegisterClass * HexagonRegisterInfo::getPointerRegClass ( const MachineFunction MF,
unsigned  Kind = 0 
) const
override

Definition at line 451 of file HexagonRegisterInfo.cpp.

◆ getReservedRegs()

BitVector HexagonRegisterInfo::getReservedRegs ( const MachineFunction MF) const
override

◆ getStackRegister()

Register HexagonRegisterInfo::getStackRegister ( ) const

◆ isEHReturnCalleeSaveReg()

bool HexagonRegisterInfo::isEHReturnCalleeSaveReg ( Register  Reg) const

Definition at line 61 of file HexagonRegisterInfo.cpp.

◆ requiresFrameIndexScavenging()

bool llvm::HexagonRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction MF) const
inlineoverride

Returns true.

Spill code for predicate registers might need an extra register.

Definition at line 52 of file HexagonRegisterInfo.h.

◆ requiresRegisterScavenging()

bool llvm::HexagonRegisterInfo::requiresRegisterScavenging ( const MachineFunction MF) const
inlineoverride

Returns true since we may need scavenging for a temporary register when generating hardware loop instructions.

Definition at line 46 of file HexagonRegisterInfo.h.

◆ shouldCoalesce()

bool HexagonRegisterInfo::shouldCoalesce ( MachineInstr MI,
const TargetRegisterClass SrcRC,
unsigned  SubReg,
const TargetRegisterClass DstRC,
unsigned  DstSubReg,
const TargetRegisterClass NewRC,
LiveIntervals LIS 
) const
override

◆ useFPForScavengingIndex()

bool HexagonRegisterInfo::useFPForScavengingIndex ( const MachineFunction MF) const
override

Returns true if the frame pointer is valid.

Definition at line 445 of file HexagonRegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget().


The documentation for this class was generated from the following files: