A stage that simulates a queue of instruction opcodes. More...
#include "llvm/MCA/Stages/MicroOpQueueStage.h"
Public Member Functions | |
| MicroOpQueueStage (unsigned Size, unsigned IPC=0, bool ZeroLatencyStage=true) | |
| bool | isAvailable (const InstRef &IR) const override |
| Returns true if it can execute IR during this cycle. | |
| bool | hasWorkToComplete () const override |
| Returns true if some instructions are still executing this stage. | |
| Error | execute (InstRef &IR) override |
| The primary action that this stage performs on instruction IR. | |
| Error | cycleStart () override |
| Called once at the start of each cycle. | |
| Error | cycleEnd () override |
| Called once at the end of each cycle. | |
 Public Member Functions inherited from llvm::mca::Stage | |
| Stage ()=default | |
| virtual | ~Stage () |
| virtual bool | isAvailable (const InstRef &IR) const |
| Returns true if it can execute IR during this cycle. | |
| virtual bool | hasWorkToComplete () const =0 |
| Returns true if some instructions are still executing this stage. | |
| virtual Error | cycleStart () |
| Called once at the start of each cycle. | |
| virtual Error | cycleResume () |
| Called after the pipeline is resumed from pausing state. | |
| virtual Error | cycleEnd () |
| Called once at the end of each cycle. | |
| virtual Error | execute (InstRef &IR)=0 |
| The primary action that this stage performs on instruction IR. | |
| void | setNextInSequence (Stage *NextStage) |
| bool | checkNextStage (const InstRef &IR) const |
| Error | moveToTheNextStage (InstRef &IR) |
| Called when an instruction is ready to move the next pipeline stage. | |
| void | addListener (HWEventListener *Listener) |
| Add a listener to receive callbacks during the execution of this stage. | |
| template<typename EventT > | |
| void | notifyEvent (const EventT &Event) const |
| Notify listeners of a particular hardware event. | |
Additional Inherited Members | |
| Protected Member Functions inherited from llvm::mca::Stage | |
| const std::set< HWEventListener * > & | getListeners () const |
Detailed Description
A stage that simulates a queue of instruction opcodes.
Definition at line 26 of file MicroOpQueueStage.h.
Constructor & Destructor Documentation
◆ MicroOpQueueStage()
| llvm::mca::MicroOpQueueStage::MicroOpQueueStage | ( | unsigned | Size, |
| unsigned | IPC = 0, |
||
| bool | ZeroLatencyStage = true |
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| ) |
Definition at line 38 of file MicroOpQueueStage.cpp.
References Size.
Member Function Documentation
◆ cycleEnd()
|
overridevirtual |
Called once at the end of each cycle.
Reimplemented from llvm::mca::Stage.
Definition at line 63 of file MicroOpQueueStage.cpp.
◆ cycleStart()
|
overridevirtual |
Called once at the start of each cycle.
This can be used as a setup phase to prepare for the executions during the cycle.
Reimplemented from llvm::mca::Stage.
Definition at line 56 of file MicroOpQueueStage.cpp.
◆ execute()
The primary action that this stage performs on instruction IR.
Implements llvm::mca::Stage.
Definition at line 46 of file MicroOpQueueStage.cpp.
References IR.
◆ hasWorkToComplete()
|
inlineoverridevirtual |
Returns true if some instructions are still executing this stage.
Implements llvm::mca::Stage.
Definition at line 76 of file MicroOpQueueStage.h.
References llvm::SmallVectorBase< Size_T >::size().
◆ isAvailable()
Returns true if it can execute IR during this cycle.
Reimplemented from llvm::mca::Stage.
Definition at line 67 of file MicroOpQueueStage.h.
References IR.
The documentation for this class was generated from the following files:
- include/llvm/MCA/Stages/MicroOpQueueStage.h
- lib/MCA/Stages/MicroOpQueueStage.cpp
