52 cl::init(std::numeric_limits<unsigned>::max()));
73 return "Hexagon RDF optimizations";
80 MachineFunctionProperties::Property::NoVRegs);
93 bool interpretAsCopy(
const MachineInstr *
MI, EqualityMap &EM)
override;
108char HexagonRDFOpt::ID = 0;
111 "Hexagon RDF optimizations",
false,
false)
119 EM.insert(std::make_pair(DstR, SrcR));
123 unsigned Opc =
MI->getOpcode();
125 case Hexagon::A2_combinew: {
129 assert(
DstOp.getSubReg() == 0 &&
"Unexpected subregister");
136 case Hexagon::A2_addi: {
138 if (!
A.isImm() ||
A.getImm() != 0)
142 case Hexagon::A2_tfr: {
151 return CopyPropagation::interpretAsCopy(
MI, EM);
154bool HexagonDCE::run() {
155 bool Collected = collect();
172 R2I.insert(std::make_pair(
RA.Id, SA.
Id));
183 bool Changed =
false;
187 dbgs() <<
"Partly dead: " << *SA.
Addr->getCode();
188 Changed |=
rewrite(SA, Remove);
191 return erase(Remove) || Changed;
198 for (
unsigned i = 0, n =
MI->getNumOperands(); i != n; ++i)
199 if (&
MI->getOperand(i) == &
Op)
207 OpMap.
insert(std::make_pair(
RA.Id, getOpNum(
RA.Addr->getOp())));
209 MI->removeOperand(OpNum);
212 unsigned N = OpMap[
RA.Id];
214 RA.Addr->setRegRef(&
MI->getOperand(
N), DFG);
216 RA.Addr->setRegRef(&
MI->getOperand(
N-1), DFG);
221 if (!getDFG().IsCode<NodeAttrs::Stmt>(IA))
228 unsigned Opc =
MI.getOpcode();
229 unsigned OpNum, NewOpc;
231 case Hexagon::L2_loadri_pi:
232 NewOpc = Hexagon::L2_loadri_io;
235 case Hexagon::L2_loadrd_pi:
236 NewOpc = Hexagon::L2_loadrd_io;
239 case Hexagon::V6_vL32b_pi:
240 NewOpc = Hexagon::V6_vL32b_ai;
243 case Hexagon::S2_storeri_pi:
244 NewOpc = Hexagon::S2_storeri_io;
247 case Hexagon::S2_storerd_pi:
248 NewOpc = Hexagon::S2_storerd_io;
251 case Hexagon::V6_vS32b_pi:
252 NewOpc = Hexagon::V6_vS32b_ai;
259 return getDeadNodes().count(
DA.Id);
264 if (&
DA.Addr->getOp() != &
Op)
277 dbgs() <<
"Rewriting: " <<
MI;
278 MI.setDesc(HII.get(NewOpc));
279 MI.getOperand(OpNum+2).setImm(0);
280 removeOperand(IA, OpNum);
295 dbgs() <<
"Skipping " << getPassName() <<
": too many basic blocks\n";
305 MDT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
306 const auto &MDF = getAnalysis<MachineDominanceFrontier>();
313 MF.
print(
dbgs() <<
"Before " << getPassName() <<
"\n",
nullptr);
326 dbgs() <<
"Starting copy propagation on: " << MF.
getName() <<
'\n'
333 dbgs() <<
"Starting dead code elimination on: " << MF.
getName() <<
'\n'
335 HexagonDCE DCE(
G, *
MRI);
337 Changed |= DCE.run();
341 dbgs() <<
"Starting liveness recomputation on: " << MF.
getName() <<
'\n'
352 MF.
print(
dbgs() <<
"After " << getPassName() <<
"\n",
nullptr);
358 return new HexagonRDFOpt();
unsigned const MachineRegisterInfo * MRI
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
This file defines the DenseMap class.
static cl::opt< bool > RDFTrackReserved("hexagon-rdf-track-reserved", cl::Hidden)
static cl::opt< unsigned > RDFLimit("hexagon-rdf-limit", cl::init(std::numeric_limits< unsigned >::max()))
hexagon rdf Hexagon RDF optimizations
cl::opt< unsigned > RDFFuncBlockLimit
static cl::opt< bool > RDFDump("hexagon-rdf-dump", cl::Hidden)
#define INITIALIZE_PASS_DEPENDENCY(depName)
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
static bool rewrite(Function &F)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
SI optimize exec mask operations pre RA
This file implements a set that has insertion order iteration characteristics.
Represent the analysis usage information of a pass.
AnalysisUsage & addRequired()
void setPreservesAll()
Set by analyses that do not transform their input at all.
This class represents an Operation in the Expression.
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
FunctionPass class - This class is used to implement most global optimizations.
Analysis pass which computes a MachineDominatorTree.
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
virtual MachineFunctionProperties getRequiredProperties() const
Properties which a MachineFunction may have at a given point in time.
MachineFunctionProperties & set(Property P)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
void print(raw_ostream &OS, const SlotIndexes *=nullptr) const
print - Print out the MachineFunction in a format suitable for debugging to the specified stream.
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
unsigned getSubReg() const
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
A vector that has set insertion semantics.
size_type count(const key_type &key) const
Count the number of elements of a given key in the SetVector.
bool insert(const value_type &X)
Insert a new element into the SetVector.
StringRef - Represent a constant reference to a string, i.e.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
initializer< Ty > init(const Ty &Val)
PointerTypeMap run(const Module &M)
Compute the PointerTypeMap for the module M.
This is an optimization pass for GlobalISel generic memory operations.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
void initializeHexagonRDFOptPass(PassRegistry &)
void erase(Container &C, ValueType V)
Wrapper function to remove a value from a container:
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
DWARFExpression::Operation Op
FunctionPass * createHexagonRDFOpt()
NodeList members(const DataFlowGraph &G) const
RegisterRef makeRegRef(unsigned Reg, unsigned Sub) const
static bool IsDef(const Node BA)
NodeList getRelatedRefs(Instr IA, Ref RA) const
const TargetInstrInfo & getTII() const
static bool IsCode(const Node BA)
NodeAddr< T > addr(NodeId N) const