LLVM  10.0.0svn
LegalizeTypesGeneric.cpp
Go to the documentation of this file.
1 //===-------- LegalizeTypesGeneric.cpp - Generic type legalization --------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements generic type expansion and splitting for LegalizeTypes.
10 // The routines here perform legalization when the details of the type (such as
11 // whether it is an integer or a float) do not matter.
12 // Expansion is the act of changing a computation in an illegal type to be a
13 // computation in two identical registers of a smaller type. The Lo/Hi part
14 // is required to be stored first in memory on little/big-endian machines.
15 // Splitting is the act of changing a computation in an illegal type to be a
16 // computation in two not necessarily identical registers of a smaller type.
17 // There are no requirements on how the type is represented in memory.
18 //
19 //===----------------------------------------------------------------------===//
20 
21 #include "LegalizeTypes.h"
22 #include "llvm/IR/DataLayout.h"
23 using namespace llvm;
24 
25 #define DEBUG_TYPE "legalize-types"
26 
27 //===----------------------------------------------------------------------===//
28 // Generic Result Expansion.
29 //===----------------------------------------------------------------------===//
30 
31 // These routines assume that the Lo/Hi part is stored first in memory on
32 // little/big-endian machines, followed by the Hi/Lo part. This means that
33 // they cannot be used as is on vectors, for which Lo is always stored first.
34 void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
35  SDValue &Lo, SDValue &Hi) {
36  SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
37  GetExpandedOp(Op, Lo, Hi);
38 }
39 
40 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
41  EVT OutVT = N->getValueType(0);
42  EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT);
43  SDValue InOp = N->getOperand(0);
44  EVT InVT = InOp.getValueType();
45  SDLoc dl(N);
46 
47  // Handle some special cases efficiently.
48  switch (getTypeAction(InVT)) {
51  break;
53  llvm_unreachable("Bitcast of a promotion-needing float should never need"
54  "expansion");
56  SplitInteger(GetSoftenedFloat(InOp), Lo, Hi);
57  Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
58  Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
59  return;
62  auto &DL = DAG.getDataLayout();
63  // Convert the expanded pieces of the input.
64  GetExpandedOp(InOp, Lo, Hi);
65  if (TLI.hasBigEndianPartOrdering(InVT, DL) !=
66  TLI.hasBigEndianPartOrdering(OutVT, DL))
67  std::swap(Lo, Hi);
68  Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
69  Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
70  return;
71  }
73  GetSplitVector(InOp, Lo, Hi);
74  if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout()))
75  std::swap(Lo, Hi);
76  Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
77  Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
78  return;
80  // Convert the element instead.
81  SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi);
82  Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
83  Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
84  return;
86  assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST");
87  InOp = GetWidenedVector(InOp);
88  EVT LoVT, HiVT;
89  std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT);
90  std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT, HiVT);
91  if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout()))
92  std::swap(Lo, Hi);
93  Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
94  Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
95  return;
96  }
97  }
98 
99  if (InVT.isVector() && OutVT.isInteger()) {
100  // Handle cases like i64 = BITCAST v1i64 on x86, where the operand
101  // is legal but the result is not.
102  unsigned NumElems = 2;
103  EVT ElemVT = NOutVT;
104  EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems);
105 
106  // If <ElemVT * N> is not a legal type, try <ElemVT/2 * (N*2)>.
107  while (!isTypeLegal(NVT)) {
108  unsigned NewSizeInBits = ElemVT.getSizeInBits() / 2;
109  // If the element size is smaller than byte, bail.
110  if (NewSizeInBits < 8)
111  break;
112  NumElems *= 2;
113  ElemVT = EVT::getIntegerVT(*DAG.getContext(), NewSizeInBits);
114  NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems);
115  }
116 
117  if (isTypeLegal(NVT)) {
118  SDValue CastInOp = DAG.getNode(ISD::BITCAST, dl, NVT, InOp);
119 
121  for (unsigned i = 0; i < NumElems; ++i)
122  Vals.push_back(DAG.getNode(
123  ISD::EXTRACT_VECTOR_ELT, dl, ElemVT, CastInOp,
124  DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout()))));
125 
126  // Build Lo, Hi pair by pairing extracted elements if needed.
127  unsigned Slot = 0;
128  for (unsigned e = Vals.size(); e - Slot > 2; Slot += 2, e += 1) {
129  // Each iteration will BUILD_PAIR two nodes and append the result until
130  // there are only two nodes left, i.e. Lo and Hi.
131  SDValue LHS = Vals[Slot];
132  SDValue RHS = Vals[Slot + 1];
133 
134  if (DAG.getDataLayout().isBigEndian())
135  std::swap(LHS, RHS);
136 
137  Vals.push_back(DAG.getNode(
138  ISD::BUILD_PAIR, dl,
139  EVT::getIntegerVT(*DAG.getContext(), LHS.getValueSizeInBits() << 1),
140  LHS, RHS));
141  }
142  Lo = Vals[Slot++];
143  Hi = Vals[Slot++];
144 
145  if (DAG.getDataLayout().isBigEndian())
146  std::swap(Lo, Hi);
147 
148  return;
149  }
150  }
151 
152  // Lower the bit-convert to a store/load from the stack.
153  assert(NOutVT.isByteSized() && "Expanded type not byte sized!");
154 
155  // Create the stack frame object. Make sure it is aligned for both
156  // the source and expanded destination types.
157  unsigned Alignment = DAG.getDataLayout().getPrefTypeAlignment(
158  NOutVT.getTypeForEVT(*DAG.getContext()));
159  SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment);
160  int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
161  MachinePointerInfo PtrInfo =
163 
164  // Emit a store to the stack slot.
165  SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, InOp, StackPtr, PtrInfo);
166 
167  // Load the first half from the stack slot.
168  Lo = DAG.getLoad(NOutVT, dl, Store, StackPtr, PtrInfo);
169 
170  // Increment the pointer to the other half.
171  unsigned IncrementSize = NOutVT.getSizeInBits() / 8;
172  StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
173  DAG.getConstant(IncrementSize, dl,
174  StackPtr.getValueType()));
175 
176  // Load the second half from the stack slot.
177  Hi = DAG.getLoad(NOutVT, dl, Store, StackPtr,
178  PtrInfo.getWithOffset(IncrementSize),
179  MinAlign(Alignment, IncrementSize));
180 
181  // Handle endianness of the load.
182  if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout()))
183  std::swap(Lo, Hi);
184 }
185 
186 void DAGTypeLegalizer::ExpandRes_BUILD_PAIR(SDNode *N, SDValue &Lo,
187  SDValue &Hi) {
188  // Return the operands.
189  Lo = N->getOperand(0);
190  Hi = N->getOperand(1);
191 }
192 
193 void DAGTypeLegalizer::ExpandRes_EXTRACT_ELEMENT(SDNode *N, SDValue &Lo,
194  SDValue &Hi) {
195  GetExpandedOp(N->getOperand(0), Lo, Hi);
196  SDValue Part = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ?
197  Hi : Lo;
198 
199  assert(Part.getValueType() == N->getValueType(0) &&
200  "Type twice as big as expanded type not itself expanded!");
201 
202  GetPairElements(Part, Lo, Hi);
203 }
204 
205 void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo,
206  SDValue &Hi) {
207  SDValue OldVec = N->getOperand(0);
208  unsigned OldElts = OldVec.getValueType().getVectorNumElements();
209  EVT OldEltVT = OldVec.getValueType().getVectorElementType();
210  SDLoc dl(N);
211 
212  // Convert to a vector of the expanded element type, for example
213  // <3 x i64> -> <6 x i32>.
214  EVT OldVT = N->getValueType(0);
215  EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT);
216 
217  if (OldVT != OldEltVT) {
218  // The result of EXTRACT_VECTOR_ELT may be larger than the element type of
219  // the input vector. If so, extend the elements of the input vector to the
220  // same bitwidth as the result before expanding.
221  assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!");
222  EVT NVecVT = EVT::getVectorVT(*DAG.getContext(), OldVT, OldElts);
223  OldVec = DAG.getNode(ISD::ANY_EXTEND, dl, NVecVT, N->getOperand(0));
224  }
225 
226  SDValue NewVec = DAG.getNode(ISD::BITCAST, dl,
228  NewVT, 2*OldElts),
229  OldVec);
230 
231  // Extract the elements at 2 * Idx and 2 * Idx + 1 from the new vector.
232  SDValue Idx = N->getOperand(1);
233 
234  Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx);
235  Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
236 
237  Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx,
238  DAG.getConstant(1, dl, Idx.getValueType()));
239  Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
240 
241  if (DAG.getDataLayout().isBigEndian())
242  std::swap(Lo, Hi);
243 }
244 
245 void DAGTypeLegalizer::ExpandRes_NormalLoad(SDNode *N, SDValue &Lo,
246  SDValue &Hi) {
247  assert(ISD::isNormalLoad(N) && "This routine only for normal loads!");
248  SDLoc dl(N);
249 
250  LoadSDNode *LD = cast<LoadSDNode>(N);
251  EVT ValueVT = LD->getValueType(0);
252  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT);
253  SDValue Chain = LD->getChain();
254  SDValue Ptr = LD->getBasePtr();
255  unsigned Alignment = LD->getAlignment();
256  AAMDNodes AAInfo = LD->getAAInfo();
257 
258  assert(NVT.isByteSized() && "Expanded type not byte sized!");
259 
260  Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(), Alignment,
261  LD->getMemOperand()->getFlags(), AAInfo);
262 
263  // Increment the pointer to the other half.
264  unsigned IncrementSize = NVT.getSizeInBits() / 8;
265  Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
266  DAG.getConstant(IncrementSize, dl, Ptr.getValueType()));
267  Hi = DAG.getLoad(NVT, dl, Chain, Ptr,
268  LD->getPointerInfo().getWithOffset(IncrementSize),
269  MinAlign(Alignment, IncrementSize),
270  LD->getMemOperand()->getFlags(), AAInfo);
271 
272  // Build a factor node to remember that this load is independent of the
273  // other one.
274  Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
275  Hi.getValue(1));
276 
277  // Handle endianness of the load.
278  if (TLI.hasBigEndianPartOrdering(ValueVT, DAG.getDataLayout()))
279  std::swap(Lo, Hi);
280 
281  // Modified the chain - switch anything that used the old chain to use
282  // the new one.
283  ReplaceValueWith(SDValue(N, 1), Chain);
284 }
285 
286 void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) {
287  EVT OVT = N->getValueType(0);
288  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), OVT);
289  SDValue Chain = N->getOperand(0);
290  SDValue Ptr = N->getOperand(1);
291  SDLoc dl(N);
292  const unsigned Align = N->getConstantOperandVal(3);
293 
294  Lo = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), Align);
295  Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2), 0);
296  Chain = Hi.getValue(1);
297 
298  // Handle endianness of the load.
299  if (TLI.hasBigEndianPartOrdering(OVT, DAG.getDataLayout()))
300  std::swap(Lo, Hi);
301 
302  // Modified the chain - switch anything that used the old chain to use
303  // the new one.
304  ReplaceValueWith(SDValue(N, 1), Chain);
305 }
306 
307 
308 //===--------------------------------------------------------------------===//
309 // Generic Operand Expansion.
310 //===--------------------------------------------------------------------===//
311 
312 void DAGTypeLegalizer::IntegerToVector(SDValue Op, unsigned NumElements,
314  EVT EltVT) {
315  assert(Op.getValueType().isInteger());
316  SDLoc DL(Op);
317  SDValue Parts[2];
318 
319  if (NumElements > 1) {
320  NumElements >>= 1;
321  SplitInteger(Op, Parts[0], Parts[1]);
322  if (DAG.getDataLayout().isBigEndian())
323  std::swap(Parts[0], Parts[1]);
324  IntegerToVector(Parts[0], NumElements, Ops, EltVT);
325  IntegerToVector(Parts[1], NumElements, Ops, EltVT);
326  } else {
327  Ops.push_back(DAG.getNode(ISD::BITCAST, DL, EltVT, Op));
328  }
329 }
330 
331 SDValue DAGTypeLegalizer::ExpandOp_BITCAST(SDNode *N) {
332  SDLoc dl(N);
333  if (N->getValueType(0).isVector() &&
334  N->getOperand(0).getValueType().isInteger()) {
335  // An illegal expanding type is being converted to a legal vector type.
336  // Make a two element vector out of the expanded parts and convert that
337  // instead, but only if the new vector type is legal (otherwise there
338  // is no point, and it might create expansion loops). For example, on
339  // x86 this turns v1i64 = BITCAST i64 into v1i64 = BITCAST v2i32.
340  //
341  // FIXME: I'm not sure why we are first trying to split the input into
342  // a 2 element vector, so I'm leaving it here to maintain the current
343  // behavior.
344  unsigned NumElts = 2;
345  EVT OVT = N->getOperand(0).getValueType();
346  EVT NVT = EVT::getVectorVT(*DAG.getContext(),
347  TLI.getTypeToTransformTo(*DAG.getContext(), OVT),
348  NumElts);
349  if (!isTypeLegal(NVT)) {
350  // If we can't find a legal type by splitting the integer in half,
351  // then we can use the node's value type.
352  NumElts = N->getValueType(0).getVectorNumElements();
353  NVT = N->getValueType(0);
354  }
355 
357  IntegerToVector(N->getOperand(0), NumElts, Ops, NVT.getVectorElementType());
358 
359  SDValue Vec =
360  DAG.getBuildVector(NVT, dl, makeArrayRef(Ops.data(), NumElts));
361  return DAG.getNode(ISD::BITCAST, dl, N->getValueType(0), Vec);
362  }
363 
364  // Otherwise, store to a temporary and load out again as the new type.
365  return CreateStackStoreLoad(N->getOperand(0), N->getValueType(0));
366 }
367 
368 SDValue DAGTypeLegalizer::ExpandOp_BUILD_VECTOR(SDNode *N) {
369  // The vector type is legal but the element type needs expansion.
370  EVT VecVT = N->getValueType(0);
371  unsigned NumElts = VecVT.getVectorNumElements();
372  EVT OldVT = N->getOperand(0).getValueType();
373  EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT);
374  SDLoc dl(N);
375 
376  assert(OldVT == VecVT.getVectorElementType() &&
377  "BUILD_VECTOR operand type doesn't match vector element type!");
378 
379  // Build a vector of twice the length out of the expanded elements.
380  // For example <3 x i64> -> <6 x i32>.
381  SmallVector<SDValue, 16> NewElts;
382  NewElts.reserve(NumElts*2);
383 
384  for (unsigned i = 0; i < NumElts; ++i) {
385  SDValue Lo, Hi;
386  GetExpandedOp(N->getOperand(i), Lo, Hi);
387  if (DAG.getDataLayout().isBigEndian())
388  std::swap(Lo, Hi);
389  NewElts.push_back(Lo);
390  NewElts.push_back(Hi);
391  }
392 
393  EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NewElts.size());
394  SDValue NewVec = DAG.getBuildVector(NewVecVT, dl, NewElts);
395 
396  // Convert the new vector to the old vector type.
397  return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec);
398 }
399 
400 SDValue DAGTypeLegalizer::ExpandOp_EXTRACT_ELEMENT(SDNode *N) {
401  SDValue Lo, Hi;
402  GetExpandedOp(N->getOperand(0), Lo, Hi);
403  return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ? Hi : Lo;
404 }
405 
406 SDValue DAGTypeLegalizer::ExpandOp_INSERT_VECTOR_ELT(SDNode *N) {
407  // The vector type is legal but the element type needs expansion.
408  EVT VecVT = N->getValueType(0);
409  unsigned NumElts = VecVT.getVectorNumElements();
410  SDLoc dl(N);
411 
412  SDValue Val = N->getOperand(1);
413  EVT OldEVT = Val.getValueType();
414  EVT NewEVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldEVT);
415 
416  assert(OldEVT == VecVT.getVectorElementType() &&
417  "Inserted element type doesn't match vector element type!");
418 
419  // Bitconvert to a vector of twice the length with elements of the expanded
420  // type, insert the expanded vector elements, and then convert back.
421  EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewEVT, NumElts*2);
422  SDValue NewVec = DAG.getNode(ISD::BITCAST, dl,
423  NewVecVT, N->getOperand(0));
424 
425  SDValue Lo, Hi;
426  GetExpandedOp(Val, Lo, Hi);
427  if (DAG.getDataLayout().isBigEndian())
428  std::swap(Lo, Hi);
429 
430  SDValue Idx = N->getOperand(2);
431  Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx);
432  NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Lo, Idx);
433  Idx = DAG.getNode(ISD::ADD, dl,
434  Idx.getValueType(), Idx,
435  DAG.getConstant(1, dl, Idx.getValueType()));
436  NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Hi, Idx);
437 
438  // Convert the new vector to the old vector type.
439  return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec);
440 }
441 
442 SDValue DAGTypeLegalizer::ExpandOp_SCALAR_TO_VECTOR(SDNode *N) {
443  SDLoc dl(N);
444  EVT VT = N->getValueType(0);
446  "SCALAR_TO_VECTOR operand type doesn't match vector element type!");
447  unsigned NumElts = VT.getVectorNumElements();
448  SmallVector<SDValue, 16> Ops(NumElts);
449  Ops[0] = N->getOperand(0);
450  SDValue UndefVal = DAG.getUNDEF(Ops[0].getValueType());
451  for (unsigned i = 1; i < NumElts; ++i)
452  Ops[i] = UndefVal;
453  return DAG.getBuildVector(VT, dl, Ops);
454 }
455 
456 SDValue DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) {
457  assert(ISD::isNormalStore(N) && "This routine only for normal stores!");
458  assert(OpNo == 1 && "Can only expand the stored value so far");
459  SDLoc dl(N);
460 
461  StoreSDNode *St = cast<StoreSDNode>(N);
462  EVT ValueVT = St->getValue().getValueType();
463  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT);
464  SDValue Chain = St->getChain();
465  SDValue Ptr = St->getBasePtr();
466  unsigned Alignment = St->getAlignment();
467  AAMDNodes AAInfo = St->getAAInfo();
468 
469  assert(NVT.isByteSized() && "Expanded type not byte sized!");
470  unsigned IncrementSize = NVT.getSizeInBits() / 8;
471 
472  SDValue Lo, Hi;
473  GetExpandedOp(St->getValue(), Lo, Hi);
474 
475  if (TLI.hasBigEndianPartOrdering(ValueVT, DAG.getDataLayout()))
476  std::swap(Lo, Hi);
477 
478  Lo = DAG.getStore(Chain, dl, Lo, Ptr, St->getPointerInfo(), Alignment,
479  St->getMemOperand()->getFlags(), AAInfo);
480 
481  Ptr = DAG.getObjectPtrOffset(dl, Ptr, IncrementSize);
482  Hi = DAG.getStore(Chain, dl, Hi, Ptr,
483  St->getPointerInfo().getWithOffset(IncrementSize),
484  MinAlign(Alignment, IncrementSize),
485  St->getMemOperand()->getFlags(), AAInfo);
486 
487  return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
488 }
489 
490 
491 //===--------------------------------------------------------------------===//
492 // Generic Result Splitting.
493 //===--------------------------------------------------------------------===//
494 
495 // Be careful to make no assumptions about which of Lo/Hi is stored first in
496 // memory (for vectors it is always Lo first followed by Hi in the following
497 // bytes; for integers and floats it is Lo first if and only if the machine is
498 // little-endian).
499 
500 void DAGTypeLegalizer::SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
501  SDValue &Lo, SDValue &Hi) {
502  SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
503  GetSplitOp(Op, Lo, Hi);
504 }
505 
506 void DAGTypeLegalizer::SplitRes_SELECT(SDNode *N, SDValue &Lo, SDValue &Hi) {
507  SDValue LL, LH, RL, RH, CL, CH;
508  SDLoc dl(N);
509  GetSplitOp(N->getOperand(1), LL, LH);
510  GetSplitOp(N->getOperand(2), RL, RH);
511 
512  SDValue Cond = N->getOperand(0);
513  CL = CH = Cond;
514  if (Cond.getValueType().isVector()) {
515  if (SDValue Res = WidenVSELECTAndMask(N))
516  std::tie(CL, CH) = DAG.SplitVector(Res->getOperand(0), dl);
517  // Check if there are already splitted versions of the vector available and
518  // use those instead of splitting the mask operand again.
519  else if (getTypeAction(Cond.getValueType()) ==
521  GetSplitVector(Cond, CL, CH);
522  // It seems to improve code to generate two narrow SETCCs as opposed to
523  // splitting a wide result vector.
524  else if (Cond.getOpcode() == ISD::SETCC) {
525  // If the condition is a vXi1 vector, and the LHS of the setcc is a legal
526  // type and the setcc result type is the same vXi1, then leave the setcc
527  // alone.
528  EVT CondLHSVT = Cond.getOperand(0).getValueType();
529  if (Cond.getValueType().getVectorElementType() == MVT::i1 &&
530  isTypeLegal(CondLHSVT) &&
531  getSetCCResultType(CondLHSVT) == Cond.getValueType())
532  std::tie(CL, CH) = DAG.SplitVector(Cond, dl);
533  else
534  SplitVecRes_SETCC(Cond.getNode(), CL, CH);
535  } else
536  std::tie(CL, CH) = DAG.SplitVector(Cond, dl);
537  }
538 
539  Lo = DAG.getNode(N->getOpcode(), dl, LL.getValueType(), CL, LL, RL);
540  Hi = DAG.getNode(N->getOpcode(), dl, LH.getValueType(), CH, LH, RH);
541 }
542 
543 void DAGTypeLegalizer::SplitRes_SELECT_CC(SDNode *N, SDValue &Lo,
544  SDValue &Hi) {
545  SDValue LL, LH, RL, RH;
546  SDLoc dl(N);
547  GetSplitOp(N->getOperand(2), LL, LH);
548  GetSplitOp(N->getOperand(3), RL, RH);
549 
550  Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0),
551  N->getOperand(1), LL, RL, N->getOperand(4));
552  Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0),
553  N->getOperand(1), LH, RH, N->getOperand(4));
554 }
555 
556 void DAGTypeLegalizer::SplitRes_UNDEF(SDNode *N, SDValue &Lo, SDValue &Hi) {
557  EVT LoVT, HiVT;
558  std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
559  Lo = DAG.getUNDEF(LoVT);
560  Hi = DAG.getUNDEF(HiVT);
561 }
SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
Helper function to build ISD::STORE nodes.
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
Definition: ISDOpcodes.h:603
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
virtual MVT getVectorIdxTy(const DataLayout &DL) const
Returns the type to be used for the index operand of: ISD::INSERT_VECTOR_ELT, ISD::EXTRACT_VECTOR_ELT...
EVT getValueType() const
Return the ValueType of the referenced return value.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
const SDValue & getBasePtr() const
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
const SDValue & getValue() const
AAMDNodes getAAInfo() const
Returns the AA info that describes the dereference.
const SDValue & getChain() const
unsigned getAlignment() const
bool isInteger() const
Return true if this is an integer or a vector integer type.
Definition: ValueTypes.h:140
SDNode * getNode() const
get the SDNode which holds the desired result
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
void reserve(size_type N)
Definition: SmallVector.h:369
bool isByteSized() const
Return true if the bit size is a multiple of 8.
Definition: ValueTypes.h:211
MachineMemOperand * getMemOperand() const
Return a MachineMemOperand object describing the memory reference performed by operation.
unsigned getValueSizeInBits() const
Returns the size of the value in bits.
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition: ISDOpcodes.h:474
ArrayRef< T > makeArrayRef(const T &OneElt)
Construct an ArrayRef from a single element.
Definition: ArrayRef.h:450
bool isNormalStore(const SDNode *N)
Returns true if the specified node is a non-truncating and unindexed store.
Type * getTypeForEVT(LLVMContext &Context) const
This method returns an LLVM type corresponding to the specified EVT.
Definition: ValueTypes.cpp:264
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition: ISDOpcodes.h:190
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:41
bool hasBigEndianPartOrdering(EVT VT, const DataLayout &DL) const
When splitting a value of the specified type into parts, does the Lo or Hi part come first...
SDValue getEntryNode() const
Return the token chain corresponding to the entry of the function.
Definition: SelectionDAG.h:477
const DataLayout & getDataLayout() const
Definition: SelectionDAG.h:417
unsigned getSizeInBits() const
Return the size of the specified value type in bits.
Definition: ValueTypes.h:291
MachineFunction & getMachineFunction() const
Definition: SelectionDAG.h:414
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:200
SDValue getUNDEF(EVT VT)
Return an UNDEF node. UNDEF does not have a useful SDLoc.
Definition: SelectionDAG.h:878
std::pair< EVT, EVT > GetSplitDestVTs(const EVT &VT) const
Compute the VTs needed for the low/hi parts of a type which is split (or expanded) into two not neces...
This class is used to represent ISD::STORE nodes.
constexpr uint64_t MinAlign(uint64_t A, uint64_t B)
A and B are either alignments or offsets.
Definition: MathExtras.h:661
const SDValue & getBasePtr() const
bool isNormalLoad(const SDNode *N)
Returns true if the specified node is a non-extending and unindexed load.
unsigned getVectorNumElements() const
Given a vector type, return the number of elements it contains.
Definition: ValueTypes.h:272
const SDValue & getOperand(unsigned Num) const
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL...
Definition: ISDOpcodes.h:364
unsigned getPrefTypeAlignment(Type *Ty) const
Returns the preferred stack/global alignment for the specified type.
Definition: DataLayout.cpp:765
constexpr double e
Definition: MathExtras.h:57
Extended Value Type.
Definition: ValueTypes.h:33
size_t size() const
Definition: SmallVector.h:52
This class contains a discriminated union of information about pointers in memory operands...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:40
SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr)
Loads are not normal binary operators: their result type is not determined by their operands...
SDValue CreateStackTemporary(EVT VT, unsigned minAlign=1)
Create a stack temporary, suitable for holding the specified value type.
TokenFactor - This node takes multiple tokens as input and produces a single token result...
Definition: ISDOpcodes.h:49
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition: ISDOpcodes.h:371
EVT getVectorElementType() const
Given a vector type, return the type of each element.
Definition: ValueTypes.h:264
std::pair< SDValue, SDValue > SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT, const EVT &HiVT)
Split the vector with EXTRACT_SUBVECTOR using the provides VTs and return the low/high part...
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:837
SDValue getBuildVector(EVT VT, const SDLoc &DL, ArrayRef< SDValue > Ops)
Return an ISD::BUILD_VECTOR node.
Definition: SelectionDAG.h:750
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Definition: Metadata.h:643
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
MachinePointerInfo getWithOffset(int64_t O) const
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
Definition: BitVector.h:940
static EVT getVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements, bool IsScalable=false)
Returns the EVT that represents a vector NumElements in length, where each element is of type VT...
Definition: ValueTypes.h:72
bool bitsLT(EVT VT) const
Return true if this has less bits than VT.
Definition: ValueTypes.h:240
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:510
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
bool isVector() const
Return true if this is a vector value type.
Definition: ValueTypes.h:150
#define N
Flags getFlags() const
Return the raw flags of the source value,.
SDValue getValue(unsigned R) const
SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
Create a ConstantSDNode wrapping a constant value.
SDValue getVAArg(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align)
VAArg produces a result and token chain, and takes a pointer and a source value as input...
const MachinePointerInfo & getPointerInfo() const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
uint64_t getConstantOperandVal(unsigned Num) const
Helper method returns the integer value of a ConstantSDNode operand.
SetCC operator - This evaluates to a true value iff the condition is true.
Definition: ISDOpcodes.h:482
bool isBigEndian() const
Definition: DataLayout.h:233
SDValue getObjectPtrOffset(const SDLoc &SL, SDValue Op, int64_t Offset)
Create an add instruction with appropriate flags when used for addressing some offset of an object...
Definition: SelectionDAG.h:832
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
Returns the EVT that represents an integer with the given number of bits.
Definition: ValueTypes.h:63
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
LLVMContext * getContext() const
Definition: SelectionDAG.h:424
This class is used to represent ISD::LOAD nodes.