LLVM  11.0.0git
LegalizeTypesGeneric.cpp
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1 //===-------- LegalizeTypesGeneric.cpp - Generic type legalization --------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements generic type expansion and splitting for LegalizeTypes.
10 // The routines here perform legalization when the details of the type (such as
11 // whether it is an integer or a float) do not matter.
12 // Expansion is the act of changing a computation in an illegal type to be a
13 // computation in two identical registers of a smaller type. The Lo/Hi part
14 // is required to be stored first in memory on little/big-endian machines.
15 // Splitting is the act of changing a computation in an illegal type to be a
16 // computation in two not necessarily identical registers of a smaller type.
17 // There are no requirements on how the type is represented in memory.
18 //
19 //===----------------------------------------------------------------------===//
20 
21 #include "LegalizeTypes.h"
22 #include "llvm/IR/DataLayout.h"
23 using namespace llvm;
24 
25 #define DEBUG_TYPE "legalize-types"
26 
27 //===----------------------------------------------------------------------===//
28 // Generic Result Expansion.
29 //===----------------------------------------------------------------------===//
30 
31 // These routines assume that the Lo/Hi part is stored first in memory on
32 // little/big-endian machines, followed by the Hi/Lo part. This means that
33 // they cannot be used as is on vectors, for which Lo is always stored first.
34 void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
35  SDValue &Lo, SDValue &Hi) {
36  SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
37  GetExpandedOp(Op, Lo, Hi);
38 }
39 
40 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
41  EVT OutVT = N->getValueType(0);
42  EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT);
43  SDValue InOp = N->getOperand(0);
44  EVT InVT = InOp.getValueType();
45  SDLoc dl(N);
46 
47  // Handle some special cases efficiently.
48  switch (getTypeAction(InVT)) {
51  break;
54  llvm_unreachable("Bitcast of a promotion-needing float should never need"
55  "expansion");
57  SplitInteger(GetSoftenedFloat(InOp), Lo, Hi);
58  Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
59  Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
60  return;
63  auto &DL = DAG.getDataLayout();
64  // Convert the expanded pieces of the input.
65  GetExpandedOp(InOp, Lo, Hi);
66  if (TLI.hasBigEndianPartOrdering(InVT, DL) !=
67  TLI.hasBigEndianPartOrdering(OutVT, DL))
68  std::swap(Lo, Hi);
69  Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
70  Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
71  return;
72  }
74  GetSplitVector(InOp, Lo, Hi);
75  if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout()))
76  std::swap(Lo, Hi);
77  Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
78  Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
79  return;
81  // Convert the element instead.
82  SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi);
83  Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
84  Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
85  return;
87  assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST");
88  InOp = GetWidenedVector(InOp);
89  EVT LoVT, HiVT;
90  std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT);
91  std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT, HiVT);
92  if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout()))
93  std::swap(Lo, Hi);
94  Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
95  Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
96  return;
97  }
98  }
99 
100  if (InVT.isVector() && OutVT.isInteger()) {
101  // Handle cases like i64 = BITCAST v1i64 on x86, where the operand
102  // is legal but the result is not.
103  unsigned NumElems = 2;
104  EVT ElemVT = NOutVT;
105  EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems);
106 
107  // If <ElemVT * N> is not a legal type, try <ElemVT/2 * (N*2)>.
108  while (!isTypeLegal(NVT)) {
109  unsigned NewSizeInBits = ElemVT.getSizeInBits() / 2;
110  // If the element size is smaller than byte, bail.
111  if (NewSizeInBits < 8)
112  break;
113  NumElems *= 2;
114  ElemVT = EVT::getIntegerVT(*DAG.getContext(), NewSizeInBits);
115  NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems);
116  }
117 
118  if (isTypeLegal(NVT)) {
119  SDValue CastInOp = DAG.getNode(ISD::BITCAST, dl, NVT, InOp);
120 
122  for (unsigned i = 0; i < NumElems; ++i)
123  Vals.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ElemVT,
124  CastInOp, DAG.getVectorIdxConstant(i, dl)));
125 
126  // Build Lo, Hi pair by pairing extracted elements if needed.
127  unsigned Slot = 0;
128  for (unsigned e = Vals.size(); e - Slot > 2; Slot += 2, e += 1) {
129  // Each iteration will BUILD_PAIR two nodes and append the result until
130  // there are only two nodes left, i.e. Lo and Hi.
131  SDValue LHS = Vals[Slot];
132  SDValue RHS = Vals[Slot + 1];
133 
134  if (DAG.getDataLayout().isBigEndian())
135  std::swap(LHS, RHS);
136 
137  Vals.push_back(DAG.getNode(
138  ISD::BUILD_PAIR, dl,
139  EVT::getIntegerVT(*DAG.getContext(), LHS.getValueSizeInBits() << 1),
140  LHS, RHS));
141  }
142  Lo = Vals[Slot++];
143  Hi = Vals[Slot++];
144 
145  if (DAG.getDataLayout().isBigEndian())
146  std::swap(Lo, Hi);
147 
148  return;
149  }
150  }
151 
152  // Lower the bit-convert to a store/load from the stack.
153  assert(NOutVT.isByteSized() && "Expanded type not byte sized!");
154 
155  // Create the stack frame object. Make sure it is aligned for both
156  // the source and expanded destination types.
157  Align Alignment = DAG.getDataLayout().getPrefTypeAlign(
158  NOutVT.getTypeForEVT(*DAG.getContext()));
159  SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment.value());
160  int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
161  MachinePointerInfo PtrInfo =
163 
164  // Emit a store to the stack slot.
165  SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, InOp, StackPtr, PtrInfo);
166 
167  // Load the first half from the stack slot.
168  Lo = DAG.getLoad(NOutVT, dl, Store, StackPtr, PtrInfo, Alignment);
169 
170  // Increment the pointer to the other half.
171  unsigned IncrementSize = NOutVT.getSizeInBits() / 8;
172  StackPtr = DAG.getMemBasePlusOffset(StackPtr, IncrementSize, dl);
173 
174  // Load the second half from the stack slot.
175  Hi = DAG.getLoad(NOutVT, dl, Store, StackPtr,
176  PtrInfo.getWithOffset(IncrementSize), Alignment);
177 
178  // Handle endianness of the load.
179  if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout()))
180  std::swap(Lo, Hi);
181 }
182 
183 void DAGTypeLegalizer::ExpandRes_BUILD_PAIR(SDNode *N, SDValue &Lo,
184  SDValue &Hi) {
185  // Return the operands.
186  Lo = N->getOperand(0);
187  Hi = N->getOperand(1);
188 }
189 
190 void DAGTypeLegalizer::ExpandRes_EXTRACT_ELEMENT(SDNode *N, SDValue &Lo,
191  SDValue &Hi) {
192  GetExpandedOp(N->getOperand(0), Lo, Hi);
193  SDValue Part = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ?
194  Hi : Lo;
195 
196  assert(Part.getValueType() == N->getValueType(0) &&
197  "Type twice as big as expanded type not itself expanded!");
198 
199  GetPairElements(Part, Lo, Hi);
200 }
201 
202 void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo,
203  SDValue &Hi) {
204  SDValue OldVec = N->getOperand(0);
205  unsigned OldElts = OldVec.getValueType().getVectorNumElements();
206  EVT OldEltVT = OldVec.getValueType().getVectorElementType();
207  SDLoc dl(N);
208 
209  // Convert to a vector of the expanded element type, for example
210  // <3 x i64> -> <6 x i32>.
211  EVT OldVT = N->getValueType(0);
212  EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT);
213 
214  if (OldVT != OldEltVT) {
215  // The result of EXTRACT_VECTOR_ELT may be larger than the element type of
216  // the input vector. If so, extend the elements of the input vector to the
217  // same bitwidth as the result before expanding.
218  assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!");
219  EVT NVecVT = EVT::getVectorVT(*DAG.getContext(), OldVT, OldElts);
220  OldVec = DAG.getNode(ISD::ANY_EXTEND, dl, NVecVT, N->getOperand(0));
221  }
222 
223  SDValue NewVec = DAG.getNode(ISD::BITCAST, dl,
225  NewVT, 2*OldElts),
226  OldVec);
227 
228  // Extract the elements at 2 * Idx and 2 * Idx + 1 from the new vector.
229  SDValue Idx = N->getOperand(1);
230 
231  Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx);
232  Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
233 
234  Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx,
235  DAG.getConstant(1, dl, Idx.getValueType()));
236  Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
237 
238  if (DAG.getDataLayout().isBigEndian())
239  std::swap(Lo, Hi);
240 }
241 
242 void DAGTypeLegalizer::ExpandRes_NormalLoad(SDNode *N, SDValue &Lo,
243  SDValue &Hi) {
244  assert(ISD::isNormalLoad(N) && "This routine only for normal loads!");
245  SDLoc dl(N);
246 
247  LoadSDNode *LD = cast<LoadSDNode>(N);
248  assert(!LD->isAtomic() && "Atomics can not be split");
249  EVT ValueVT = LD->getValueType(0);
250  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT);
251  SDValue Chain = LD->getChain();
252  SDValue Ptr = LD->getBasePtr();
253  AAMDNodes AAInfo = LD->getAAInfo();
254 
255  assert(NVT.isByteSized() && "Expanded type not byte sized!");
256 
257  Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(),
258  LD->getOriginalAlign(), LD->getMemOperand()->getFlags(),
259  AAInfo);
260 
261  // Increment the pointer to the other half.
262  unsigned IncrementSize = NVT.getSizeInBits() / 8;
263  Ptr = DAG.getMemBasePlusOffset(Ptr, IncrementSize, dl);
264  Hi = DAG.getLoad(
265  NVT, dl, Chain, Ptr, LD->getPointerInfo().getWithOffset(IncrementSize),
266  LD->getOriginalAlign(), LD->getMemOperand()->getFlags(), AAInfo);
267 
268  // Build a factor node to remember that this load is independent of the
269  // other one.
270  Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
271  Hi.getValue(1));
272 
273  // Handle endianness of the load.
274  if (TLI.hasBigEndianPartOrdering(ValueVT, DAG.getDataLayout()))
275  std::swap(Lo, Hi);
276 
277  // Modified the chain - switch anything that used the old chain to use
278  // the new one.
279  ReplaceValueWith(SDValue(N, 1), Chain);
280 }
281 
282 void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) {
283  EVT OVT = N->getValueType(0);
284  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), OVT);
285  SDValue Chain = N->getOperand(0);
286  SDValue Ptr = N->getOperand(1);
287  SDLoc dl(N);
288  const unsigned Align = N->getConstantOperandVal(3);
289 
290  Lo = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), Align);
291  Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2), 0);
292  Chain = Hi.getValue(1);
293 
294  // Handle endianness of the load.
295  if (TLI.hasBigEndianPartOrdering(OVT, DAG.getDataLayout()))
296  std::swap(Lo, Hi);
297 
298  // Modified the chain - switch anything that used the old chain to use
299  // the new one.
300  ReplaceValueWith(SDValue(N, 1), Chain);
301 }
302 
303 
304 //===--------------------------------------------------------------------===//
305 // Generic Operand Expansion.
306 //===--------------------------------------------------------------------===//
307 
308 void DAGTypeLegalizer::IntegerToVector(SDValue Op, unsigned NumElements,
310  EVT EltVT) {
311  assert(Op.getValueType().isInteger());
312  SDLoc DL(Op);
313  SDValue Parts[2];
314 
315  if (NumElements > 1) {
316  NumElements >>= 1;
317  SplitInteger(Op, Parts[0], Parts[1]);
318  if (DAG.getDataLayout().isBigEndian())
319  std::swap(Parts[0], Parts[1]);
320  IntegerToVector(Parts[0], NumElements, Ops, EltVT);
321  IntegerToVector(Parts[1], NumElements, Ops, EltVT);
322  } else {
323  Ops.push_back(DAG.getNode(ISD::BITCAST, DL, EltVT, Op));
324  }
325 }
326 
327 SDValue DAGTypeLegalizer::ExpandOp_BITCAST(SDNode *N) {
328  SDLoc dl(N);
329  if (N->getValueType(0).isVector() &&
330  N->getOperand(0).getValueType().isInteger()) {
331  // An illegal expanding type is being converted to a legal vector type.
332  // Make a two element vector out of the expanded parts and convert that
333  // instead, but only if the new vector type is legal (otherwise there
334  // is no point, and it might create expansion loops). For example, on
335  // x86 this turns v1i64 = BITCAST i64 into v1i64 = BITCAST v2i32.
336  //
337  // FIXME: I'm not sure why we are first trying to split the input into
338  // a 2 element vector, so I'm leaving it here to maintain the current
339  // behavior.
340  unsigned NumElts = 2;
341  EVT OVT = N->getOperand(0).getValueType();
342  EVT NVT = EVT::getVectorVT(*DAG.getContext(),
343  TLI.getTypeToTransformTo(*DAG.getContext(), OVT),
344  NumElts);
345  if (!isTypeLegal(NVT)) {
346  // If we can't find a legal type by splitting the integer in half,
347  // then we can use the node's value type.
348  NumElts = N->getValueType(0).getVectorNumElements();
349  NVT = N->getValueType(0);
350  }
351 
353  IntegerToVector(N->getOperand(0), NumElts, Ops, NVT.getVectorElementType());
354 
355  SDValue Vec =
356  DAG.getBuildVector(NVT, dl, makeArrayRef(Ops.data(), NumElts));
357  return DAG.getNode(ISD::BITCAST, dl, N->getValueType(0), Vec);
358  }
359 
360  // Otherwise, store to a temporary and load out again as the new type.
361  return CreateStackStoreLoad(N->getOperand(0), N->getValueType(0));
362 }
363 
364 SDValue DAGTypeLegalizer::ExpandOp_BUILD_VECTOR(SDNode *N) {
365  // The vector type is legal but the element type needs expansion.
366  EVT VecVT = N->getValueType(0);
367  unsigned NumElts = VecVT.getVectorNumElements();
368  EVT OldVT = N->getOperand(0).getValueType();
369  EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT);
370  SDLoc dl(N);
371 
372  assert(OldVT == VecVT.getVectorElementType() &&
373  "BUILD_VECTOR operand type doesn't match vector element type!");
374 
375  // Build a vector of twice the length out of the expanded elements.
376  // For example <3 x i64> -> <6 x i32>.
377  SmallVector<SDValue, 16> NewElts;
378  NewElts.reserve(NumElts*2);
379 
380  for (unsigned i = 0; i < NumElts; ++i) {
381  SDValue Lo, Hi;
382  GetExpandedOp(N->getOperand(i), Lo, Hi);
383  if (DAG.getDataLayout().isBigEndian())
384  std::swap(Lo, Hi);
385  NewElts.push_back(Lo);
386  NewElts.push_back(Hi);
387  }
388 
389  EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NewElts.size());
390  SDValue NewVec = DAG.getBuildVector(NewVecVT, dl, NewElts);
391 
392  // Convert the new vector to the old vector type.
393  return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec);
394 }
395 
396 SDValue DAGTypeLegalizer::ExpandOp_EXTRACT_ELEMENT(SDNode *N) {
397  SDValue Lo, Hi;
398  GetExpandedOp(N->getOperand(0), Lo, Hi);
399  return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ? Hi : Lo;
400 }
401 
402 SDValue DAGTypeLegalizer::ExpandOp_INSERT_VECTOR_ELT(SDNode *N) {
403  // The vector type is legal but the element type needs expansion.
404  EVT VecVT = N->getValueType(0);
405  unsigned NumElts = VecVT.getVectorNumElements();
406  SDLoc dl(N);
407 
408  SDValue Val = N->getOperand(1);
409  EVT OldEVT = Val.getValueType();
410  EVT NewEVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldEVT);
411 
412  assert(OldEVT == VecVT.getVectorElementType() &&
413  "Inserted element type doesn't match vector element type!");
414 
415  // Bitconvert to a vector of twice the length with elements of the expanded
416  // type, insert the expanded vector elements, and then convert back.
417  EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewEVT, NumElts*2);
418  SDValue NewVec = DAG.getNode(ISD::BITCAST, dl,
419  NewVecVT, N->getOperand(0));
420 
421  SDValue Lo, Hi;
422  GetExpandedOp(Val, Lo, Hi);
423  if (DAG.getDataLayout().isBigEndian())
424  std::swap(Lo, Hi);
425 
426  SDValue Idx = N->getOperand(2);
427  Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx);
428  NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Lo, Idx);
429  Idx = DAG.getNode(ISD::ADD, dl,
430  Idx.getValueType(), Idx,
431  DAG.getConstant(1, dl, Idx.getValueType()));
432  NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Hi, Idx);
433 
434  // Convert the new vector to the old vector type.
435  return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec);
436 }
437 
438 SDValue DAGTypeLegalizer::ExpandOp_SCALAR_TO_VECTOR(SDNode *N) {
439  SDLoc dl(N);
440  EVT VT = N->getValueType(0);
442  "SCALAR_TO_VECTOR operand type doesn't match vector element type!");
443  unsigned NumElts = VT.getVectorNumElements();
444  SmallVector<SDValue, 16> Ops(NumElts);
445  Ops[0] = N->getOperand(0);
446  SDValue UndefVal = DAG.getUNDEF(Ops[0].getValueType());
447  for (unsigned i = 1; i < NumElts; ++i)
448  Ops[i] = UndefVal;
449  return DAG.getBuildVector(VT, dl, Ops);
450 }
451 
452 SDValue DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) {
453  assert(ISD::isNormalStore(N) && "This routine only for normal stores!");
454  assert(OpNo == 1 && "Can only expand the stored value so far");
455  SDLoc dl(N);
456 
457  StoreSDNode *St = cast<StoreSDNode>(N);
458  assert(!St->isAtomic() && "Atomics can not be split");
459  EVT ValueVT = St->getValue().getValueType();
460  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT);
461  SDValue Chain = St->getChain();
462  SDValue Ptr = St->getBasePtr();
463  AAMDNodes AAInfo = St->getAAInfo();
464 
465  assert(NVT.isByteSized() && "Expanded type not byte sized!");
466  unsigned IncrementSize = NVT.getSizeInBits() / 8;
467 
468  SDValue Lo, Hi;
469  GetExpandedOp(St->getValue(), Lo, Hi);
470 
471  if (TLI.hasBigEndianPartOrdering(ValueVT, DAG.getDataLayout()))
472  std::swap(Lo, Hi);
473 
474  Lo = DAG.getStore(Chain, dl, Lo, Ptr, St->getPointerInfo(),
475  St->getOriginalAlign(), St->getMemOperand()->getFlags(),
476  AAInfo);
477 
478  Ptr = DAG.getObjectPtrOffset(dl, Ptr, IncrementSize);
479  Hi = DAG.getStore(
480  Chain, dl, Hi, Ptr, St->getPointerInfo().getWithOffset(IncrementSize),
481  St->getOriginalAlign(), St->getMemOperand()->getFlags(), AAInfo);
482 
483  return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
484 }
485 
486 
487 //===--------------------------------------------------------------------===//
488 // Generic Result Splitting.
489 //===--------------------------------------------------------------------===//
490 
491 // Be careful to make no assumptions about which of Lo/Hi is stored first in
492 // memory (for vectors it is always Lo first followed by Hi in the following
493 // bytes; for integers and floats it is Lo first if and only if the machine is
494 // little-endian).
495 
496 void DAGTypeLegalizer::SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
497  SDValue &Lo, SDValue &Hi) {
498  SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
499  GetSplitOp(Op, Lo, Hi);
500 }
501 
502 void DAGTypeLegalizer::SplitRes_SELECT(SDNode *N, SDValue &Lo, SDValue &Hi) {
503  SDValue LL, LH, RL, RH, CL, CH;
504  SDLoc dl(N);
505  GetSplitOp(N->getOperand(1), LL, LH);
506  GetSplitOp(N->getOperand(2), RL, RH);
507 
508  SDValue Cond = N->getOperand(0);
509  CL = CH = Cond;
510  if (Cond.getValueType().isVector()) {
511  if (SDValue Res = WidenVSELECTAndMask(N))
512  std::tie(CL, CH) = DAG.SplitVector(Res->getOperand(0), dl);
513  // Check if there are already splitted versions of the vector available and
514  // use those instead of splitting the mask operand again.
515  else if (getTypeAction(Cond.getValueType()) ==
517  GetSplitVector(Cond, CL, CH);
518  // It seems to improve code to generate two narrow SETCCs as opposed to
519  // splitting a wide result vector.
520  else if (Cond.getOpcode() == ISD::SETCC) {
521  // If the condition is a vXi1 vector, and the LHS of the setcc is a legal
522  // type and the setcc result type is the same vXi1, then leave the setcc
523  // alone.
524  EVT CondLHSVT = Cond.getOperand(0).getValueType();
525  if (Cond.getValueType().getVectorElementType() == MVT::i1 &&
526  isTypeLegal(CondLHSVT) &&
527  getSetCCResultType(CondLHSVT) == Cond.getValueType())
528  std::tie(CL, CH) = DAG.SplitVector(Cond, dl);
529  else
530  SplitVecRes_SETCC(Cond.getNode(), CL, CH);
531  } else
532  std::tie(CL, CH) = DAG.SplitVector(Cond, dl);
533  }
534 
535  Lo = DAG.getNode(N->getOpcode(), dl, LL.getValueType(), CL, LL, RL);
536  Hi = DAG.getNode(N->getOpcode(), dl, LH.getValueType(), CH, LH, RH);
537 }
538 
539 void DAGTypeLegalizer::SplitRes_SELECT_CC(SDNode *N, SDValue &Lo,
540  SDValue &Hi) {
541  SDValue LL, LH, RL, RH;
542  SDLoc dl(N);
543  GetSplitOp(N->getOperand(2), LL, LH);
544  GetSplitOp(N->getOperand(3), RL, RH);
545 
546  Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0),
547  N->getOperand(1), LL, RL, N->getOperand(4));
548  Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0),
549  N->getOperand(1), LH, RH, N->getOperand(4));
550 }
551 
552 void DAGTypeLegalizer::SplitRes_UNDEF(SDNode *N, SDValue &Lo, SDValue &Hi) {
553  EVT LoVT, HiVT;
554  std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
555  Lo = DAG.getUNDEF(LoVT);
556  Hi = DAG.getUNDEF(HiVT);
557 }
558 
559 void DAGTypeLegalizer::SplitRes_FREEZE(SDNode *N, SDValue &Lo, SDValue &Hi) {
560  SDValue L, H;
561  SDLoc dl(N);
562  GetSplitOp(N->getOperand(0), L, H);
563 
564  Lo = DAG.getNode(ISD::FREEZE, dl, L.getValueType(), L);
565  Hi = DAG.getNode(ISD::FREEZE, dl, H.getValueType(), H);
566 }
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
Definition: ISDOpcodes.h:743
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
EVT getValueType() const
Return the ValueType of the referenced return value.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
const SDValue & getBasePtr() const
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
const SDValue & getValue() const
AAMDNodes getAAInfo() const
Returns the AA info that describes the dereference.
const SDValue & getChain() const
bool isInteger() const
Return true if this is an integer or a vector integer type.
Definition: ValueTypes.h:136
SDNode * getNode() const
get the SDNode which holds the desired result
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
void reserve(size_type N)
Definition: SmallVector.h:415
bool isByteSized() const
Return true if the bit size is a multiple of 8.
Definition: ValueTypes.h:207
MachineMemOperand * getMemOperand() const
Return a MachineMemOperand object describing the memory reference performed by operation.
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition: ISDOpcodes.h:611
ArrayRef< T > makeArrayRef(const T &OneElt)
Construct an ArrayRef from a single element.
Definition: ArrayRef.h:458
bool isNormalStore(const SDNode *N)
Returns true if the specified node is a non-truncating and unindexed store.
Type * getTypeForEVT(LLVMContext &Context) const
This method returns an LLVM type corresponding to the specified EVT.
Definition: ValueTypes.cpp:165
Align getOriginalAlign() const
Returns alignment and volatility of the memory access.
SDValue getObjectPtrOffset(const SDLoc &SL, SDValue Ptr, int64_t Offset)
Create an add instruction with appropriate flags when used for addressing some offset of an object...
Definition: SelectionDAG.h:869
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition: ISDOpcodes.h:212
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
bool hasBigEndianPartOrdering(EVT VT, const DataLayout &DL) const
When splitting a value of the specified type into parts, does the Lo or Hi part come first...
SDValue getEntryNode() const
Return the token chain corresponding to the entry of the function.
Definition: SelectionDAG.h:485
TypeSize getValueSizeInBits() const
Returns the size of the value in bits.
const DataLayout & getDataLayout() const
Definition: SelectionDAG.h:423
MachineFunction & getMachineFunction() const
Definition: SelectionDAG.h:420
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:222
SDValue getUNDEF(EVT VT)
Return an UNDEF node. UNDEF does not have a useful SDLoc.
Definition: SelectionDAG.h:914
std::pair< EVT, EVT > GetSplitDestVTs(const EVT &VT) const
Compute the VTs needed for the low/hi parts of a type which is split (or expanded) into two not neces...
This class is used to represent ISD::STORE nodes.
SmallVector< MachineOperand, 4 > Cond
const SDValue & getBasePtr() const
bool isNormalLoad(const SDNode *N)
Returns true if the specified node is a non-extending and unindexed load.
unsigned getVectorNumElements() const
Given a vector type, return the number of elements it contains.
Definition: ValueTypes.h:270
const SDValue & getOperand(unsigned Num) const
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL...
Definition: ISDOpcodes.h:464
#define H(x, y, z)
Definition: MD5.cpp:58
constexpr double e
Definition: MathExtras.h:58
SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, MaybeAlign Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr)
Loads are not normal binary operators: their result type is not determined by their operands...
Extended Value Type.
Definition: ValueTypes.h:35
TypeSize getSizeInBits() const
Return the size of the specified value type in bits.
Definition: ValueTypes.h:300
This class contains a discriminated union of information about pointers in memory operands...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
TokenFactor - This node takes multiple tokens as input and produces a single token result...
Definition: ISDOpcodes.h:52
SDValue CreateStackTemporary(TypeSize Bytes, Align Alignment)
Create a stack temporary based on the size in bytes and the alignment.
SDValue getMemBasePlusOffset(SDValue Base, int64_t Offset, const SDLoc &DL, const SDNodeFlags Flags=SDNodeFlags())
Returns sum of the base pointer and offset.
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition: ISDOpcodes.h:475
EVT getVectorElementType() const
Given a vector type, return the type of each element.
Definition: ValueTypes.h:262
std::pair< SDValue, SDValue > SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT, const EVT &HiVT)
Split the vector with EXTRACT_SUBVECTOR using the provides VTs and return the low/high part...
bool isAtomic() const
Return true if the memory operation ordering is Unordered or higher.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:883
SDValue getBuildVector(EVT VT, const SDLoc &DL, ArrayRef< SDValue > Ops)
Return an ISD::BUILD_VECTOR node.
Definition: SelectionDAG.h:761
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Definition: Metadata.h:642
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
MachinePointerInfo getWithOffset(int64_t O) const
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
Definition: BitVector.h:962
static EVT getVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements, bool IsScalable=false)
Returns the EVT that represents a vector NumElements in length, where each element is of type VT...
Definition: ValueTypes.h:74
bool bitsLT(EVT VT) const
Return true if this has less bits than VT.
Definition: ValueTypes.h:238
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:649
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
bool isVector() const
Return true if this is a vector value type.
Definition: ValueTypes.h:146
SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
Helper function to build ISD::STORE nodes.
#define N
Flags getFlags() const
Return the raw flags of the source value,.
Align getPrefTypeAlign(Type *Ty) const
Returns the preferred stack/global alignment for the specified type.
Definition: DataLayout.cpp:780
SDValue getValue(unsigned R) const
SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
Create a ConstantSDNode wrapping a constant value.
SDValue getVAArg(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align)
VAArg produces a result and token chain, and takes a pointer and a source value as input...
const MachinePointerInfo & getPointerInfo() const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
uint64_t getConstantOperandVal(unsigned Num) const
Helper method returns the integer value of a ConstantSDNode operand.
SDValue getVectorIdxConstant(uint64_t Val, const SDLoc &DL, bool isTarget=false)
SetCC operator - This evaluates to a true value iff the condition is true.
Definition: ISDOpcodes.h:619
bool isBigEndian() const
Definition: DataLayout.h:233
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
Returns the EVT that represents an integer with the given number of bits.
Definition: ValueTypes.h:65
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
LLVMContext * getContext() const
Definition: SelectionDAG.h:430
This class is used to represent ISD::LOAD nodes.