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13 #ifndef LLVM_TRANSFORMS_UTILS_SIZEOPTS_H
14 #define LLVM_TRANSFORMS_UTILS_SIZEOPTS_H
31 class BlockFrequencyInfo;
50 template<
typename AdapterT,
typename FuncT,
typename BFIT>
61 return AdapterT::isFunctionColdInCallGraph(
F, PSI, *
BFI);
65 return AdapterT::isFunctionColdInCallGraphNthPercentile(
71 template<
typename AdapterT,
typename BlockTOrBlockFreq,
typename BFIT>
86 BBOrBlockFreq, PSI,
BFI);
94 BlockFrequencyInfo *
BFI,
100 BlockFrequencyInfo *
BFI,
105 #endif // LLVM_TRANSFORMS_UTILS_SIZEOPTS_H
This is an optimization pass for GlobalISel generic memory operations.
bool hasPartialSampleProfile() const
Returns true if module M has partial-profile sample profile.
bool hasProfileSummary() const
Returns true if profile summary is available.
cl::opt< bool > EnablePGSO
cl::opt< bool > PGSOColdCodeOnlyForInstrPGO
static bool isPGSOColdCodeOnly(ProfileSummaryInfo *PSI)
bool shouldOptimizeForSize(const MachineFunction *MF, ProfileSummaryInfo *PSI, const MachineBlockFrequencyInfo *BFI, PGSOQueryType QueryType=PGSOQueryType::Other)
Returns true if machine function MF is suggested to be size-optimized based on the profile.
cl::opt< bool > PGSOColdCodeOnlyForSamplePGO
Analysis providing profile information.
cl::opt< int > PgsoCutoffInstrProf
cl::opt< bool > ForcePGSO
bool hasSampleProfile() const
Returns true if module M has sample profile.
bool shouldOptimizeForSizeImpl(BlockTOrBlockFreq BBOrBlockFreq, ProfileSummaryInfo *PSI, BFIT *BFI, PGSOQueryType QueryType)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool isColdBlock(const MachineBasicBlock &MBB, const MachineBlockFrequencyInfo *MBFI, ProfileSummaryInfo *PSI)
bool hasInstrumentationProfile() const
Returns true if module M has instrumentation profile.
@ BasicBlock
Various leaf nodes.
bool hasLargeWorkingSetSize() const
Returns true if the working set size of the code is considered large.
bool shouldFuncOptimizeForSizeImpl(const FuncT *F, ProfileSummaryInfo *PSI, BFIT *BFI, PGSOQueryType QueryType)
cl::opt< bool > PGSOLargeWorkingSetSizeOnly
cl::opt< bool > PGSOColdCodeOnly
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
cl::opt< int > PgsoCutoffSampleProf
cl::opt< bool > PGSOColdCodeOnlyForPartialSamplePGO