22  AMDGPUELFObjectWriter(
bool Is64Bit, uint8_t OSABI, 
bool HasRelocationAddend);
 
   25  unsigned getRelocType(
const MCFixup &, 
const MCValue &,
 
   26                        bool IsPCRel) 
const override;
 
   32AMDGPUELFObjectWriter::AMDGPUELFObjectWriter(
bool Is64Bit, 
uint8_t OSABI,
 
   33                                             bool HasRelocationAddend)
 
   35                              HasRelocationAddend) {}
 
   37unsigned AMDGPUELFObjectWriter::getRelocType(
const MCFixup &
Fixup,
 
   40  if (
const auto *SymA = 
Target.getAddSym()) {
 
   43    if (SymA->getName() == 
"SCRATCH_RSRC_DWORD0" ||
 
   44        SymA->getName() == 
"SCRATCH_RSRC_DWORD1")
 
   45      return ELF::R_AMDGPU_ABS32_LO;
 
   52    return ELF::R_AMDGPU_GOTPCREL;
 
   54    return ELF::R_AMDGPU_GOTPCREL32_LO;
 
   56    return ELF::R_AMDGPU_GOTPCREL32_HI;
 
   58    return ELF::R_AMDGPU_REL32_LO;
 
   60    return ELF::R_AMDGPU_REL32_HI;
 
   62    return ELF::R_AMDGPU_REL64;
 
   64    return ELF::R_AMDGPU_ABS32_LO;
 
   66    return ELF::R_AMDGPU_ABS32_HI;
 
   68    return ELF::R_AMDGPU_ABS64;
 
   76    return IsPCRel ? ELF::R_AMDGPU_REL32 : ELF::R_AMDGPU_ABS32;
 
   78    return IsPCRel ? ELF::R_AMDGPU_REL64 : ELF::R_AMDGPU_ABS64;
 
   82    const auto *SymA = 
Target.getAddSym();
 
   85    if (SymA->isUndefined()) {
 
   87                  Twine(
"undefined label '") + SymA->getName() + 
"'");
 
   88      return ELF::R_AMDGPU_NONE;
 
   90    return ELF::R_AMDGPU_REL16;
 
   96std::unique_ptr<MCObjectTargetWriter>
 
   98                                  bool HasRelocationAddend) {
 
   99  return std::make_unique<AMDGPUELFObjectWriter>(Is64Bit, OSABI,
 
  100                                                 HasRelocationAddend);
 
 
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
 
Provides AMDGPU specific target descriptions.
 
static Error reportError(StringRef Message)
 
PowerPC TLS Dynamic Call Fixup
 
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
 
Target - Wrapper for Target specific information.
 
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
 
@ fixup_si_sopp_br
16-bit PC relative fixup for SOPP branch instructions.
 
This is an optimization pass for GlobalISel generic memory operations.
 
std::unique_ptr< MCObjectTargetWriter > createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, bool HasRelocationAddend)
 
uint16_t MCFixupKind
Extensible enumeration to represent the type of a fixup.
 
@ FK_Data_8
A eight-byte fixup.
 
@ FK_Data_4
A four-byte fixup.
 
@ FK_SecRel_4
A four-byte section relative fixup.