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17 #ifndef LLVM_MCA_STAGES_EXECUTESTAGE_H
18 #define LLVM_MCA_STAGES_EXECUTESTAGE_H
31 unsigned NumDispatchedOpcodes;
32 unsigned NumIssuedOpcodes;
35 bool EnablePressureEvents;
41 Error issueReadyInstructions();
52 :
Stage(), HWS(
S), NumDispatchedOpcodes(0), NumIssuedOpcodes(0),
53 EnablePressureEvents(ShouldPerformBottleneckAnalysis) {}
90 #endif // LLVM_MCA_STAGES_EXECUTESTAGE_H
Class Scheduler is responsible for issuing instructions to pipeline resources.
This class represents lattice values for constants.
void notifyInstructionPending(const InstRef &IR) const
bool hasWorkToComplete() const override
Returns true if some instructions are still executing this stage.
void notifyInstructionIssued(const InstRef &IR, MutableArrayRef< std::pair< ResourceRef, ResourceCycles >> Used) const
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Statically lint checks LLVM IR
void notifyReservedOrReleasedBuffers(const InstRef &IR, bool Reserved) const
void notifyInstructionExecuted(const InstRef &IR) const
An InstRef contains both a SourceMgr index and Instruction pair.
bool isAvailable(const InstRef &IR) const override
Returns true if it can execute IR during this cycle.
Error cycleStart() override
Called once at the start of each cycle.
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void notifyResourceAvailable(const ResourceRef &RR) const
Error cycleEnd() override
Called once at the end of each cycle.
Lightweight error class with error context and mandatory checking.
Error execute(InstRef &IR) override
The primary action that this stage performs on instruction IR.
ExecuteStage(Scheduler &S)
void notifyInstructionReady(const InstRef &IR) const
ExecuteStage(Scheduler &S, bool ShouldPerformBottleneckAnalysis)
std::pair< uint64_t, uint64_t > ResourceRef
A resource unit identifier.
Optional< std::vector< StOtherPiece > > Other