LLVM  15.0.0git
TargetParser.cpp
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1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements a target parser to recognise hardware features such as
10 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "llvm/Support/TargetParser.h"
15 #include "llvm/ADT/ArrayRef.h"
16 #include "llvm/ADT/StringSwitch.h"
17 #include "llvm/ADT/Triple.h"
18 
19 using namespace llvm;
20 using namespace AMDGPU;
21 
22 namespace {
23 
24 struct GPUInfo {
25  StringLiteral Name;
26  StringLiteral CanonicalName;
27  AMDGPU::GPUKind Kind;
28  unsigned Features;
29 };
30 
31 constexpr GPUInfo R600GPUs[] = {
32  // Name Canonical Kind Features
33  // Name
34  {{"r600"}, {"r600"}, GK_R600, FEATURE_NONE },
35  {{"rv630"}, {"r600"}, GK_R600, FEATURE_NONE },
36  {{"rv635"}, {"r600"}, GK_R600, FEATURE_NONE },
37  {{"r630"}, {"r630"}, GK_R630, FEATURE_NONE },
38  {{"rs780"}, {"rs880"}, GK_RS880, FEATURE_NONE },
39  {{"rs880"}, {"rs880"}, GK_RS880, FEATURE_NONE },
40  {{"rv610"}, {"rs880"}, GK_RS880, FEATURE_NONE },
41  {{"rv620"}, {"rs880"}, GK_RS880, FEATURE_NONE },
42  {{"rv670"}, {"rv670"}, GK_RV670, FEATURE_NONE },
43  {{"rv710"}, {"rv710"}, GK_RV710, FEATURE_NONE },
44  {{"rv730"}, {"rv730"}, GK_RV730, FEATURE_NONE },
45  {{"rv740"}, {"rv770"}, GK_RV770, FEATURE_NONE },
46  {{"rv770"}, {"rv770"}, GK_RV770, FEATURE_NONE },
47  {{"cedar"}, {"cedar"}, GK_CEDAR, FEATURE_NONE },
48  {{"palm"}, {"cedar"}, GK_CEDAR, FEATURE_NONE },
49  {{"cypress"}, {"cypress"}, GK_CYPRESS, FEATURE_FMA },
50  {{"hemlock"}, {"cypress"}, GK_CYPRESS, FEATURE_FMA },
51  {{"juniper"}, {"juniper"}, GK_JUNIPER, FEATURE_NONE },
52  {{"redwood"}, {"redwood"}, GK_REDWOOD, FEATURE_NONE },
53  {{"sumo"}, {"sumo"}, GK_SUMO, FEATURE_NONE },
54  {{"sumo2"}, {"sumo"}, GK_SUMO, FEATURE_NONE },
55  {{"barts"}, {"barts"}, GK_BARTS, FEATURE_NONE },
56  {{"caicos"}, {"caicos"}, GK_CAICOS, FEATURE_NONE },
57  {{"aruba"}, {"cayman"}, GK_CAYMAN, FEATURE_FMA },
58  {{"cayman"}, {"cayman"}, GK_CAYMAN, FEATURE_FMA },
59  {{"turks"}, {"turks"}, GK_TURKS, FEATURE_NONE }
60 };
61 
62 // This table should be sorted by the value of GPUKind
63 // Don't bother listing the implicitly true features
64 constexpr GPUInfo AMDGCNGPUs[] = {
65  // Name Canonical Kind Features
66  // Name
67  {{"gfx600"}, {"gfx600"}, GK_GFX600, FEATURE_FAST_FMA_F32},
68  {{"tahiti"}, {"gfx600"}, GK_GFX600, FEATURE_FAST_FMA_F32},
69  {{"gfx601"}, {"gfx601"}, GK_GFX601, FEATURE_NONE},
70  {{"pitcairn"}, {"gfx601"}, GK_GFX601, FEATURE_NONE},
71  {{"verde"}, {"gfx601"}, GK_GFX601, FEATURE_NONE},
72  {{"gfx602"}, {"gfx602"}, GK_GFX602, FEATURE_NONE},
73  {{"hainan"}, {"gfx602"}, GK_GFX602, FEATURE_NONE},
74  {{"oland"}, {"gfx602"}, GK_GFX602, FEATURE_NONE},
75  {{"gfx700"}, {"gfx700"}, GK_GFX700, FEATURE_NONE},
76  {{"kaveri"}, {"gfx700"}, GK_GFX700, FEATURE_NONE},
77  {{"gfx701"}, {"gfx701"}, GK_GFX701, FEATURE_FAST_FMA_F32},
78  {{"hawaii"}, {"gfx701"}, GK_GFX701, FEATURE_FAST_FMA_F32},
79  {{"gfx702"}, {"gfx702"}, GK_GFX702, FEATURE_FAST_FMA_F32},
80  {{"gfx703"}, {"gfx703"}, GK_GFX703, FEATURE_NONE},
81  {{"kabini"}, {"gfx703"}, GK_GFX703, FEATURE_NONE},
82  {{"mullins"}, {"gfx703"}, GK_GFX703, FEATURE_NONE},
83  {{"gfx704"}, {"gfx704"}, GK_GFX704, FEATURE_NONE},
84  {{"bonaire"}, {"gfx704"}, GK_GFX704, FEATURE_NONE},
85  {{"gfx705"}, {"gfx705"}, GK_GFX705, FEATURE_NONE},
86  {{"gfx801"}, {"gfx801"}, GK_GFX801, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
87  {{"carrizo"}, {"gfx801"}, GK_GFX801, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
88  {{"gfx802"}, {"gfx802"}, GK_GFX802, FEATURE_FAST_DENORMAL_F32},
89  {{"iceland"}, {"gfx802"}, GK_GFX802, FEATURE_FAST_DENORMAL_F32},
90  {{"tonga"}, {"gfx802"}, GK_GFX802, FEATURE_FAST_DENORMAL_F32},
91  {{"gfx803"}, {"gfx803"}, GK_GFX803, FEATURE_FAST_DENORMAL_F32},
92  {{"fiji"}, {"gfx803"}, GK_GFX803, FEATURE_FAST_DENORMAL_F32},
93  {{"polaris10"}, {"gfx803"}, GK_GFX803, FEATURE_FAST_DENORMAL_F32},
94  {{"polaris11"}, {"gfx803"}, GK_GFX803, FEATURE_FAST_DENORMAL_F32},
95  {{"gfx805"}, {"gfx805"}, GK_GFX805, FEATURE_FAST_DENORMAL_F32},
96  {{"tongapro"}, {"gfx805"}, GK_GFX805, FEATURE_FAST_DENORMAL_F32},
97  {{"gfx810"}, {"gfx810"}, GK_GFX810, FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
98  {{"stoney"}, {"gfx810"}, GK_GFX810, FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
99  {{"gfx900"}, {"gfx900"}, GK_GFX900, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
100  {{"gfx902"}, {"gfx902"}, GK_GFX902, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
101  {{"gfx904"}, {"gfx904"}, GK_GFX904, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
102  {{"gfx906"}, {"gfx906"}, GK_GFX906, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC},
103  {{"gfx908"}, {"gfx908"}, GK_GFX908, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC},
104  {{"gfx909"}, {"gfx909"}, GK_GFX909, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
105  {{"gfx90a"}, {"gfx90a"}, GK_GFX90A, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC},
106  {{"gfx90c"}, {"gfx90c"}, GK_GFX90C, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
107  {{"gfx940"}, {"gfx940"}, GK_GFX940, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC},
108  {{"gfx1010"}, {"gfx1010"}, GK_GFX1010, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
109  {{"gfx1011"}, {"gfx1011"}, GK_GFX1011, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
110  {{"gfx1012"}, {"gfx1012"}, GK_GFX1012, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
111  {{"gfx1013"}, {"gfx1013"}, GK_GFX1013, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
112  {{"gfx1030"}, {"gfx1030"}, GK_GFX1030, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
113  {{"gfx1031"}, {"gfx1031"}, GK_GFX1031, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
114  {{"gfx1032"}, {"gfx1032"}, GK_GFX1032, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
115  {{"gfx1033"}, {"gfx1033"}, GK_GFX1033, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
116  {{"gfx1034"}, {"gfx1034"}, GK_GFX1034, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
117  {{"gfx1035"}, {"gfx1035"}, GK_GFX1035, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
118  {{"gfx1036"}, {"gfx1036"}, GK_GFX1036, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
119  {{"gfx1100"}, {"gfx1100"}, GK_GFX1100, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
120  {{"gfx1101"}, {"gfx1101"}, GK_GFX1101, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
121  {{"gfx1102"}, {"gfx1102"}, GK_GFX1102, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
122  {{"gfx1103"}, {"gfx1103"}, GK_GFX1103, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
123 };
124 
125 const GPUInfo *getArchEntry(AMDGPU::GPUKind AK, ArrayRef<GPUInfo> Table) {
126  GPUInfo Search = { {""}, {""}, AK, AMDGPU::FEATURE_NONE };
127 
128  auto I =
129  llvm::lower_bound(Table, Search, [](const GPUInfo &A, const GPUInfo &B) {
130  return A.Kind < B.Kind;
131  });
132 
133  if (I == Table.end())
134  return nullptr;
135  return I;
136 }
137 
138 } // namespace
139 
140 StringRef llvm::AMDGPU::getArchNameAMDGCN(GPUKind AK) {
141  if (const auto *Entry = getArchEntry(AK, AMDGCNGPUs))
142  return Entry->CanonicalName;
143  return "";
144 }
145 
146 StringRef llvm::AMDGPU::getArchNameR600(GPUKind AK) {
147  if (const auto *Entry = getArchEntry(AK, R600GPUs))
148  return Entry->CanonicalName;
149  return "";
150 }
151 
152 AMDGPU::GPUKind llvm::AMDGPU::parseArchAMDGCN(StringRef CPU) {
153  for (const auto &C : AMDGCNGPUs) {
154  if (CPU == C.Name)
155  return C.Kind;
156  }
157 
158  return AMDGPU::GPUKind::GK_NONE;
159 }
160 
161 AMDGPU::GPUKind llvm::AMDGPU::parseArchR600(StringRef CPU) {
162  for (const auto &C : R600GPUs) {
163  if (CPU == C.Name)
164  return C.Kind;
165  }
166 
167  return AMDGPU::GPUKind::GK_NONE;
168 }
169 
170 unsigned AMDGPU::getArchAttrAMDGCN(GPUKind AK) {
171  if (const auto *Entry = getArchEntry(AK, AMDGCNGPUs))
172  return Entry->Features;
173  return FEATURE_NONE;
174 }
175 
176 unsigned AMDGPU::getArchAttrR600(GPUKind AK) {
177  if (const auto *Entry = getArchEntry(AK, R600GPUs))
178  return Entry->Features;
179  return FEATURE_NONE;
180 }
181 
182 void AMDGPU::fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values) {
183  // XXX: Should this only report unique canonical names?
184  for (const auto &C : AMDGCNGPUs)
185  Values.push_back(C.Name);
186 }
187 
188 void AMDGPU::fillValidArchListR600(SmallVectorImpl<StringRef> &Values) {
189  for (const auto &C : R600GPUs)
190  Values.push_back(C.Name);
191 }
192 
193 AMDGPU::IsaVersion AMDGPU::getIsaVersion(StringRef GPU) {
194  AMDGPU::GPUKind AK = parseArchAMDGCN(GPU);
195  if (AK == AMDGPU::GPUKind::GK_NONE) {
196  if (GPU == "generic-hsa")
197  return {7, 0, 0};
198  if (GPU == "generic")
199  return {6, 0, 0};
200  return {0, 0, 0};
201  }
202 
203  switch (AK) {
204  case GK_GFX600: return {6, 0, 0};
205  case GK_GFX601: return {6, 0, 1};
206  case GK_GFX602: return {6, 0, 2};
207  case GK_GFX700: return {7, 0, 0};
208  case GK_GFX701: return {7, 0, 1};
209  case GK_GFX702: return {7, 0, 2};
210  case GK_GFX703: return {7, 0, 3};
211  case GK_GFX704: return {7, 0, 4};
212  case GK_GFX705: return {7, 0, 5};
213  case GK_GFX801: return {8, 0, 1};
214  case GK_GFX802: return {8, 0, 2};
215  case GK_GFX803: return {8, 0, 3};
216  case GK_GFX805: return {8, 0, 5};
217  case GK_GFX810: return {8, 1, 0};
218  case GK_GFX900: return {9, 0, 0};
219  case GK_GFX902: return {9, 0, 2};
220  case GK_GFX904: return {9, 0, 4};
221  case GK_GFX906: return {9, 0, 6};
222  case GK_GFX908: return {9, 0, 8};
223  case GK_GFX909: return {9, 0, 9};
224  case GK_GFX90A: return {9, 0, 10};
225  case GK_GFX90C: return {9, 0, 12};
226  case GK_GFX940: return {9, 4, 0};
227  case GK_GFX1010: return {10, 1, 0};
228  case GK_GFX1011: return {10, 1, 1};
229  case GK_GFX1012: return {10, 1, 2};
230  case GK_GFX1013: return {10, 1, 3};
231  case GK_GFX1030: return {10, 3, 0};
232  case GK_GFX1031: return {10, 3, 1};
233  case GK_GFX1032: return {10, 3, 2};
234  case GK_GFX1033: return {10, 3, 3};
235  case GK_GFX1034: return {10, 3, 4};
236  case GK_GFX1035: return {10, 3, 5};
237  case GK_GFX1036: return {10, 3, 6};
238  case GK_GFX1100: return {11, 0, 0};
239  case GK_GFX1101: return {11, 0, 1};
240  case GK_GFX1102: return {11, 0, 2};
241  case GK_GFX1103: return {11, 0, 3};
242  default: return {0, 0, 0};
243  }
244 }
245 
246 StringRef AMDGPU::getCanonicalArchName(const Triple &T, StringRef Arch) {
247  assert(T.isAMDGPU());
248  auto ProcKind = T.isAMDGCN() ? parseArchAMDGCN(Arch) : parseArchR600(Arch);
249  if (ProcKind == GK_NONE)
250  return StringRef();
251 
252  return T.isAMDGCN() ? getArchNameAMDGCN(ProcKind) : getArchNameR600(ProcKind);
253 }
254 
255 namespace llvm {
256 namespace RISCV {
257 
258 struct CPUInfo {
259  StringLiteral Name;
260  CPUKind Kind;
261  unsigned Features;
262  StringLiteral DefaultMarch;
263  bool is64Bit() const { return (Features & FK_64BIT); }
264 };
265 
266 constexpr CPUInfo RISCVCPUInfo[] = {
267 #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) \
268  {NAME, CK_##ENUM, FEATURES, DEFAULT_MARCH},
269 #include "llvm/Support/RISCVTargetParser.def"
270 };
271 
272 bool checkCPUKind(CPUKind Kind, bool IsRV64) {
273  if (Kind == CK_INVALID)
274  return false;
275  return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64;
276 }
277 
278 bool checkTuneCPUKind(CPUKind Kind, bool IsRV64) {
279  if (Kind == CK_INVALID)
280  return false;
281  return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64;
282 }
283 
284 CPUKind parseCPUKind(StringRef CPU) {
285  return llvm::StringSwitch<CPUKind>(CPU)
286 #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) .Case(NAME, CK_##ENUM)
287 #include "llvm/Support/RISCVTargetParser.def"
288  .Default(CK_INVALID);
289 }
290 
291 StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64) {
292  return llvm::StringSwitch<StringRef>(TuneCPU)
293 #define PROC_ALIAS(NAME, RV32, RV64) .Case(NAME, IsRV64 ? StringRef(RV64) : StringRef(RV32))
294 #include "llvm/Support/RISCVTargetParser.def"
295  .Default(TuneCPU);
296 }
297 
298 CPUKind parseTuneCPUKind(StringRef TuneCPU, bool IsRV64) {
299  TuneCPU = resolveTuneCPUAlias(TuneCPU, IsRV64);
300 
301  return llvm::StringSwitch<CPUKind>(TuneCPU)
302 #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) .Case(NAME, CK_##ENUM)
303 #include "llvm/Support/RISCVTargetParser.def"
304  .Default(CK_INVALID);
305 }
306 
307 StringRef getMArchFromMcpu(StringRef CPU) {
308  CPUKind Kind = parseCPUKind(CPU);
309  return RISCVCPUInfo[static_cast<unsigned>(Kind)].DefaultMarch;
310 }
311 
312 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) {
313  for (const auto &C : RISCVCPUInfo) {
314  if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit())
315  Values.emplace_back(C.Name);
316  }
317 }
318 
319 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) {
320  for (const auto &C : RISCVCPUInfo) {
321  if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit())
322  Values.emplace_back(C.Name);
323  }
324 #define PROC_ALIAS(NAME, RV32, RV64) Values.emplace_back(StringRef(NAME));
325 #include "llvm/Support/RISCVTargetParser.def"
326 }
327 
328 // Get all features except standard extension feature
329 bool getCPUFeaturesExceptStdExt(CPUKind Kind,
330  std::vector<StringRef> &Features) {
331  unsigned CPUFeatures = RISCVCPUInfo[static_cast<unsigned>(Kind)].Features;
332 
333  if (CPUFeatures == FK_INVALID)
334  return false;
335 
336  if (CPUFeatures & FK_64BIT)
337  Features.push_back("+64bit");
338  else
339  Features.push_back("-64bit");
340 
341  return true;
342 }
343 
344 } // namespace RISCV
345 } // namespace llvm
346 
347 // Parse a branch protection specification, which has the form
348 // standard | none | [bti,pac-ret[+b-key,+leaf]*]
349 // Returns true on success, with individual elements of the specification
350 // returned in `PBP`. Returns false in error, with `Err` containing
351 // an erroneous part of the spec.
352 bool ARM::parseBranchProtection(StringRef Spec, ParsedBranchProtection &PBP,
353  StringRef &Err) {
354  PBP = {"none", "a_key", false};
355  if (Spec == "none")
356  return true; // defaults are ok
357 
358  if (Spec == "standard") {
359  PBP.Scope = "non-leaf";
360  PBP.BranchTargetEnforcement = true;
361  return true;
362  }
363 
364  SmallVector<StringRef, 4> Opts;
365  Spec.split(Opts, "+");
366  for (int I = 0, E = Opts.size(); I != E; ++I) {
367  StringRef Opt = Opts[I].trim();
368  if (Opt == "bti") {
369  PBP.BranchTargetEnforcement = true;
370  continue;
371  }
372  if (Opt == "pac-ret") {
373  PBP.Scope = "non-leaf";
374  for (; I + 1 != E; ++I) {
375  StringRef PACOpt = Opts[I + 1].trim();
376  if (PACOpt == "leaf")
377  PBP.Scope = "all";
378  else if (PACOpt == "b-key")
379  PBP.Key = "b_key";
380  else
381  break;
382  }
383  continue;
384  }
385  if (Opt == "")
386  Err = "<empty>";
387  else
388  Err = Opt;
389  return false;
390  }
391 
392  return true;
393 }
llvm::AMDGPU::GK_GFX802
@ GK_GFX802
Definition: TargetParser.h:76
llvm::AMDGPU::GK_GFX703
@ GK_GFX703
Definition: TargetParser.h:71
llvm::AMDGPU::GK_GFX1034
@ GK_GFX1034
Definition: TargetParser.h:99
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::AMDGPU::GK_GFX801
@ GK_GFX801
Definition: TargetParser.h:75
llvm::AMDGPU::GPUKind
GPUKind
GPU kinds supported by the AMDGPU target.
Definition: TargetParser.h:38
llvm::AMDGPU::GK_CAYMAN
@ GK_CAYMAN
Definition: TargetParser.h:57
llvm::AMDGPU::GK_RV670
@ GK_RV670
Definition: TargetParser.h:46
llvm::AMDGPU::GK_RV730
@ GK_RV730
Definition: TargetParser.h:48
llvm::AMDGPU::getArchAttrR600
unsigned getArchAttrR600(GPUKind AK)
Definition: TargetParser.cpp:176
llvm::AMDGPU::getIsaVersion
IsaVersion getIsaVersion(StringRef GPU)
Definition: TargetParser.cpp:193
llvm::AMDGPU::GK_GFX900
@ GK_GFX900
Definition: TargetParser.h:81
llvm::RISCV::CPUKind
CPUKind
Definition: TargetParser.h:160
llvm::lower_bound
auto lower_bound(R &&Range, T &&Value)
Provide wrappers to std::lower_bound which take ranges instead of having to pass begin/end explicitly...
Definition: STLExtras.h:1736
llvm::StringSwitch::Default
LLVM_NODISCARD R Default(T Value)
Definition: StringSwitch.h:183
is64Bit
static bool is64Bit(const char *name)
Definition: X86Disassembler.cpp:1018
llvm::AMDGPU::GK_R600
@ GK_R600
Definition: TargetParser.h:43
llvm::AMDGPU::parseArchR600
GPUKind parseArchR600(StringRef CPU)
Definition: TargetParser.cpp:161
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1185
llvm::AMDGPU::GK_GFX1013
@ GK_GFX1013
Definition: TargetParser.h:94
llvm::AMDGPU::GK_GFX810
@ GK_GFX810
Definition: TargetParser.h:79
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
llvm::AMDGPU::GK_GFX700
@ GK_GFX700
Definition: TargetParser.h:68
llvm::AMDGPU::GK_GFX803
@ GK_GFX803
Definition: TargetParser.h:77
llvm::RISCV::resolveTuneCPUAlias
StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64)
Definition: TargetParser.cpp:291
llvm::AMDGPU::GK_CEDAR
@ GK_CEDAR
Definition: TargetParser.h:50
llvm::AMDGPU::GK_GFX90C
@ GK_GFX90C
Definition: TargetParser.h:88
T
#define T
Definition: Mips16ISelLowering.cpp:341
llvm::AMDGPU::GK_GFX602
@ GK_GFX602
Definition: TargetParser.h:66
TargetParser.h
llvm::AMDGPU::GK_CAICOS
@ GK_CAICOS
Definition: TargetParser.h:56
llvm::AMDGPU::GK_RV770
@ GK_RV770
Definition: TargetParser.h:49
llvm::AMDGPU::GK_RS880
@ GK_RS880
Definition: TargetParser.h:45
llvm::AMDGPU::GK_GFX702
@ GK_GFX702
Definition: TargetParser.h:70
llvm::AMDGPU::IsaVersion
Instruction set architecture version.
Definition: TargetParser.h:113
llvm::AMDGPU::getCanonicalArchName
StringRef getCanonicalArchName(const Triple &T, StringRef Arch)
Definition: TargetParser.cpp:246
llvm::RISCV::checkTuneCPUKind
bool checkTuneCPUKind(CPUKind Kind, bool IsRV64)
Definition: TargetParser.cpp:278
llvm::StringLiteral
A wrapper around a string literal that serves as a proxy for constructing global tables of StringRefs...
Definition: StringRef.h:914
llvm::AMDGPU::GK_GFX1100
@ GK_GFX1100
Definition: TargetParser.h:103
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::StringRef::split
LLVM_NODISCARD std::pair< StringRef, StringRef > split(char Separator) const
Split into two substrings around the first occurrence of a separator character.
Definition: StringRef.h:753
llvm::AMDGPU::GK_CYPRESS
@ GK_CYPRESS
Definition: TargetParser.h:51
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::AMDGPU::GK_GFX1012
@ GK_GFX1012
Definition: TargetParser.h:93
llvm::ARM_PROC::A
@ A
Definition: ARMBaseInfo.h:34
llvm::AMDGPU::GK_GFX1036
@ GK_GFX1036
Definition: TargetParser.h:101
llvm::AMDGPU::GK_GFX1032
@ GK_GFX1032
Definition: TargetParser.h:97
llvm::RISCV::getMArchFromMcpu
StringRef getMArchFromMcpu(StringRef CPU)
Definition: TargetParser.cpp:307
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
AMDGPU
Definition: AMDGPUReplaceLDSUseWithPointer.cpp:114
llvm::AMDGPU::FEATURE_XNACK
@ FEATURE_XNACK
Definition: TargetParser.h:137
llvm::AMDGPU::GK_GFX1102
@ GK_GFX1102
Definition: TargetParser.h:105
llvm::AMDGPU::GK_GFX909
@ GK_GFX909
Definition: TargetParser.h:86
llvm::AMDGPU::GK_GFX805
@ GK_GFX805
Definition: TargetParser.h:78
llvm::AMDGPU::GK_GFX906
@ GK_GFX906
Definition: TargetParser.h:84
llvm::ARM::ParsedBranchProtection::Scope
StringRef Scope
Definition: TargetParser.h:185
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
llvm::AMDGPU::GK_GFX940
@ GK_GFX940
Definition: TargetParser.h:89
llvm::AMDGPU::GK_BARTS
@ GK_BARTS
Definition: TargetParser.h:55
llvm::RISCV::CPUInfo::DefaultMarch
StringLiteral DefaultMarch
Definition: TargetParser.cpp:262
llvm::AMDGPU::FEATURE_FMA
@ FEATURE_FMA
Definition: TargetParser.h:125
llvm::RISCV::parseCPUKind
CPUKind parseCPUKind(StringRef CPU)
Definition: TargetParser.cpp:284
llvm::AMDGPU::FEATURE_WAVE32
@ FEATURE_WAVE32
Definition: TargetParser.h:134
llvm::AMDGPU::GK_GFX1035
@ GK_GFX1035
Definition: TargetParser.h:100
llvm::AMDGPU::GK_GFX904
@ GK_GFX904
Definition: TargetParser.h:83
llvm::AMDGPU::GK_GFX704
@ GK_GFX704
Definition: TargetParser.h:72
llvm::RISCV::CPUInfo::Name
StringLiteral Name
Definition: TargetParser.cpp:259
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::RISCV::RISCVCPUInfo
constexpr CPUInfo RISCVCPUInfo[]
Definition: TargetParser.cpp:266
llvm::AMDGPU::GK_GFX701
@ GK_GFX701
Definition: TargetParser.h:69
ArrayRef.h
llvm::AMDGPU::GK_TURKS
@ GK_TURKS
Definition: TargetParser.h:58
llvm::AMDGPU::getArchNameAMDGCN
StringRef getArchNameAMDGCN(GPUKind AK)
Definition: TargetParser.cpp:140
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::ARM::parseBranchProtection
bool parseBranchProtection(StringRef Spec, ParsedBranchProtection &PBP, StringRef &Err)
Definition: TargetParser.cpp:352
llvm::AMDGPU::GK_GFX705
@ GK_GFX705
Definition: TargetParser.h:73
llvm::AArch64::fillValidCPUArchList
void fillValidCPUArchList(SmallVectorImpl< StringRef > &Values)
Definition: AArch64TargetParser.cpp:165
llvm::AMDGPU::FEATURE_SRAMECC
@ FEATURE_SRAMECC
Definition: TargetParser.h:140
Triple.h
llvm::AMDGPU::GK_GFX1030
@ GK_GFX1030
Definition: TargetParser.h:95
llvm::RISCV::CPUInfo
Definition: TargetParser.cpp:258
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::AMDGPU::GK_GFX908
@ GK_GFX908
Definition: TargetParser.h:85
llvm::AMDGPU::FEATURE_FAST_FMA_F32
@ FEATURE_FAST_FMA_F32
Definition: TargetParser.h:130
llvm::RISCV::CPUInfo::is64Bit
bool is64Bit() const
Definition: TargetParser.cpp:263
llvm::AMDGPU::getArchNameR600
StringRef getArchNameR600(GPUKind AK)
Definition: TargetParser.cpp:146
llvm::AMDGPU::GK_GFX1103
@ GK_GFX1103
Definition: TargetParser.h:106
llvm::AMDGPU::fillValidArchListR600
void fillValidArchListR600(SmallVectorImpl< StringRef > &Values)
Definition: TargetParser.cpp:188
llvm::AMDGPU::GK_R630
@ GK_R630
Definition: TargetParser.h:44
llvm::RISCV::fillValidTuneCPUArchList
void fillValidTuneCPUArchList(SmallVectorImpl< StringRef > &Values, bool IsRV64)
Definition: TargetParser.cpp:319
llvm::AMDGPU::GK_GFX1031
@ GK_GFX1031
Definition: TargetParser.h:96
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:50
llvm::AMDGPU::FEATURE_NONE
@ FEATURE_NONE
Definition: TargetParser.h:122
llvm::RISCV::FK_64BIT
@ FK_64BIT
Definition: TargetParser.h:168
llvm::AMDGPU::GK_GFX1010
@ GK_GFX1010
Definition: TargetParser.h:91
llvm::AMDGPU::GK_GFX1101
@ GK_GFX1101
Definition: TargetParser.h:104
llvm::ARM::ParsedBranchProtection::Key
StringRef Key
Definition: TargetParser.h:186
llvm::RISCV::FK_INVALID
@ FK_INVALID
Definition: TargetParser.h:166
llvm::RISCV::CPUInfo::Features
unsigned Features
Definition: TargetParser.cpp:261
llvm::AMDGPU::GK_JUNIPER
@ GK_JUNIPER
Definition: TargetParser.h:52
StringSwitch.h
llvm::AMDGPU::GK_GFX1011
@ GK_GFX1011
Definition: TargetParser.h:92
llvm::AMDGPU::GK_RV710
@ GK_RV710
Definition: TargetParser.h:47
llvm::AMDGPU::GK_GFX600
@ GK_GFX600
Definition: TargetParser.h:64
llvm::AMDGPU::parseArchAMDGCN
GPUKind parseArchAMDGCN(StringRef CPU)
Definition: TargetParser.cpp:152
llvm::AMDGPU::getArchAttrAMDGCN
unsigned getArchAttrAMDGCN(GPUKind AK)
Definition: TargetParser.cpp:170
llvm::ARM::ParsedBranchProtection
Definition: TargetParser.h:184
llvm::RISCV::checkCPUKind
bool checkCPUKind(CPUKind Kind, bool IsRV64)
Definition: TargetParser.cpp:272
llvm::AMDGPU::GK_REDWOOD
@ GK_REDWOOD
Definition: TargetParser.h:53
llvm::AMDGPU::GK_NONE
@ GK_NONE
Definition: TargetParser.h:40
llvm::AMDGPU::GK_GFX902
@ GK_GFX902
Definition: TargetParser.h:82
llvm::RISCV::CPUInfo::Kind
CPUKind Kind
Definition: TargetParser.cpp:260
llvm::AMDGPU::GK_SUMO
@ GK_SUMO
Definition: TargetParser.h:54
llvm::SmallVectorImpl< StringRef >
llvm::StringSwitch
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:44
llvm::AMDGPU::GK_GFX601
@ GK_GFX601
Definition: TargetParser.h:65
llvm::AMDGPU::FEATURE_FAST_DENORMAL_F32
@ FEATURE_FAST_DENORMAL_F32
Definition: TargetParser.h:131
llvm::AMDGPU::GK_GFX1033
@ GK_GFX1033
Definition: TargetParser.h:98
llvm::ARM::ParsedBranchProtection::BranchTargetEnforcement
bool BranchTargetEnforcement
Definition: TargetParser.h:187
llvm::RISCV::getCPUFeaturesExceptStdExt
bool getCPUFeaturesExceptStdExt(CPUKind Kind, std::vector< StringRef > &Features)
Definition: TargetParser.cpp:329
llvm::AMDGPU::GK_GFX90A
@ GK_GFX90A
Definition: TargetParser.h:87
llvm::ArrayRef::end
iterator end() const
Definition: ArrayRef.h:153
llvm::AMDGPU::fillValidArchListAMDGCN
void fillValidArchListAMDGCN(SmallVectorImpl< StringRef > &Values)
Definition: TargetParser.cpp:182
llvm::RISCV::parseTuneCPUKind
CPUKind parseTuneCPUKind(StringRef CPU, bool IsRV64)
Definition: TargetParser.cpp:298
llvm::SmallVectorImpl::emplace_back
reference emplace_back(ArgTypes &&... Args)
Definition: SmallVector.h:927
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