LLVM 18.0.0git
VPlanTransforms.h
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1//===- VPlanTransforms.h - Utility VPlan to VPlan transforms --------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file provides utility VPlan to VPlan transformations.
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H
14#define LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H
15
16#include "VPlan.h"
18
19namespace llvm {
20
21class InductionDescriptor;
22class Instruction;
23class PHINode;
24class ScalarEvolution;
25class Loop;
26class PredicatedScalarEvolution;
27class TargetLibraryInfo;
28class VPBuilder;
29class VPRecipeBuilder;
30
32 /// Replaces the VPInstructions in \p Plan with corresponding
33 /// widen recipes.
34 static void
37 GetIntOrFpInductionDescriptor,
38 ScalarEvolution &SE, const TargetLibraryInfo &TLI);
39
40 /// Sink users of fixed-order recurrences after the recipe defining their
41 /// previous value. Then introduce FirstOrderRecurrenceSplice VPInstructions
42 /// to combine the value from the recurrence phis and previous values. The
43 /// current implementation assumes all users can be sunk after the previous
44 /// value, which is enforced by earlier legality checks.
45 /// \returns true if all users of fixed-order recurrences could be re-arranged
46 /// as needed or false if it is not possible. In the latter case, \p Plan is
47 /// not valid.
48 static bool adjustFixedOrderRecurrences(VPlan &Plan, VPBuilder &Builder);
49
50 /// Clear NSW/NUW flags from reduction instructions if necessary.
51 static void clearReductionWrapFlags(VPlan &Plan);
52
53 /// Optimize \p Plan based on \p BestVF and \p BestUF. This may restrict the
54 /// resulting plan to \p BestVF and \p BestUF.
55 static void optimizeForVFAndUF(VPlan &Plan, ElementCount BestVF,
56 unsigned BestUF,
58
59 /// Apply VPlan-to-VPlan optimizations to \p Plan, including induction recipe
60 /// optimizations, dead recipe removal, replicate region optimizations and
61 /// block merging.
62 static void optimize(VPlan &Plan, ScalarEvolution &SE);
63
64 /// Wrap predicated VPReplicateRecipes with a mask operand in an if-then
65 /// region block and remove the mask operand. Optimize the created regions by
66 /// iteratively sinking scalar operands into the region, followed by merging
67 /// regions until no improvements are remaining.
69
70 /// Replace (ICMP_ULE, wide canonical IV, backedge-taken-count) checks with an
71 /// (active-lane-mask recipe, wide canonical IV, trip-count). If \p
72 /// UseActiveLaneMaskForControlFlow is true, introduce an
73 /// VPActiveLaneMaskPHIRecipe. If \p DataAndControlFlowWithoutRuntimeCheck is
74 /// true, no minimum-iteration runtime check will be created (during skeleton
75 /// creation) and instead it is handled using active-lane-mask. \p
76 /// DataAndControlFlowWithoutRuntimeCheck implies \p
77 /// UseActiveLaneMaskForControlFlow.
78 static void addActiveLaneMask(VPlan &Plan,
79 bool UseActiveLaneMaskForControlFlow,
81
82 /// Insert truncates and extends for any truncated recipe. Redundant casts
83 /// will be folded later.
84 static void
87 LLVMContext &Ctx);
88
89private:
90 /// Remove redundant VPBasicBlocks by merging them into their predecessor if
91 /// the predecessor has a single successor.
92 static bool mergeBlocksIntoPredecessors(VPlan &Plan);
93
94 /// Remove redundant casts of inductions.
95 ///
96 /// Such redundant casts are casts of induction variables that can be ignored,
97 /// because we already proved that the casted phi is equal to the uncasted phi
98 /// in the vectorized loop. There is no need to vectorize the cast - the same
99 /// value can be used for both the phi and casts in the vector loop.
100 static void removeRedundantInductionCasts(VPlan &Plan);
101
102 /// Try to replace VPWidenCanonicalIVRecipes with a widened canonical IV
103 /// recipe, if it exists.
104 static void removeRedundantCanonicalIVs(VPlan &Plan);
105
106 static void removeDeadRecipes(VPlan &Plan);
107
108 /// If any user of a VPWidenIntOrFpInductionRecipe needs scalar values,
109 /// provide them by building scalar steps off of the canonical scalar IV and
110 /// update the original IV's users. This is an optional optimization to reduce
111 /// the needs of vector extracts.
112 static void optimizeInductions(VPlan &Plan, ScalarEvolution &SE);
113
114 /// Remove redundant EpxandSCEVRecipes in \p Plan's entry block by replacing
115 /// them with already existing recipes expanding the same SCEV expression.
116 static void removeRedundantExpandSCEVRecipes(VPlan &Plan);
117
118};
119
120} // namespace llvm
121
122#endif // LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H
This file contains the declarations of the Vectorization Plan base classes:
A struct for saving information about induction variables.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
This class implements a map that also provides access to all stored values in a deterministic order.
Definition: MapVector.h:36
An interface layer with SCEV used to manage how we see SCEV expressions for values in the context of ...
The main scalar evolution driver.
Provides information about what library functions are available for the current target.
VPlan-based builder utility analogous to IRBuilder.
VPlan models a candidate for vectorization, encoding various decisions take to produce efficient outp...
Definition: VPlan.h:2533
An efficient, type-erasing, non-owning reference to a callable.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
std::unique_ptr< VPlan > VPlanPtr
Definition: VPlan.h:132
@ DataAndControlFlowWithoutRuntimeCheck
Use predicate to control both data and control flow, but modify the trip count so that a runtime over...
static void createAndOptimizeReplicateRegions(VPlan &Plan)
Wrap predicated VPReplicateRecipes with a mask operand in an if-then region block and remove the mask...
static void optimize(VPlan &Plan, ScalarEvolution &SE)
Apply VPlan-to-VPlan optimizations to Plan, including induction recipe optimizations,...
static void clearReductionWrapFlags(VPlan &Plan)
Clear NSW/NUW flags from reduction instructions if necessary.
static void VPInstructionsToVPRecipes(VPlanPtr &Plan, function_ref< const InductionDescriptor *(PHINode *)> GetIntOrFpInductionDescriptor, ScalarEvolution &SE, const TargetLibraryInfo &TLI)
Replaces the VPInstructions in Plan with corresponding widen recipes.
static void truncateToMinimalBitwidths(VPlan &Plan, const MapVector< Instruction *, uint64_t > &MinBWs, LLVMContext &Ctx)
Insert truncates and extends for any truncated recipe.
static void addActiveLaneMask(VPlan &Plan, bool UseActiveLaneMaskForControlFlow, bool DataAndControlFlowWithoutRuntimeCheck)
Replace (ICMP_ULE, wide canonical IV, backedge-taken-count) checks with an (active-lane-mask recipe,...
static bool adjustFixedOrderRecurrences(VPlan &Plan, VPBuilder &Builder)
Sink users of fixed-order recurrences after the recipe defining their previous value.
static void optimizeForVFAndUF(VPlan &Plan, ElementCount BestVF, unsigned BestUF, PredicatedScalarEvolution &PSE)
Optimize Plan based on BestVF and BestUF.