AArch64BaseInfo.h File Reference

#include "MCTargetDesc/AArch64MCTargetDesc.h"
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include "AArch64GenSystemOperands.inc"

Go to the source code of this file.

Classes
struct	llvm::SysAlias
struct	llvm::SysAliasReg
struct	llvm::SysAliasImm
struct	llvm::AArch64SVCR::SVCR
struct	llvm::AArch64AT::AT
struct	llvm::AArch64DB::DB
struct	llvm::AArch64DBnXS::DBnXS
struct	llvm::AArch64DC::DC
struct	llvm::AArch64IC::IC
struct	llvm::AArch64ISB::ISB
struct	llvm::AArch64TSB::TSB
struct	llvm::AArch64PRFM::PRFM
struct	llvm::AArch64SVEPRFM::SVEPRFM
struct	llvm::AArch64RPRFM::RPRFM
struct	llvm::AArch64SVEPredPattern::SVEPREDPAT
struct	llvm::AArch64SVEVecLenSpecifier::SVEVECLENSPECIFIER
struct	llvm::AArch64ExactFPImm::ExactFPImm
struct	llvm::AArch64PState::PStateImm0_15
struct	llvm::AArch64PState::PStateImm0_1
struct	llvm::AArch64PSBHint::PSB
struct	llvm::AArch64PHint::PHint
struct	llvm::AArch64BTIHint::BTI
struct	llvm::AArch64SysReg::SysReg
struct	llvm::AArch64TLBI::TLBI
struct	llvm::AArch64PRCTX::PRCTX

Namespaces
namespace	llvm
	This is an optimization pass for GlobalISel generic memory operations.
namespace	llvm::AArch64CC
namespace	llvm::AArch64SVCR
namespace	llvm::AArch64AT
namespace	llvm::AArch64DB
namespace	llvm::AArch64DBnXS
namespace	llvm::AArch64DC
namespace	llvm::AArch64IC
namespace	llvm::AArch64ISB
namespace	llvm::AArch64TSB
namespace	llvm::AArch64PRFM
namespace	llvm::AArch64SVEPRFM
namespace	llvm::AArch64RPRFM
namespace	llvm::AArch64SVEPredPattern
namespace	llvm::AArch64SVEVecLenSpecifier
namespace	llvm::AArch64ExactFPImm
namespace	llvm::AArch64PState
namespace	llvm::AArch64PSBHint
namespace	llvm::AArch64PHint
namespace	llvm::AArch64BTIHint
namespace	llvm::AArch64SME
namespace	llvm::AArch64SE
namespace	llvm::AArch64Layout
namespace	llvm::AArch64SysReg
namespace	llvm::AArch64TLBI
namespace	llvm::AArch64PRCTX
namespace	llvm::AArch64II
namespace	llvm::AArch64PACKey
namespace	llvm::AArch64

Macros
#define	GET_SVCR_DECL
#define	GET_AT_DECL
#define	GET_DB_DECL
#define	GET_DBNXS_DECL
#define	GET_DC_DECL
#define	GET_IC_DECL
#define	GET_ISB_DECL
#define	GET_TSB_DECL
#define	GET_PRFM_DECL
#define	GET_SVEPRFM_DECL
#define	GET_RPRFM_DECL
#define	GET_SVEPREDPAT_DECL
#define	GET_SVEVECLENSPECIFIER_DECL
#define	GET_EXACTFPIMM_DECL
#define	GET_PSTATEIMM0_15_DECL
#define	GET_PSTATEIMM0_1_DECL
#define	GET_PSB_DECL
#define	GET_PHINT_DECL
#define	GET_BTI_DECL
#define	GET_SYSREG_DECL
#define	GET_TLBITable_DECL
#define	GET_PRCTX_DECL

Enumerations
enum	llvm::AArch64CC::CondCode {   llvm::AArch64CC::EQ = 0x0 , llvm::AArch64CC::NE = 0x1 , llvm::AArch64CC::HS = 0x2 , llvm::AArch64CC::LO = 0x3 ,   llvm::AArch64CC::MI = 0x4 , llvm::AArch64CC::PL = 0x5 , llvm::AArch64CC::VS = 0x6 , llvm::AArch64CC::VC = 0x7 ,   llvm::AArch64CC::HI = 0x8 , llvm::AArch64CC::LS = 0x9 , llvm::AArch64CC::GE = 0xa , llvm::AArch64CC::LT = 0xb ,   llvm::AArch64CC::GT = 0xc , llvm::AArch64CC::LE = 0xd , llvm::AArch64CC::AL = 0xe , llvm::AArch64CC::NV = 0xf ,   llvm::AArch64CC::Invalid , llvm::AArch64CC::ANY_ACTIVE = NE , llvm::AArch64CC::FIRST_ACTIVE = MI , llvm::AArch64CC::LAST_ACTIVE = LO ,   llvm::AArch64CC::NONE_ACTIVE = EQ }
enum class	llvm::TailFoldingOpts : uint8_t {   llvm::Disabled = 0x00 , llvm::Simple = 0x01 , llvm::Reductions = 0x02 , llvm::Recurrences = 0x04 ,   llvm::Reverse = 0x08 , llvm::All = Reductions | Recurrences | Simple | Reverse }
	An enum to describe what types of loops we should attempt to tail-fold: Disabled: None Reductions: Loops containing reductions Recurrences: Loops with first-order recurrences, i.e. More...
enum	llvm::AArch64SME::ToggleCondition : unsigned { llvm::AArch64SME::Always , llvm::AArch64SME::IfCallerIsStreaming , llvm::AArch64SME::IfCallerIsNonStreaming }
enum	llvm::AArch64SE::ShiftExtSpecifiers {   llvm::AArch64SE::Invalid = -1 , llvm::AArch64SE::LSL , llvm::AArch64SE::MSL , llvm::AArch64SE::LSR ,   llvm::AArch64SE::ASR , llvm::AArch64SE::ROR , llvm::AArch64SE::UXTB , llvm::AArch64SE::UXTH ,   llvm::AArch64SE::UXTW , llvm::AArch64SE::UXTX , llvm::AArch64SE::SXTB , llvm::AArch64SE::SXTH ,   llvm::AArch64SE::SXTW , llvm::AArch64SE::SXTX }
enum	llvm::AArch64Layout::VectorLayout {   llvm::AArch64Layout::Invalid = -1 , llvm::AArch64Layout::VL_8B , llvm::AArch64Layout::VL_4H , llvm::AArch64Layout::VL_2S ,   llvm::AArch64Layout::VL_1D , llvm::AArch64Layout::VL_16B , llvm::AArch64Layout::VL_8H , llvm::AArch64Layout::VL_4S ,   llvm::AArch64Layout::VL_2D , llvm::AArch64Layout::VL_B , llvm::AArch64Layout::VL_H , llvm::AArch64Layout::VL_S ,   llvm::AArch64Layout::VL_D }
enum	llvm::AArch64II::TOF {   llvm::AArch64II::MO_NO_FLAG , llvm::AArch64II::MO_FRAGMENT = 0x7 , llvm::AArch64II::MO_PAGE = 1 , llvm::AArch64II::MO_PAGEOFF = 2 ,   llvm::AArch64II::MO_G3 = 3 , llvm::AArch64II::MO_G2 = 4 , llvm::AArch64II::MO_G1 = 5 , llvm::AArch64II::MO_G0 = 6 ,   llvm::AArch64II::MO_HI12 = 7 , llvm::AArch64II::MO_COFFSTUB = 0x8 , llvm::AArch64II::MO_GOT = 0x10 , llvm::AArch64II::MO_NC = 0x20 ,   llvm::AArch64II::MO_TLS = 0x40 , llvm::AArch64II::MO_DLLIMPORT = 0x80 , llvm::AArch64II::MO_S = 0x100 , llvm::AArch64II::MO_PREL = 0x200 ,   llvm::AArch64II::MO_TAGGED = 0x400 , llvm::AArch64II::MO_ARM64EC_CALLMANGLE = 0x800 }
	Target Operand Flag enum. More...
enum	llvm::AArch64PACKey::ID : uint8_t {   llvm::AArch64PACKey::IA = 0 , llvm::AArch64PACKey::IB = 1 , llvm::AArch64PACKey::DA = 2 , llvm::AArch64PACKey::DB = 3 ,   llvm::AArch64PACKey::LAST = DB }

Functions
static MCRegister	llvm::getWRegFromXReg (MCRegister Reg)
static MCRegister	llvm::getXRegFromWReg (MCRegister Reg)
static MCRegister	llvm::getXRegFromXRegTuple (MCRegister RegTuple)
static MCRegister	llvm::getBRegFromDReg (MCRegister Reg)
static MCRegister	llvm::getDRegFromBReg (MCRegister Reg)
static bool	llvm::atomicBarrierDroppedOnZero (unsigned Opcode)
static const char *	llvm::AArch64CC::getCondCodeName (CondCode Code)
static CondCode	llvm::AArch64CC::getInvertedCondCode (CondCode Code)
static unsigned	llvm::AArch64CC::getNZCVToSatisfyCondCode (CondCode Code)
	Given a condition code, return NZCV flags that would satisfy that condition.
unsigned	llvm::getNumElementsFromSVEPredPattern (unsigned Pattern)
	Return the number of active elements for VL1 to VL256 predicate pattern, zero for all other patterns.
std::optional< unsigned >	llvm::getSVEPredPatternFromNumElements (unsigned MinNumElts)
	Return specific VL predicate pattern based on the number of elements.
	llvm::LLVM_DECLARE_ENUM_AS_BITMASK (TailFoldingOpts,(long) TailFoldingOpts::Reverse)
const PHint *	llvm::AArch64PHint::lookupPHintByName (StringRef)
const PHint *	llvm::AArch64PHint::lookupPHintByEncoding (uint16_t)
static const char *	llvm::AArch64VectorLayoutToString (AArch64Layout::VectorLayout Layout)
static AArch64Layout::VectorLayout	llvm::AArch64StringToVectorLayout (StringRef LayoutStr)
const SysReg *	llvm::AArch64SysReg::lookupSysRegByName (StringRef)
const SysReg *	llvm::AArch64SysReg::lookupSysRegByEncoding (uint16_t)
uint32_t	llvm::AArch64SysReg::parseGenericRegister (StringRef Name)
std::string	llvm::AArch64SysReg::genericRegisterString (uint32_t Bits)
static StringRef	llvm::AArch64PACKeyIDToString (AArch64PACKey::ID KeyID)
	Return 2-letter identifier string for numeric key ID.
static std::optional< AArch64PACKey::ID >	llvm::AArch64StringToPACKeyID (StringRef Name)
	Return numeric key ID for 2-letter identifier string.

Variables
static constexpr unsigned	llvm::AArch64::SVEBitsPerBlock = 128
static constexpr unsigned	llvm::AArch64::SVEMaxBitsPerVector = 2048

Macro Definition Documentation

GET_AT_DECL

#define GET_AT_DECL

Definition at line 382 of file AArch64BaseInfo.h.

GET_BTI_DECL

#define GET_BTI_DECL

Definition at line 609 of file AArch64BaseInfo.h.

GET_DB_DECL

#define GET_DB_DECL

Definition at line 390 of file AArch64BaseInfo.h.

GET_DBNXS_DECL

#define GET_DBNXS_DECL

Definition at line 398 of file AArch64BaseInfo.h.

GET_DC_DECL

#define GET_DC_DECL

Definition at line 406 of file AArch64BaseInfo.h.

GET_EXACTFPIMM_DECL

#define GET_EXACTFPIMM_DECL

Definition at line 559 of file AArch64BaseInfo.h.

GET_IC_DECL

#define GET_IC_DECL

Definition at line 414 of file AArch64BaseInfo.h.

GET_ISB_DECL

#define GET_ISB_DECL

Definition at line 422 of file AArch64BaseInfo.h.

GET_PHINT_DECL

#define GET_PHINT_DECL

Definition at line 598 of file AArch64BaseInfo.h.

GET_PRCTX_DECL

#define GET_PRCTX_DECL

Definition at line 738 of file AArch64BaseInfo.h.

GET_PRFM_DECL

#define GET_PRFM_DECL

Definition at line 438 of file AArch64BaseInfo.h.

GET_PSB_DECL

#define GET_PSB_DECL

Definition at line 581 of file AArch64BaseInfo.h.

GET_PSTATEIMM0_15_DECL

#define GET_PSTATEIMM0_15_DECL

Definition at line 567 of file AArch64BaseInfo.h.

GET_PSTATEIMM0_1_DECL

#define GET_PSTATEIMM0_1_DECL

Definition at line 573 of file AArch64BaseInfo.h.

GET_RPRFM_DECL

#define GET_RPRFM_DECL

Definition at line 454 of file AArch64BaseInfo.h.

GET_SVCR_DECL

#define GET_SVCR_DECL

Definition at line 374 of file AArch64BaseInfo.h.

GET_SVEPREDPAT_DECL

#define GET_SVEPREDPAT_DECL

Definition at line 463 of file AArch64BaseInfo.h.

GET_SVEPRFM_DECL

#define GET_SVEPRFM_DECL

Definition at line 446 of file AArch64BaseInfo.h.

GET_SVEVECLENSPECIFIER_DECL

#define GET_SVEVECLENSPECIFIER_DECL

Definition at line 472 of file AArch64BaseInfo.h.

GET_SYSREG_DECL

#define GET_SYSREG_DECL

Definition at line 716 of file AArch64BaseInfo.h.

GET_TLBITable_DECL

#define GET_TLBITable_DECL

Definition at line 730 of file AArch64BaseInfo.h.

GET_TSB_DECL

#define GET_TSB_DECL

Definition at line 430 of file AArch64BaseInfo.h.