LLVM  15.0.0git
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AArch64BaseInfo.h File Reference
#include "MCTargetDesc/AArch64MCTargetDesc.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/MC/SubtargetFeature.h"
#include "llvm/Support/ErrorHandling.h"
#include "AArch64GenSystemOperands.inc"
Include dependency graph for AArch64BaseInfo.h:
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Go to the source code of this file.


struct  llvm::SysAlias
struct  llvm::SysAliasReg
struct  llvm::SysAliasImm
struct  llvm::AArch64SVCR::SVCR
struct  llvm::AArch64AT::AT
struct  llvm::AArch64DB::DB
struct  llvm::AArch64DBnXS::DBnXS
struct  llvm::AArch64DC::DC
struct  llvm::AArch64IC::IC
struct  llvm::AArch64ISB::ISB
struct  llvm::AArch64TSB::TSB
struct  llvm::AArch64PRFM::PRFM
struct  llvm::AArch64SVEPRFM::SVEPRFM
struct  llvm::AArch64SVEPredPattern::SVEPREDPAT
struct  llvm::AArch64ExactFPImm::ExactFPImm
struct  llvm::AArch64PState::PState
struct  llvm::AArch64PSBHint::PSB
struct  llvm::AArch64BTIHint::BTI
struct  llvm::AArch64SysReg::SysReg
struct  llvm::AArch64TLBI::TLBI
struct  llvm::AArch64PRCTX::PRCTX


 This is an optimization pass for GlobalISel generic memory operations.


#define GET_AT_DECL
#define GET_DB_DECL
#define GET_DC_DECL
#define GET_IC_DECL
#define GET_ISB_DECL
#define GET_TSB_DECL
#define GET_PSB_DECL
#define GET_BTI_DECL
#define GET_TLBITable_DECL


enum  llvm::AArch64CC::CondCode {
  llvm::AArch64CC::EQ = 0x0, llvm::AArch64CC::NE = 0x1, llvm::AArch64CC::HS = 0x2, llvm::AArch64CC::LO = 0x3,
  llvm::AArch64CC::MI = 0x4, llvm::AArch64CC::PL = 0x5, llvm::AArch64CC::VS = 0x6, llvm::AArch64CC::VC = 0x7,
  llvm::AArch64CC::HI = 0x8, llvm::AArch64CC::LS = 0x9, llvm::AArch64CC::GE = 0xa, llvm::AArch64CC::LT = 0xb,
  llvm::AArch64CC::GT = 0xc, llvm::AArch64CC::LE = 0xd, llvm::AArch64CC::AL = 0xe, llvm::AArch64CC::NV = 0xf,
  llvm::AArch64CC::Invalid, llvm::AArch64CC::ANY_ACTIVE = NE, llvm::AArch64CC::FIRST_ACTIVE = MI, llvm::AArch64CC::LAST_ACTIVE = LO,
  llvm::AArch64CC::NONE_ACTIVE = EQ
enum  llvm::AArch64SE::ShiftExtSpecifiers {
  llvm::AArch64SE::Invalid = -1, llvm::AArch64SE::LSL, llvm::AArch64SE::MSL, llvm::AArch64SE::LSR,
  llvm::AArch64SE::ASR, llvm::AArch64SE::ROR, llvm::AArch64SE::UXTB, llvm::AArch64SE::UXTH,
  llvm::AArch64SE::UXTW, llvm::AArch64SE::UXTX, llvm::AArch64SE::SXTB, llvm::AArch64SE::SXTH,
  llvm::AArch64SE::SXTW, llvm::AArch64SE::SXTX
enum  llvm::AArch64Layout::VectorLayout {
  llvm::AArch64Layout::Invalid = -1, llvm::AArch64Layout::VL_8B, llvm::AArch64Layout::VL_4H, llvm::AArch64Layout::VL_2S,
  llvm::AArch64Layout::VL_1D, llvm::AArch64Layout::VL_16B, llvm::AArch64Layout::VL_8H, llvm::AArch64Layout::VL_4S,
  llvm::AArch64Layout::VL_2D, llvm::AArch64Layout::VL_B, llvm::AArch64Layout::VL_H, llvm::AArch64Layout::VL_S,
enum  llvm::AArch64II::TOF {
  llvm::AArch64II::MO_NO_FLAG, llvm::AArch64II::MO_FRAGMENT = 0x7, llvm::AArch64II::MO_PAGE = 1, llvm::AArch64II::MO_PAGEOFF = 2,
  llvm::AArch64II::MO_G3 = 3, llvm::AArch64II::MO_G2 = 4, llvm::AArch64II::MO_G1 = 5, llvm::AArch64II::MO_G0 = 6,
  llvm::AArch64II::MO_HI12 = 7, llvm::AArch64II::MO_COFFSTUB = 0x8, llvm::AArch64II::MO_GOT = 0x10, llvm::AArch64II::MO_NC = 0x20,
  llvm::AArch64II::MO_TLS = 0x40, llvm::AArch64II::MO_DLLIMPORT = 0x80, llvm::AArch64II::MO_S = 0x100, llvm::AArch64II::MO_PREL = 0x200,
  llvm::AArch64II::MO_TAGGED = 0x400
 Target Operand Flag enum. More...


static unsigned llvm::getWRegFromXReg (unsigned Reg)
static unsigned llvm::getXRegFromWReg (unsigned Reg)
static unsigned llvm::getXRegFromXRegTuple (unsigned RegTuple)
static unsigned llvm::getBRegFromDReg (unsigned Reg)
static unsigned llvm::getDRegFromBReg (unsigned Reg)
static bool llvm::atomicBarrierDroppedOnZero (unsigned Opcode)
static const char * llvm::AArch64CC::getCondCodeName (CondCode Code)
static CondCode llvm::AArch64CC::getInvertedCondCode (CondCode Code)
static unsigned llvm::AArch64CC::getNZCVToSatisfyCondCode (CondCode Code)
 Given a condition code, return NZCV flags that would satisfy that condition. More...
unsigned llvm::getNumElementsFromSVEPredPattern (unsigned Pattern)
 Return the number of active elements for VL1 to VL256 predicate pattern, zero for all other patterns. More...
Optional< unsigned > llvm::getSVEPredPatternFromNumElements (unsigned MinNumElts)
 Return specific VL predicate pattern based on the number of elements. More...
static const char * llvm::AArch64VectorLayoutToString (AArch64Layout::VectorLayout Layout)
static AArch64Layout::VectorLayout llvm::AArch64StringToVectorLayout (StringRef LayoutStr)
const SysReg * llvm::AArch64SysReg::lookupSysRegByName (StringRef)
const SysReg * llvm::AArch64SysReg::lookupSysRegByEncoding (uint16_t)
uint32_t llvm::AArch64SysReg::parseGenericRegister (StringRef Name)
std::string llvm::AArch64SysReg::genericRegisterString (uint32_t Bits)


static constexpr unsigned llvm::AArch64::SVEBitsPerBlock = 128
static constexpr unsigned llvm::AArch64::SVEMaxBitsPerVector = 2048

Macro Definition Documentation


#define GET_AT_DECL

Definition at line 380 of file AArch64BaseInfo.h.


#define GET_BTI_DECL

Definition at line 543 of file AArch64BaseInfo.h.


#define GET_DB_DECL

Definition at line 388 of file AArch64BaseInfo.h.



Definition at line 396 of file AArch64BaseInfo.h.


#define GET_DC_DECL

Definition at line 404 of file AArch64BaseInfo.h.



Definition at line 519 of file AArch64BaseInfo.h.


#define GET_IC_DECL

Definition at line 412 of file AArch64BaseInfo.h.


#define GET_ISB_DECL

Definition at line 420 of file AArch64BaseInfo.h.



Definition at line 663 of file AArch64BaseInfo.h.



Definition at line 436 of file AArch64BaseInfo.h.


#define GET_PSB_DECL

Definition at line 535 of file AArch64BaseInfo.h.



Definition at line 527 of file AArch64BaseInfo.h.



Definition at line 372 of file AArch64BaseInfo.h.



Definition at line 453 of file AArch64BaseInfo.h.



Definition at line 444 of file AArch64BaseInfo.h.



Definition at line 641 of file AArch64BaseInfo.h.


#define GET_TLBITable_DECL

Definition at line 655 of file AArch64BaseInfo.h.


#define GET_TSB_DECL

Definition at line 428 of file AArch64BaseInfo.h.