LLVM  14.0.0git
ARMMachineFunctionInfo.cpp
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1 //===-- ARMMachineFunctionInfo.cpp - ARM machine function info ------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
10 #include "ARMSubtarget.h"
11 
12 using namespace llvm;
13 
14 void ARMFunctionInfo::anchor() {}
15 
17  const auto &Subtarget = MF.getSubtarget<ARMSubtarget>();
18  if (!Subtarget.isMClass() || !Subtarget.hasV7Ops())
19  return false;
20 
21  const Function &F = MF.getFunction();
22  if (!F.hasFnAttribute("branch-target-enforcement")) {
23  if (const auto *BTE = mdconst::extract_or_null<ConstantInt>(
24  F.getParent()->getModuleFlag("branch-target-enforcement")))
25  return BTE->getZExtValue();
26  return false;
27  }
28 
29  const StringRef BTIEnable =
30  F.getFnAttribute("branch-target-enforcement").getValueAsString();
31  assert(BTIEnable.equals_insensitive("true") ||
32  BTIEnable.equals_insensitive("false"));
33  return BTIEnable.equals_insensitive("true");
34 }
35 
36 // The pair returns values for the ARMFunctionInfo members
37 // SignReturnAddress and SignReturnAddressAll respectively.
38 static std::pair<bool, bool> GetSignReturnAddress(const Function &F) {
39  if (!F.hasFnAttribute("sign-return-address")) {
40  const Module &M = *F.getParent();
41  if (const auto *Sign = mdconst::extract_or_null<ConstantInt>(
42  M.getModuleFlag("sign-return-address"))) {
43  if (Sign->getZExtValue()) {
44  if (const auto *All = mdconst::extract_or_null<ConstantInt>(
45  M.getModuleFlag("sign-return-address-all")))
46  return {true, All->getZExtValue()};
47  return {true, false};
48  }
49  }
50  return {false, false};
51  }
52 
53  StringRef Scope = F.getFnAttribute("sign-return-address").getValueAsString();
54  if (Scope.equals("none"))
55  return {false, false};
56 
57  if (Scope.equals("all"))
58  return {true, true};
59 
60  assert(Scope.equals("non-leaf"));
61  return {true, false};
62 }
63 
65  : isThumb(MF.getSubtarget<ARMSubtarget>().isThumb()),
66  hasThumb2(MF.getSubtarget<ARMSubtarget>().hasThumb2()),
67  IsCmseNSEntry(MF.getFunction().hasFnAttribute("cmse_nonsecure_entry")),
68  IsCmseNSCall(MF.getFunction().hasFnAttribute("cmse_nonsecure_call")),
69  BranchTargetEnforcement(GetBranchTargetEnforcement(MF)) {
70 
71  const auto &Subtarget = MF.getSubtarget<ARMSubtarget>();
72  if (Subtarget.isMClass() && Subtarget.hasV7Ops())
73  std::tie(SignReturnAddress, SignReturnAddressAll) =
75 }
ARMSubtarget.h
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AllocatorList.h:23
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::ARMSubtarget
Definition: ARMSubtarget.h:47
GetSignReturnAddress
static std::pair< bool, bool > GetSignReturnAddress(const Function &F)
Definition: ARMMachineFunctionInfo.cpp:38
llvm::Function
Definition: Function.h:62
getFunction
static Function * getFunction(Constant *C)
Definition: Evaluator.cpp:235
ARMMachineFunctionInfo.h
GetBranchTargetEnforcement
static bool GetBranchTargetEnforcement(MachineFunction &MF)
Definition: ARMMachineFunctionInfo.cpp:16
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::ARMFunctionInfo::ARMFunctionInfo
ARMFunctionInfo()=default
isThumb
static bool isThumb(const MCSubtargetInfo &STI)
Definition: ARMAsmPrinter.cpp:470
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:641
llvm::StringRef::equals_insensitive
LLVM_NODISCARD bool equals_insensitive(StringRef RHS) const
Check for string equality, ignoring case.
Definition: StringRef.h:193
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
llvm::MachineFunction
Definition: MachineFunction.h:241
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:57
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:607