14 #ifndef LLVM_MCA_RETIRE_CONTROL_UNIT_H 15 #define LLVM_MCA_RETIRE_CONTROL_UNIT_H 58 unsigned NextAvailableSlotIdx;
59 unsigned CurrentInstructionSlotIdx;
60 unsigned NumROBEntries;
61 unsigned AvailableEntries;
62 unsigned MaxRetirePerCycle;
63 std::vector<RUToken> Queue;
65 unsigned normalizeQuantity(
unsigned Quantity)
const {
69 Quantity = std::min(Quantity, NumROBEntries);
77 unsigned computeNextSlotIdx()
const;
82 bool isEmpty()
const {
return AvailableEntries == NumROBEntries; }
85 return AvailableEntries >= normalizeQuantity(Quantity);
112 #endif // LLVM_MCA_RETIRE_CONTROL_UNIT_H This class represents lattice values for constants.
An InstRef contains both a SourceMgr index and Instruction pair.
void consumeCurrentToken()
This class tracks which instructions are in-flight (i.e., dispatched but not retired) in the OoO back...
void onInstructionExecuted(unsigned TokenID)
unsigned dispatch(const InstRef &IS)
This file defines a base class for describing a simulated hardware unit.
Align max(MaybeAlign Lhs, Align Rhs)
unsigned getMaxRetirePerCycle() const
const RUToken & getCurrentToken() const
bool isAvailable(unsigned Quantity=1) const
This file defines abstractions used by the Pipeline to model register reads, register writes and inst...
const RUToken & peekNextToken() const
RetireControlUnit(const MCSchedModel &SM)
Machine model for scheduling, bundling, and heuristics.