17#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H
18#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H
46 int ResourcesCost = 0;
48 Candidate() =
default;
56 return (GroupingCost <= 0 && !ResourcesCost);
61 if (GroupingCost != 0)
62 dbgs() <<
" Grouping cost:" << GroupingCost;
63 if (ResourcesCost != 0)
64 dbgs() <<
" Resource cost:" << ResourcesCost;
72 bool operator() (
SUnit *lhs,
SUnit *rhs)
const {
87 struct SUSet : std::set<SUnit*, SUSorter> {
101 typedef std::map<MachineBasicBlock*, SystemZHazardRecognizer*> MBB2HazRec;
102 MBB2HazRec SchedStates;
119 unsigned NumRegionInstrs)
override;
MachineSchedStrategy - Interface to the scheduling algorithm used by ScheduleDAGMI.
Scheduling unit. This is a node in the scheduling DAG.
unsigned NodeNum
Entry # of node in the node vector.
unsigned getHeight() const
Returns the height of this node, which is the length of the maximum path down to any node which has n...
bool isScheduleHigh
True if preferable to schedule high.
ScheduleDAGMI is an implementation of ScheduleDAGInstrs that simply schedules machine instructions ac...
SystemZHazardRecognizer maintains the state for one MBB during scheduling.
A MachineSchedStrategy implementation for SystemZ post RA scheduling.
bool shouldTrackPressure() const override
PostRA scheduling does not track pressure.
SUnit * pickNode(bool &IsTopNode) override
Pick the next node to schedule, or return NULL.
void leaveMBB() override
Tell the strategy that current MBB is done.
void releaseBottomNode(SUnit *SU) override
Currently only scheduling top-down, so this method is empty.
void initPolicy(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs) override
Called for a region before scheduling.
void schedNode(SUnit *SU, bool IsTopNode) override
ScheduleDAGMI has scheduled an instruction - tell HazardRec about it.
void initialize(ScheduleDAGMI *dag) override
Initialize the strategy after building the DAG for a new region.
void enterMBB(MachineBasicBlock *NextMBB) override
Tell the strategy that MBB is about to be processed.
virtual ~SystemZPostRASchedStrategy()
bool doMBBSchedRegionsTopDown() const override
void releaseTopNode(SUnit *SU) override
SU has had all predecessor dependencies resolved.
Provide an instruction scheduling machine model to CodeGen passes.
@ C
The default llvm calling convention, compatible with C.
This is an optimization pass for GlobalISel generic memory operations.
void dump(const SparseBitVector< ElementSize > &LHS, raw_ostream &out)
bool operator<(int64_t V1, const APSInt &V2)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...