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22 #ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H
23 #define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H
48 int ResourcesCost = 0;
50 Candidate() =
default;
58 return (GroupingCost <= 0 && !ResourcesCost);
63 if (GroupingCost != 0)
64 dbgs() <<
" Grouping cost:" << GroupingCost;
65 if (ResourcesCost != 0)
66 dbgs() <<
" Resource cost:" << ResourcesCost;
74 bool operator() (
SUnit *lhs,
SUnit *rhs)
const {
89 struct SUSet :
std::set<SUnit*, SUSorter> {
103 typedef std::map<MachineBasicBlock*, SystemZHazardRecognizer*> MBB2HazRec;
104 MBB2HazRec SchedStates;
121 unsigned NumRegionInstrs)
override;
155 #endif // LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H
void leaveMBB() override
Tell the strategy that current MBB is done.
We currently generate a but we really shouldn eax ecx xorl edx divl ecx eax divl ecx movl eax ret A similar code sequence works for division We currently compile i32 v2 eax eax jo LBB1_2 atomic and others It is also currently not done for read modify write instructions It is also current not done if the OF or CF flags are needed The shift operators have the complication that when the shift count is EFLAGS is not set
This is an optimization pass for GlobalISel generic memory operations.
void enterMBB(MachineBasicBlock *NextMBB) override
Tell the strategy that MBB is about to be processed.
bool doMBBSchedRegionsTopDown() const override
void dump(const SparseBitVector< ElementSize > &LHS, raw_ostream &out)
SystemZHazardRecognizer maintains the state for one MBB during scheduling.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
MachineSchedStrategy - Interface to the scheduling algorithm used by ScheduleDAGMI.
void releaseBottomNode(SUnit *SU) override
Currently only scheduling top-down, so this method is empty.
bool isScheduleHigh
True if preferable to schedule high.
SystemZPostRASchedStrategy(const MachineSchedContext *C)
(vector float) vec_cmpeq(*A, *B) C
A MachineSchedStrategy implementation for SystemZ post RA scheduling.
unsigned NodeNum
Entry # of node in the node vector.
void releaseTopNode(SUnit *SU) override
SU has had all predecessor dependencies resolved.
bool shouldTrackPressure() const override
PostRA scheduling does not track pressure.
unsigned getHeight() const
Returns the height of this node, which is the length of the maximum path down to any node which has n...
Provide an instruction scheduling machine model to CodeGen passes.
bool operator<(int64_t V1, const APSInt &V2)
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...
SUnit * pickNode(bool &IsTopNode) override
Pick the next node to schedule, or return NULL.
ScheduleDAGMI is an implementation of ScheduleDAGInstrs that simply schedules machine instructions ac...
virtual ~SystemZPostRASchedStrategy()
void schedNode(SUnit *SU, bool IsTopNode) override
ScheduleDAGMI has scheduled an instruction - tell HazardRec about it.
void initialize(ScheduleDAGMI *dag) override
Initialize the strategy after building the DAG for a new region.
void initPolicy(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs) override
Called for a region before scheduling.
Scheduling unit. This is a node in the scheduling DAG.