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ARMHazardRecognizer.h
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1 //===-- ARMHazardRecognizer.h - ARM Hazard Recognizers ----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines hazard recognizers for scheduling ARM functions.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_ARM_ARMHAZARDRECOGNIZER_H
14 #define LLVM_LIB_TARGET_ARM_ARMHAZARDRECOGNIZER_H
15 
16 #include "ARMBaseInstrInfo.h"
17 #include "llvm/ADT/BitmaskEnum.h"
18 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/Support/DataTypes.h"
21 #include <array>
22 #include <initializer_list>
23 
24 namespace llvm {
25 
26 class DataLayout;
27 class MachineFunction;
28 class MachineInstr;
29 class ScheduleDAG;
30 
31 // Hazards related to FP MLx instructions
33  MachineInstr *LastMI = nullptr;
34  unsigned FpMLxStalls = 0;
35 
36 public:
38 
39  HazardType getHazardType(SUnit *SU, int Stalls) override;
40  void Reset() override;
41  void EmitInstruction(SUnit *SU) override;
42  void AdvanceCycle() override;
43  void RecedeCycle() override;
44 };
45 
46 // Hazards related to bank conflicts
49  const MachineFunction &MF;
50  const DataLayout &DL;
51  int64_t DataMask;
52  bool AssumeITCMBankConflict;
53 
54 public:
55  ARMBankConflictHazardRecognizer(const ScheduleDAG *DAG, int64_t DDM,
56  bool ABC);
57  HazardType getHazardType(SUnit *SU, int Stalls) override;
58  void Reset() override;
59  void EmitInstruction(SUnit *SU) override;
60  void AdvanceCycle() override;
61  void RecedeCycle() override;
62 
63 private:
64  inline HazardType CheckOffsets(unsigned O0, unsigned O1);
65 };
66 
67 } // end namespace llvm
68 
69 #endif
llvm::ARMBankConflictHazardRecognizer
Definition: ARMHazardRecognizer.h:47
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AllocatorList.h:23
llvm::ARMHazardRecognizerFPMLx::getHazardType
HazardType getHazardType(SUnit *SU, int Stalls) override
getHazardType - Return the hazard type of emitting this node.
Definition: ARMHazardRecognizer.cpp:42
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:113
llvm::ARMHazardRecognizerFPMLx::AdvanceCycle
void AdvanceCycle() override
AdvanceCycle - This callback is invoked whenever the next top-down instruction to be scheduled cannot...
Definition: ARMHazardRecognizer.cpp:95
llvm::ScheduleHazardRecognizer::MaxLookAhead
unsigned MaxLookAhead
MaxLookAhead - Indicate the number of cycles in the scoreboard state.
Definition: ScheduleHazardRecognizer.h:31
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
llvm::ARMHazardRecognizerFPMLx::RecedeCycle
void RecedeCycle() override
RecedeCycle - This callback is invoked whenever the next bottom-up instruction to be scheduled cannot...
Definition: ARMHazardRecognizer.cpp:101
llvm::ARMHazardRecognizerFPMLx::ARMHazardRecognizerFPMLx
ARMHazardRecognizerFPMLx()
Definition: ARMHazardRecognizer.h:37
llvm::ARMBankConflictHazardRecognizer::Reset
void Reset() override
Reset - This callback is invoked when a new block of instructions is about to be schedule.
Definition: ARMHazardRecognizer.cpp:252
llvm::ARMHazardRecognizerFPMLx::Reset
void Reset() override
Reset - This callback is invoked when a new block of instructions is about to be schedule.
Definition: ARMHazardRecognizer.cpp:82
ScheduleHazardRecognizer.h
llvm::ARMBankConflictHazardRecognizer::RecedeCycle
void RecedeCycle() override
RecedeCycle - This callback is invoked whenever the next bottom-up instruction to be scheduled cannot...
Definition: ARMHazardRecognizer.cpp:268
llvm::ARMHazardRecognizerFPMLx
Definition: ARMHazardRecognizer.h:32
llvm::ScheduleHazardRecognizer::HazardType
HazardType
Definition: ScheduleHazardRecognizer.h:37
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::ARMBankConflictHazardRecognizer::EmitInstruction
void EmitInstruction(SUnit *SU) override
EmitInstruction - This callback is invoked when an instruction is emitted, to advance the hazard stat...
Definition: ARMHazardRecognizer.cpp:254
ARMBaseInstrInfo.h
llvm::MachineFunction
Definition: MachineFunction.h:234
llvm::ARMHazardRecognizerFPMLx::EmitInstruction
void EmitInstruction(SUnit *SU) override
EmitInstruction - This callback is invoked when an instruction is emitted, to advance the hazard stat...
Definition: ARMHazardRecognizer.cpp:87
llvm::ScheduleDAG
Definition: ScheduleDAG.h:555
BitmaskEnum.h
llvm::ARMBankConflictHazardRecognizer::ARMBankConflictHazardRecognizer
ARMBankConflictHazardRecognizer(const ScheduleDAG *DAG, int64_t DDM, bool ABC)
Definition: ARMHazardRecognizer.cpp:165
llvm::ARMBankConflictHazardRecognizer::AdvanceCycle
void AdvanceCycle() override
AdvanceCycle - This callback is invoked whenever the next top-down instruction to be scheduled cannot...
Definition: ARMHazardRecognizer.cpp:266
SmallVector.h
llvm::ARMBankConflictHazardRecognizer::getHazardType
HazardType getHazardType(SUnit *SU, int Stalls) override
getHazardType - Return the hazard type of emitting this node.
Definition: ARMHazardRecognizer.cpp:182
DataTypes.h
llvm::SUnit
Scheduling unit. This is a node in the scheduling DAG.
Definition: ScheduleDAG.h:242
llvm::ScheduleHazardRecognizer
HazardRecognizer - This determines whether or not an instruction can be issued this cycle,...
Definition: ScheduleHazardRecognizer.h:25