LLVM  15.0.0git
M68kDisassembler.cpp
Go to the documentation of this file.
1 //===-- M68kDisassembler.cpp - Disassembler for M68k ------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file is part of the M68k Disassembler.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "M68k.h"
14 #include "M68kRegisterInfo.h"
15 #include "M68kSubtarget.h"
19 
20 #include "llvm/MC/MCAsmInfo.h"
21 #include "llvm/MC/MCContext.h"
23 #include "llvm/MC/MCDecoderOps.h"
24 #include "llvm/MC/MCInst.h"
25 #include "llvm/MC/TargetRegistry.h"
26 #include "llvm/Support/Endian.h"
28 
29 using namespace llvm;
30 
31 #define DEBUG_TYPE "m68k-disassembler"
32 
34 
35 static const unsigned RegisterDecode[] = {
36  M68k::D0, M68k::D1, M68k::D2, M68k::D3, M68k::D4, M68k::D5,
37  M68k::D6, M68k::D7, M68k::A0, M68k::A1, M68k::A2, M68k::A3,
38  M68k::A4, M68k::A5, M68k::A6, M68k::SP,
39 };
40 
42  uint64_t Address, const void *Decoder) {
43  if (RegNo >= 16)
44  return DecodeStatus::Fail;
46  return DecodeStatus::Success;
47 }
48 
50  uint64_t Address,
51  const void *Decoder) {
52  return DecodeRegisterClass(Inst, RegNo, Address, Decoder);
53 }
54 
56  uint64_t Address,
57  const void *Decoder) {
58  return DecodeRegisterClass(Inst, RegNo, Address, Decoder);
59 }
60 
62  uint64_t Address,
63  const void *Decoder) {
64  return DecodeRegisterClass(Inst, RegNo, Address, Decoder);
65 }
66 
68  uint64_t Address,
69  const void *Decoder) {
70  return DecodeRegisterClass(Inst, RegNo | 8ULL, Address, Decoder);
71 }
72 
74  uint64_t Address,
75  const void *Decoder) {
76  return DecodeRegisterClass(Inst, RegNo | 8ULL, Address, Decoder);
77 }
78 
80  uint64_t Address,
81  const void *Decoder) {
82  return DecodeRegisterClass(Inst, RegNo, Address, Decoder);
83 }
84 
86  uint64_t Address,
87  const void *Decoder) {
88  return DecodeRegisterClass(Inst, RegNo, Address, Decoder);
89 }
90 
92  uint64_t Address,
93  const void *Decoder) {
94  llvm_unreachable("unimplemented");
95 }
96 
97 #include "M68kGenDisassemblerTable.inc"
98 
99 /// A disassembler class for M68k.
102  : MCDisassembler(STI, Ctx) {}
103  virtual ~M68kDisassembler() {}
104 
105  DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
106  ArrayRef<uint8_t> Bytes, uint64_t Address,
107  raw_ostream &CStream) const override;
108 };
109 
111  ArrayRef<uint8_t> Bytes,
112  uint64_t Address,
113  raw_ostream &CStream) const {
114  DecodeStatus Result;
115  auto MakeUp = [&](APInt &Insn, unsigned InstrBits) {
116  unsigned Idx = Insn.getBitWidth() >> 3;
117  unsigned RoundUp = alignTo(InstrBits, Align(16));
118  if (RoundUp > Insn.getBitWidth())
119  Insn = Insn.zext(RoundUp);
120  RoundUp = RoundUp >> 3;
121  for (; Idx < RoundUp; Idx += 2) {
122  Insn.insertBits(support::endian::read16be(&Bytes[Idx]), Idx * 8, 16);
123  }
124  };
126  // 2 bytes of data are consumed, so set Size to 2
127  // If we don't do this, disassembler may generate result even
128  // the encoding is invalid. We need to let it fail correctly.
129  Size = 2;
130  Result = decodeInstruction(DecoderTable80, Instr, Insn, Address, this, STI,
131  MakeUp);
132  if (Result == DecodeStatus::Success)
133  Size = InstrLenTable[Instr.getOpcode()] >> 3;
134  return Result;
135 }
136 
138  const MCSubtargetInfo &STI,
139  MCContext &Ctx) {
140  return new M68kDisassembler(STI, Ctx);
141 }
142 
144  // Register the disassembler.
147 }
llvm::alignTo
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:156
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
MCDisassembler.h
T
M68kDisassembler
A disassembler class for M68k.
Definition: M68kDisassembler.cpp:100
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:76
M68kDisassembler::getInstruction
DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address, raw_ostream &CStream) const override
Returns the disassembly of a single instruction.
Definition: M68kDisassembler.cpp:110
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:145
ErrorHandling.h
Fail
#define Fail
Definition: AArch64Disassembler.cpp:281
DecodeAR16RegisterClass
static DecodeStatus DecodeAR16RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
Definition: M68kDisassembler.cpp:73
llvm::getTheM68kTarget
Target & getTheM68kTarget()
Definition: M68kTargetInfo.cpp:18
llvm::TargetRegistry::RegisterMCDisassembler
static void RegisterMCDisassembler(Target &T, Target::MCDisassemblerCtorTy Fn)
RegisterMCDisassembler - Register a MCDisassembler implementation for the given target.
Definition: TargetRegistry.h:951
M68kDisassembler::~M68kDisassembler
virtual ~M68kDisassembler()
Definition: M68kDisassembler.cpp:103
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
MCDecoderOps.h
llvm::ArrayRef::data
const T * data() const
Definition: ArrayRef.h:161
RegisterDecode
static const unsigned RegisterDecode[]
Definition: M68kDisassembler.cpp:35
M68k.h
DecodeXR32RegisterClass
static DecodeStatus DecodeXR32RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
Definition: M68kDisassembler.cpp:79
MCContext.h
MCInst.h
createM68kDisassembler
static MCDisassembler * createM68kDisassembler(const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
Definition: M68kDisassembler.cpp:137
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:54
Align
uint64_t Align
Definition: ELFObjHandler.cpp:81
llvm::MCDisassembler::DecodeStatus
DecodeStatus
Ternary decode status.
Definition: MCDisassembler.h:109
RoundUp
static size_t RoundUp(size_t size, size_t align)
Definition: InstrProfReader.cpp:574
llvm::MCInst::addOperand
void addOperand(const MCOperand Op)
Definition: MCInst.h:210
M68kMCCodeEmitter.h
M68kMCTargetDesc.h
uint64_t
LLVM_EXTERNAL_VISIBILITY
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:126
llvm::MCDisassembler
Superclass for all disassemblers.
Definition: MCDisassembler.h:85
DecodeDR32RegisterClass
static DecodeStatus DecodeDR32RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
Definition: M68kDisassembler.cpp:49
DecodeXR16RegisterClass
static DecodeStatus DecodeXR16RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
Definition: M68kDisassembler.cpp:85
DecodeRegisterClass
static DecodeStatus DecodeRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
Definition: M68kDisassembler.cpp:41
llvm::APInt
Class for arbitrary precision integers.
Definition: APInt.h:75
llvm::ArrayRef< uint8_t >
MCAsmInfo.h
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::MCOperand::createReg
static MCOperand createReg(unsigned Reg)
Definition: MCInst.h:134
Insn
SmallVector< AArch64_IMM::ImmInsnModel, 4 > Insn
Definition: AArch64MIPeepholeOpt.cpp:127
M68kTargetInfo.h
Success
#define Success
Definition: AArch64Disassembler.cpp:280
llvm::MCInst::getOpcode
unsigned getOpcode() const
Definition: MCInst.h:198
DecodeAR32RegisterClass
static DecodeStatus DecodeAR32RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
Definition: M68kDisassembler.cpp:67
DecodeStatus
MCDisassembler::DecodeStatus DecodeStatus
Definition: M68kDisassembler.cpp:33
LLVMInitializeM68kDisassembler
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeM68kDisassembler()
Definition: M68kDisassembler.cpp:143
DecodeDR8RegisterClass
static DecodeStatus DecodeDR8RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
Definition: M68kDisassembler.cpp:61
M68kSubtarget.h
M68kRegisterInfo.h
DecodeDR16RegisterClass
static DecodeStatus DecodeDR16RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
Definition: M68kDisassembler.cpp:55
M68kDisassembler::M68kDisassembler
M68kDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
Definition: M68kDisassembler.cpp:101
Endian.h
TargetRegistry.h
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:76
DecodeCCRCRegisterClass
static DecodeStatus DecodeCCRCRegisterClass(MCInst &Inst, APInt &Insn, uint64_t Address, const void *Decoder)
Definition: M68kDisassembler.cpp:91
llvm::support::endian::read16be
uint16_t read16be(const void *P)
Definition: Endian.h:383