Go to the documentation of this file.
16 #ifndef LLVM_CODEGEN_STACKPROTECTOR_H
17 #define LLVM_CODEGEN_STACKPROTECTOR_H
33 class TargetLoweringBase;
62 unsigned SSPBufferSize = 0;
71 bool HasPrologue =
false;
74 bool HasIRCheck =
false;
82 bool InsertStackProtectors();
94 bool ContainsProtectableArray(
Type *Ty,
bool &IsLarge,
bool Strong =
false,
95 bool InStruct =
false)
const;
98 bool HasAddressTaken(
const Instruction *AI, uint64_t AllocSize);
102 bool RequiresStackProtector();
121 #endif // LLVM_CODEGEN_STACKPROTECTOR_H
This class represents lattice values for constants.
This base class for TargetLowering contains the SelectionDAG-independent parts that can be used from ...
void copyToMachineFrameInfo(MachineFrameInfo &MFI) const
bool runOnFunction(Function &Fn) override
runOnFunction - Virtual method overriden by subclasses to do the per-function processing of the pass.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Triple - Helper class for working with autoconf configuration names.
The instances of the Type class are immutable: once they are created, they are never changed.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
LLVM Basic Block Representation.
Represent the analysis usage information of a pass.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
Primary interface to the complete machine description for the target machine.
@ BasicBlock
Various leaf nodes.
A Module instance is used to store all the information related to an LLVM module.
bool shouldEmitSDCheck(const BasicBlock &BB) const
Machine Check Debug Module
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
SSPLayoutKind
Stack Smashing Protection (SSP) rules require that vulnerable stack allocations are located close the...
FunctionPass class - This class is used to implement most global optimizations.
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
an instruction to allocate memory on the stack