LLVM  6.0.0svn
X86TargetMachine.cpp
Go to the documentation of this file.
1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the X86 specific subclass of TargetMachine.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86TargetMachine.h"
16 #include "X86.h"
17 #include "X86CallLowering.h"
18 #include "X86LegalizerInfo.h"
19 #include "X86MacroFusion.h"
20 #include "X86Subtarget.h"
21 #include "X86TargetObjectFile.h"
22 #include "X86TargetTransformInfo.h"
23 #include "llvm/ADT/Optional.h"
24 #include "llvm/ADT/STLExtras.h"
25 #include "llvm/ADT/SmallString.h"
26 #include "llvm/ADT/StringRef.h"
27 #include "llvm/ADT/Triple.h"
36 #include "llvm/CodeGen/Passes.h"
39 #include "llvm/IR/Attributes.h"
40 #include "llvm/IR/DataLayout.h"
41 #include "llvm/IR/Function.h"
42 #include "llvm/Pass.h"
43 #include "llvm/Support/CodeGen.h"
48 #include <memory>
49 #include <string>
50 
51 using namespace llvm;
52 
53 static cl::opt<bool> EnableMachineCombinerPass("x86-machine-combiner",
54  cl::desc("Enable the machine combiner pass"),
55  cl::init(true), cl::Hidden);
56 
57 namespace llvm {
58 
65 
66 } // end namespace llvm
67 
68 extern "C" void LLVMInitializeX86Target() {
69  // Register the target.
72 
83 }
84 
85 static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
86  if (TT.isOSBinFormatMachO()) {
87  if (TT.getArch() == Triple::x86_64)
88  return llvm::make_unique<X86_64MachoTargetObjectFile>();
89  return llvm::make_unique<TargetLoweringObjectFileMachO>();
90  }
91 
92  if (TT.isOSFreeBSD())
93  return llvm::make_unique<X86FreeBSDTargetObjectFile>();
94  if (TT.isOSLinux() || TT.isOSNaCl() || TT.isOSIAMCU())
95  return llvm::make_unique<X86LinuxNaClTargetObjectFile>();
96  if (TT.isOSSolaris())
97  return llvm::make_unique<X86SolarisTargetObjectFile>();
98  if (TT.isOSFuchsia())
99  return llvm::make_unique<X86FuchsiaTargetObjectFile>();
100  if (TT.isOSBinFormatELF())
101  return llvm::make_unique<X86ELFTargetObjectFile>();
103  return llvm::make_unique<X86WindowsTargetObjectFile>();
104  if (TT.isOSBinFormatCOFF())
105  return llvm::make_unique<TargetLoweringObjectFileCOFF>();
106  llvm_unreachable("unknown subtarget type");
107 }
108 
109 static std::string computeDataLayout(const Triple &TT) {
110  // X86 is little endian
111  std::string Ret = "e";
112 
114  // X86 and x32 have 32 bit pointers.
115  if ((TT.isArch64Bit() &&
116  (TT.getEnvironment() == Triple::GNUX32 || TT.isOSNaCl())) ||
117  !TT.isArch64Bit())
118  Ret += "-p:32:32";
119 
120  // Some ABIs align 64 bit integers and doubles to 64 bits, others to 32.
121  if (TT.isArch64Bit() || TT.isOSWindows() || TT.isOSNaCl())
122  Ret += "-i64:64";
123  else if (TT.isOSIAMCU())
124  Ret += "-i64:32-f64:32";
125  else
126  Ret += "-f64:32:64";
127 
128  // Some ABIs align long double to 128 bits, others to 32.
129  if (TT.isOSNaCl() || TT.isOSIAMCU())
130  ; // No f80
131  else if (TT.isArch64Bit() || TT.isOSDarwin())
132  Ret += "-f80:128";
133  else
134  Ret += "-f80:32";
135 
136  if (TT.isOSIAMCU())
137  Ret += "-f128:32";
138 
139  // The registers can hold 8, 16, 32 or, in x86-64, 64 bits.
140  if (TT.isArch64Bit())
141  Ret += "-n8:16:32:64";
142  else
143  Ret += "-n8:16:32";
144 
145  // The stack is aligned to 32 bits on some ABIs and 128 bits on others.
146  if ((!TT.isArch64Bit() && TT.isOSWindows()) || TT.isOSIAMCU())
147  Ret += "-a:0:32-S32";
148  else
149  Ret += "-S128";
150 
151  return Ret;
152 }
153 
156  bool is64Bit = TT.getArch() == Triple::x86_64;
157  if (!RM.hasValue()) {
158  // Darwin defaults to PIC in 64 bit mode and dynamic-no-pic in 32 bit mode.
159  // Win64 requires rip-rel addressing, thus we force it to PIC. Otherwise we
160  // use static relocation model by default.
161  if (TT.isOSDarwin()) {
162  if (is64Bit)
163  return Reloc::PIC_;
164  return Reloc::DynamicNoPIC;
165  }
166  if (TT.isOSWindows() && is64Bit)
167  return Reloc::PIC_;
168  return Reloc::Static;
169  }
170 
171  // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
172  // is defined as a model for code which may be used in static or dynamic
173  // executables but not necessarily a shared library. On X86-32 we just
174  // compile in -static mode, in x86-64 we use PIC.
175  if (*RM == Reloc::DynamicNoPIC) {
176  if (is64Bit)
177  return Reloc::PIC_;
178  if (!TT.isOSDarwin())
179  return Reloc::Static;
180  }
181 
182  // If we are on Darwin, disallow static relocation model in X86-64 mode, since
183  // the Mach-O file format doesn't support it.
184  if (*RM == Reloc::Static && TT.isOSDarwin() && is64Bit)
185  return Reloc::PIC_;
186 
187  return *RM;
188 }
189 
191  bool JIT, bool Is64Bit) {
192  if (CM)
193  return *CM;
194  if (JIT)
195  return Is64Bit ? CodeModel::Large : CodeModel::Small;
196  return CodeModel::Small;
197 }
198 
199 /// Create an X86 target.
200 ///
202  StringRef CPU, StringRef FS,
203  const TargetOptions &Options,
206  CodeGenOpt::Level OL, bool JIT)
208  T, computeDataLayout(TT), TT, CPU, FS, Options,
209  getEffectiveRelocModel(TT, RM),
210  getEffectiveCodeModel(CM, JIT, TT.getArch() == Triple::x86_64), OL),
211  TLOF(createTLOF(getTargetTriple())) {
212  // Windows stack unwinder gets confused when execution flow "falls through"
213  // after a call to 'noreturn' function.
214  // To prevent that, we emit a trap for 'unreachable' IR instructions.
215  // (which on X86, happens to be the 'ud2' instruction)
216  // On PS4, the "return address" of a 'noreturn' call must still be within
217  // the calling function, and TrapUnreachable is an easy way to get that.
218  // The check here for 64-bit windows is a bit icky, but as we're unlikely
219  // to ever want to mix 32 and 64-bit windows code in a single module
220  // this should be fine.
221  if ((TT.isOSWindows() && TT.getArch() == Triple::x86_64) || TT.isPS4())
222  this->Options.TrapUnreachable = true;
223 
224  initAsmInfo();
225 }
226 
228 
229 const X86Subtarget *
231  Attribute CPUAttr = F.getFnAttribute("target-cpu");
232  Attribute FSAttr = F.getFnAttribute("target-features");
233 
234  StringRef CPU = !CPUAttr.hasAttribute(Attribute::None)
235  ? CPUAttr.getValueAsString()
236  : (StringRef)TargetCPU;
238  ? FSAttr.getValueAsString()
239  : (StringRef)TargetFS;
240 
242  Key.reserve(CPU.size() + FS.size());
243  Key += CPU;
244  Key += FS;
245 
246  // FIXME: This is related to the code below to reset the target options,
247  // we need to know whether or not the soft float flag is set on the
248  // function before we can generate a subtarget. We also need to use
249  // it as a key for the subtarget since that can be the only difference
250  // between two functions.
251  bool SoftFloat =
252  F.getFnAttribute("use-soft-float").getValueAsString() == "true";
253  // If the soft float attribute is set on the function turn on the soft float
254  // subtarget feature.
255  if (SoftFloat)
256  Key += FS.empty() ? "+soft-float" : ",+soft-float";
257 
258  FS = Key.substr(CPU.size());
259 
260  auto &I = SubtargetMap[Key];
261  if (!I) {
262  // This needs to be done before we create a new subtarget since any
263  // creation will depend on the TM and the code generation flags on the
264  // function that reside in TargetOptions.
266  I = llvm::make_unique<X86Subtarget>(TargetTriple, CPU, FS, *this,
268  }
269  return I.get();
270 }
271 
272 //===----------------------------------------------------------------------===//
273 // Command line options for x86
274 //===----------------------------------------------------------------------===//
275 static cl::opt<bool>
276 UseVZeroUpper("x86-use-vzeroupper", cl::Hidden,
277  cl::desc("Minimize AVX to SSE transition penalty"),
278  cl::init(true));
279 
280 //===----------------------------------------------------------------------===//
281 // X86 TTI query.
282 //===----------------------------------------------------------------------===//
283 
285  return TargetIRAnalysis([this](const Function &F) {
286  return TargetTransformInfo(X86TTIImpl(this, F));
287  });
288 }
289 
290 //===----------------------------------------------------------------------===//
291 // Pass Pipeline Configuration
292 //===----------------------------------------------------------------------===//
293 
294 namespace {
295 
296 /// X86 Code Generator Pass Configuration Options.
297 class X86PassConfig : public TargetPassConfig {
298 public:
299  X86PassConfig(X86TargetMachine &TM, PassManagerBase &PM)
300  : TargetPassConfig(TM, PM) {}
301 
302  X86TargetMachine &getX86TargetMachine() const {
303  return getTM<X86TargetMachine>();
304  }
305 
307  createMachineScheduler(MachineSchedContext *C) const override {
310  return DAG;
311  }
312 
313  void addIRPasses() override;
314  bool addInstSelector() override;
315  bool addIRTranslator() override;
316  bool addLegalizeMachineIR() override;
317  bool addRegBankSelect() override;
318  bool addGlobalInstructionSelect() override;
319  bool addILPOpts() override;
320  bool addPreISel() override;
321  void addMachineSSAOptimization() override;
322  void addPreRegAlloc() override;
323  void addPostRegAlloc() override;
324  void addPreEmitPass() override;
325  void addPreSched2() override;
326 };
327 
328 class X86ExecutionDepsFix : public ExecutionDepsFix {
329 public:
330  static char ID;
331  X86ExecutionDepsFix() : ExecutionDepsFix(ID, X86::VR128XRegClass) {}
332  StringRef getPassName() const override {
333  return "X86 Execution Dependency Fix";
334  }
335 };
337 
338 } // end anonymous namespace
339 
340 INITIALIZE_PASS(X86ExecutionDepsFix, "x86-execution-deps-fix",
341  "X86 Execution Dependency Fix", false, false)
342 
344  return new X86PassConfig(*this, PM);
345 }
346 
347 void X86PassConfig::addIRPasses() {
348  addPass(createAtomicExpandPass());
349 
351 
352  if (TM->getOptLevel() != CodeGenOpt::None)
353  addPass(createInterleavedAccessPass());
354 }
355 
356 bool X86PassConfig::addInstSelector() {
357  // Install an instruction selector.
358  addPass(createX86ISelDag(getX86TargetMachine(), getOptLevel()));
359 
360  // For ELF, cleanup any local-dynamic TLS accesses.
361  if (TM->getTargetTriple().isOSBinFormatELF() &&
364 
365  addPass(createX86GlobalBaseRegPass());
366  return false;
367 }
368 
369 bool X86PassConfig::addIRTranslator() {
370  addPass(new IRTranslator());
371  return false;
372 }
373 
374 bool X86PassConfig::addLegalizeMachineIR() {
375  addPass(new Legalizer());
376  return false;
377 }
378 
379 bool X86PassConfig::addRegBankSelect() {
380  addPass(new RegBankSelect());
381  return false;
382 }
383 
384 bool X86PassConfig::addGlobalInstructionSelect() {
385  addPass(new InstructionSelect());
386  return false;
387 }
388 
389 bool X86PassConfig::addILPOpts() {
390  addPass(&EarlyIfConverterID);
392  addPass(&MachineCombinerID);
393  addPass(createX86CmovConverterPass());
394  return true;
395 }
396 
397 bool X86PassConfig::addPreISel() {
398  // Only add this pass for 32-bit x86 Windows.
399  const Triple &TT = TM->getTargetTriple();
400  if (TT.isOSWindows() && TT.getArch() == Triple::x86)
401  addPass(createX86WinEHStatePass());
402  return true;
403 }
404 
405 void X86PassConfig::addPreRegAlloc() {
406  if (getOptLevel() != CodeGenOpt::None) {
407  addPass(&LiveRangeShrinkID);
408  addPass(createX86FixupSetCC());
409  addPass(createX86OptimizeLEAs());
411  }
412 
413  addPass(createX86WinAllocaExpander());
414 }
415 void X86PassConfig::addMachineSSAOptimization() {
418 }
419 
420 void X86PassConfig::addPostRegAlloc() {
422 }
423 
424 void X86PassConfig::addPreSched2() { addPass(createX86ExpandPseudoPass()); }
425 
426 void X86PassConfig::addPreEmitPass() {
427  if (getOptLevel() != CodeGenOpt::None)
428  addPass(new X86ExecutionDepsFix());
429 
430  if (UseVZeroUpper)
431  addPass(createX86IssueVZeroUpperPass());
432 
433  if (getOptLevel() != CodeGenOpt::None) {
434  addPass(createX86FixupBWInsts());
435  addPass(createX86PadShortFunctions());
436  addPass(createX86FixupLEAs());
437  addPass(createX86EvexToVexInsts());
438  }
439 }
uint64_t CallInst * C
bool isOSDarwin() const
isOSDarwin - Is this a "Darwin" OS (OS X, iOS, or watchOS).
Definition: Triple.h:470
char & MachineCombinerID
This pass performs instruction combining using trace metrics to estimate critical-path and resource d...
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
static std::unique_ptr< TargetLoweringObjectFile > createTLOF(const Triple &TT)
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
void LLVMInitializeX86Target()
static cl::opt< bool > EnableMachineCombinerPass("x86-machine-combiner", cl::desc("Enable the machine combiner pass"), cl::init(true), cl::Hidden)
FunctionPass * createX86OptimizeLEAs()
Return a pass that removes redundant LEA instructions and redundant address recalculations.
FunctionPass * createX86FixupBWInsts()
Return a Machine IR pass that selectively replaces certain byte and word instructions by equivalent 3...
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
void initializeFixupBWInstPassPass(PassRegistry &)
bool isOSBinFormatELF() const
Tests whether the OS uses the ELF binary format.
Definition: Triple.h:588
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with...
Definition: TargetMachine.h:76
FunctionPass * createX86FixupSetCC()
Return a pass that transforms setcc + movzx pairs into xor + setcc.
This file a TargetTransformInfo::Concept conforming object specific to the X86 target machine...
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t size() const
size - Get the string size.
Definition: StringRef.h:138
static std::string computeDataLayout(const Triple &TT)
TargetIRAnalysis getTargetIRAnalysis() override
Get a TargetIRAnalysis implementation for the target.
bool isOSNaCl() const
Tests whether the OS is NaCl (Native Client)
Definition: Triple.h:567
char & EarlyIfConverterID
EarlyIfConverter - This pass performs if-conversion on SSA form by inserting cmov instructions...
Analysis pass providing the TargetTransformInfo.
std::unique_ptr< ScheduleDAGMutation > createX86MacroFusionDAGMutation()
Note that you have to add: DAG.addMutation(createX86MacroFusionDAGMutation()); to X86PassConfig::crea...
FunctionPass * createX86CallFrameOptimization()
Return a pass that optimizes the code-size of x86 call sequences.
void initializeX86CallFrameOptimizationPass(PassRegistry &)
F(f)
FunctionPass * createX86IssueVZeroUpperPass()
This pass inserts AVX vzeroupper instructions before each call to avoid transition penalty between fu...
bool isOSFuchsia() const
Definition: Triple.h:490
FunctionPass * createX86EvexToVexInsts()
This pass replaces EVEX encoded of AVX-512 instructiosn by VEX encoding when possible in order to red...
void reserve(size_type N)
Definition: SmallVector.h:380
virtual void addMachineSSAOptimization()
addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form...
static const char * getManglingComponent(const Triple &T)
Definition: DataLayout.cpp:154
FunctionPass * createX86DomainReassignmentPass()
Return a Machine IR pass that reassigns instruction chains from one domain to another, when profitable.
void initializeX86CmovConverterPassPass(PassRegistry &)
ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules machine instructions while...
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
void resetTargetOptions(const Function &F) const
Reset the target options based on the function&#39;s attributes.
FunctionPass * createX86PadShortFunctions()
Return a pass that pads short functions with NOOPs.
bool isKnownWindowsMSVCEnvironment() const
Checks if the environment is MSVC.
Definition: Triple.h:530
This file contains the simple types necessary to represent the attributes associated with functions a...
No attributes have been set.
Definition: Attributes.h:72
bool isOSSolaris() const
Definition: Triple.h:496
Target-Independent Code Generator Pass Configuration Options.
Key
PAL metadata keys.
RegisterTargetMachine - Helper template for registering a target machine implementation, for use in the target machine initialization function.
ArchType getArch() const
getArch - Get the parsed architecture type of this triple.
Definition: Triple.h:285
void initializeEvexToVexInstPassPass(PassRegistry &)
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:133
FunctionPass * createX86FixupLEAs()
Return a pass that selectively replaces certain instructions (like add, sub, inc, dec...
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
Definition: SmallString.h:26
ScheduleDAGMILive * createGenericSchedLive(MachineSchedContext *C)
Create the standard converging machine scheduler.
bool isPS4() const
Tests whether the target is the PS4 platform.
Definition: Triple.h:615
bool isWindowsCoreCLREnvironment() const
Definition: Triple.h:534
static CodeModel::Model getEffectiveCodeModel(Optional< CodeModel::Model > CM)
INITIALIZE_PASS(X86ExecutionDepsFix, "x86-execution-deps-fix", "X86 Execution Dependency Fix", false, false) TargetPassConfig *X86TargetMachine
bool isOSWindows() const
Tests whether the OS is Windows.
Definition: Triple.h:562
char & LiveRangeShrinkID
LiveRangeShrink pass.
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:406
bool hasAttribute(AttrKind Val) const
Return true if the attribute is present.
Definition: Attributes.cpp:202
void initializeX86ExecutionDepsFixPass(PassRegistry &)
CodeGenOpt::Level getOptLevel() const
Returns the optimization level: None, Less, Default, or Aggressive.
static Reloc::Model getEffectiveRelocModel(Optional< Reloc::Model > RM)
This pass implements the reg bank selector pass used in the GlobalISel pipeline.
Definition: RegBankSelect.h:91
bool isOSBinFormatCOFF() const
Tests whether the OS uses the COFF binary format.
Definition: Triple.h:593
FunctionPass * createX86ExpandPseudoPass()
Return a Machine IR pass that expands X86-specific pseudo instructions into a sequence of actual inst...
FunctionPass * createX86GlobalBaseRegPass()
This pass initializes a global base register for PIC on x86-32.
static bool is64Bit(const char *name)
FunctionPass * createInterleavedAccessPass()
InterleavedAccess Pass - This pass identifies and matches interleaved memory accesses to target speci...
const X86Subtarget * getSubtargetImpl() const =delete
void initializeFixupLEAPassPass(PassRegistry &)
This class describes a target machine that is implemented with the LLVM target-independent code gener...
bool isOSBinFormatMachO() const
Tests whether the environment is MachO.
Definition: Triple.h:598
~X86TargetMachine() override
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void initializeX86DomainReassignmentPass(PassRegistry &)
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
bool isOSIAMCU() const
Definition: Triple.h:500
FunctionPass * createX86CmovConverterPass()
This pass converts X86 cmov instructions into branch when profitable.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
bool isOSLinux() const
Tests whether the OS is Linux.
Definition: Triple.h:572
EnvironmentType getEnvironment() const
getEnvironment - Get the parsed environment type of this triple.
Definition: Triple.h:303
unsigned StackAlignmentOverride
StackAlignmentOverride - Override default stack alignment for target.
bool isOSFreeBSD() const
Definition: Triple.h:486
This pass is responsible for selecting generic machine instructions to target-specific instructions...
FunctionPass * createX86FloatingPointStackifierPass()
This function returns a pass which converts floating-point register references and pseudo instruction...
Target - Wrapper for Target specific information.
This file describes how to lower LLVM calls to machine code calls.
std::string TargetCPU
Definition: TargetMachine.h:77
static cl::opt< bool > UseVZeroUpper("x86-use-vzeroupper", cl::Hidden, cl::desc("Minimize AVX to SSE transition penalty"), cl::init(true))
FunctionPass * createX86WinAllocaExpander()
Return a pass that expands WinAlloca pseudo-instructions.
A ScheduleDAG for scheduling lists of MachineInstr.
bool hasValue() const
Definition: Optional.h:137
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
X86TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
Create an X86 target.
StringRef getValueAsString() const
Return the attribute&#39;s value as a string.
Definition: Attributes.cpp:195
bool isArch64Bit() const
Test whether the architecture is 64-bit.
Definition: Triple.cpp:1243
FunctionPass * createX86ISelDag(X86TargetMachine &TM, CodeGenOpt::Level OptLevel)
This pass converts a legalized DAG into a X86-specific DAG, ready for instruction scheduling...
TargetOptions Options
Definition: TargetMachine.h:96
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...
#define I(x, y, z)
Definition: MD5.cpp:58
StringRef substr(size_t Start, size_t N=StringRef::npos) const
Return a reference to the substring from [Start, Start + N).
Definition: SmallString.h:246
Target & getTheX86_32Target()
std::string TargetFS
Definition: TargetMachine.h:78
void initializeWinEHStatePassPass(PassRegistry &)
This file declares the IRTranslator pass.
This file describes how to lower LLVM calls to machine code calls.
This file declares the targeting of the Machinelegalizer class for X86.
Attribute getFnAttribute(Attribute::AttrKind Kind) const
Return the attribute for the given attribute kind.
Definition: Function.h:270
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
Definition: PassRegistry.h:39
unsigned TrapUnreachable
Emit target-specific trap instruction for &#39;unreachable&#39; IR instructions.
This pass exposes codegen information to IR-level passes.
FunctionPass * createX86WinEHStatePass()
Return an IR pass that inserts EH registration stack objects and explicit EH state updates...
FunctionPass * createAtomicExpandPass()
Target & getTheX86_64Target()
FunctionPass * createCleanupLocalDynamicTLSPass()
This pass combines multiple accesses to local-dynamic TLS variables so that the TLS base address for ...
void initializeGlobalISel(PassRegistry &)
Initialize all passes linked into the GlobalISel library.
Definition: GlobalISel.cpp:19
void addMutation(std::unique_ptr< ScheduleDAGMutation > Mutation)
Add a postprocessing step to the DAG builder.