LLVM  15.0.0git
AArch64WinCOFFObjectWriter.cpp
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1 //= AArch64WinCOFFObjectWriter.cpp - AArch64 Windows COFF Object Writer C++ =//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===---------------------------------------------------------------------===//
8 
9 #include "AArch64MCTargetDesc.h"
12 #include "llvm/ADT/Twine.h"
13 #include "llvm/BinaryFormat/COFF.h"
14 #include "llvm/MC/MCAsmBackend.h"
15 #include "llvm/MC/MCContext.h"
16 #include "llvm/MC/MCExpr.h"
17 #include "llvm/MC/MCFixup.h"
19 #include "llvm/MC/MCObjectWriter.h"
20 #include "llvm/MC/MCValue.h"
22 #include "llvm/Support/Casting.h"
25 #include <cassert>
26 
27 using namespace llvm;
28 
29 namespace {
30 
31 class AArch64WinCOFFObjectWriter : public MCWinCOFFObjectTargetWriter {
32 public:
33  AArch64WinCOFFObjectWriter()
35 
36  ~AArch64WinCOFFObjectWriter() override = default;
37 
38  unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
39  const MCFixup &Fixup, bool IsCrossSection,
40  const MCAsmBackend &MAB) const override;
41 
42  bool recordRelocation(const MCFixup &) const override;
43 };
44 
45 } // end anonymous namespace
46 
47 unsigned AArch64WinCOFFObjectWriter::getRelocType(
48  MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup,
49  bool IsCrossSection, const MCAsmBackend &MAB) const {
50  unsigned FixupKind = Fixup.getKind();
51  if (IsCrossSection) {
52  // IMAGE_REL_ARM64_REL64 does not exist. We treat FK_Data_8 as FK_PCRel_4 so
53  // that .xword a-b can lower to IMAGE_REL_ARM64_REL32. This allows generic
54  // instrumentation to not bother with the COFF limitation. A negative value
55  // needs attention.
56  if (FixupKind != FK_Data_4 && FixupKind != FK_Data_8) {
57  Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression");
59  }
61  }
62 
63  auto Modifier = Target.isAbsolute() ? MCSymbolRefExpr::VK_None
64  : Target.getSymA()->getKind();
65  const MCExpr *Expr = Fixup.getValue();
66 
67  if (const AArch64MCExpr *A64E = dyn_cast<AArch64MCExpr>(Expr)) {
68  AArch64MCExpr::VariantKind RefKind = A64E->getKind();
69  switch (AArch64MCExpr::getSymbolLoc(RefKind)) {
72  // Supported
73  break;
74  default:
75  Ctx.reportError(Fixup.getLoc(), "relocation variant " +
76  A64E->getVariantKindName() +
77  " unsupported on COFF targets");
78  return COFF::IMAGE_REL_ARM64_ABSOLUTE; // Dummy return value
79  }
80  }
81 
82  switch (FixupKind) {
83  default: {
84  if (const AArch64MCExpr *A64E = dyn_cast<AArch64MCExpr>(Expr)) {
85  Ctx.reportError(Fixup.getLoc(), "relocation type " +
86  A64E->getVariantKindName() +
87  " unsupported on COFF targets");
88  } else {
89  const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind());
90  Ctx.reportError(Fixup.getLoc(), Twine("relocation type ") + Info.Name +
91  " unsupported on COFF targets");
92  }
93  return COFF::IMAGE_REL_ARM64_ABSOLUTE; // Dummy return value
94  }
95 
96  case FK_PCRel_4:
98 
99  case FK_Data_4:
100  switch (Modifier) {
101  default:
107  }
108 
109  case FK_Data_8:
111 
112  case FK_SecRel_2:
114 
115  case FK_SecRel_4:
117 
119  if (const AArch64MCExpr *A64E = dyn_cast<AArch64MCExpr>(Expr)) {
120  AArch64MCExpr::VariantKind RefKind = A64E->getKind();
121  if (RefKind == AArch64MCExpr::VK_SECREL_LO12)
123  if (RefKind == AArch64MCExpr::VK_SECREL_HI12)
125  }
127 
133  if (const AArch64MCExpr *A64E = dyn_cast<AArch64MCExpr>(Expr)) {
134  AArch64MCExpr::VariantKind RefKind = A64E->getKind();
135  if (RefKind == AArch64MCExpr::VK_SECREL_LO12)
137  }
139 
142 
145 
148 
151 
155  }
156 }
157 
158 bool AArch64WinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const {
159  return true;
160 }
161 
162 std::unique_ptr<MCObjectTargetWriter> llvm::createAArch64WinCOFFObjectWriter() {
163  return std::make_unique<AArch64WinCOFFObjectWriter>();
164 }
llvm::COFF::IMAGE_REL_ARM64_SECREL
@ IMAGE_REL_ARM64_SECREL
Definition: COFF.h:393
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::COFF::IMAGE_REL_ARM64_ADDR32NB
@ IMAGE_REL_ARM64_ADDR32NB
Definition: COFF.h:387
llvm::FixupKind
static Lanai::Fixups FixupKind(const MCExpr *Expr)
Definition: LanaiMCCodeEmitter.cpp:90
llvm::MCAsmBackend::getFixupKindInfo
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
Definition: MCAsmBackend.cpp:82
llvm::AArch64MCExpr::VK_ABS
@ VK_ABS
Definition: AArch64MCExpr.h:28
llvm::COFF::IMAGE_REL_ARM64_PAGEBASE_REL21
@ IMAGE_REL_ARM64_PAGEBASE_REL21
Definition: COFF.h:389
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:76
llvm::AArch64::fixup_aarch64_pcrel_branch26
@ fixup_aarch64_pcrel_branch26
Definition: AArch64FixupKinds.h:52
llvm::AArch64::fixup_aarch64_add_imm12
@ fixup_aarch64_add_imm12
Definition: AArch64FixupKinds.h:26
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:145
llvm::COFF::IMAGE_REL_ARM64_PAGEOFFSET_12L
@ IMAGE_REL_ARM64_PAGEOFFSET_12L
Definition: COFF.h:392
llvm::AArch64::fixup_aarch64_ldst_imm12_scale2
@ fixup_aarch64_ldst_imm12_scale2
Definition: AArch64FixupKinds.h:30
AArch64MCExpr.h
ErrorHandling.h
llvm::COFF::IMAGE_REL_ARM64_REL21
@ IMAGE_REL_ARM64_REL21
Definition: COFF.h:390
COFF.h
MCFixupKindInfo.h
llvm::COFF::IMAGE_REL_ARM64_SECREL_HIGH12A
@ IMAGE_REL_ARM64_SECREL_HIGH12A
Definition: COFF.h:395
llvm::createAArch64WinCOFFObjectWriter
std::unique_ptr< MCObjectTargetWriter > createAArch64WinCOFFObjectWriter()
Definition: AArch64WinCOFFObjectWriter.cpp:162
llvm::COFF::IMAGE_REL_ARM64_BRANCH26
@ IMAGE_REL_ARM64_BRANCH26
Definition: COFF.h:388
llvm::COFF::IMAGE_REL_ARM64_ABSOLUTE
@ IMAGE_REL_ARM64_ABSOLUTE
Definition: COFF.h:385
llvm::COFF::IMAGE_REL_ARM64_SECREL_LOW12A
@ IMAGE_REL_ARM64_SECREL_LOW12A
Definition: COFF.h:394
llvm::FK_Data_4
@ FK_Data_4
A four-byte fixup.
Definition: MCFixup.h:25
llvm::AArch64MCExpr::VK_SECREL
@ VK_SECREL
Definition: AArch64MCExpr.h:36
llvm::MCAsmBackend
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:42
MCAsmBackend.h
llvm::FK_SecRel_4
@ FK_SecRel_4
A four-byte section relative fixup.
Definition: MCFixup.h:42
Twine.h
MCContext.h
llvm::FK_SecRel_2
@ FK_SecRel_2
A two-byte section relative fixup.
Definition: MCFixup.h:41
llvm::COFF::IMAGE_REL_ARM64_ADDR32
@ IMAGE_REL_ARM64_ADDR32
Definition: COFF.h:386
AArch64FixupKinds.h
llvm::AArch64::fixup_aarch64_pcrel_branch19
@ fixup_aarch64_pcrel_branch19
Definition: AArch64FixupKinds.h:49
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
llvm::AArch64::fixup_aarch64_ldst_imm12_scale8
@ fixup_aarch64_ldst_imm12_scale8
Definition: AArch64FixupKinds.h:32
llvm::COFF::IMAGE_REL_ARM64_SECREL_LOW12L
@ IMAGE_REL_ARM64_SECREL_LOW12L
Definition: COFF.h:396
llvm::AArch64MCExpr::VK_SECREL_LO12
@ VK_SECREL_LO12
Definition: AArch64MCExpr.h:109
llvm::AArch64::fixup_aarch64_ldst_imm12_scale4
@ fixup_aarch64_ldst_imm12_scale4
Definition: AArch64FixupKinds.h:31
llvm::AArch64::fixup_aarch64_pcrel_call26
@ fixup_aarch64_pcrel_call26
Definition: AArch64FixupKinds.h:56
llvm::MCFixupKindInfo
Target independent information on a fixup kind.
Definition: MCFixupKindInfo.h:15
llvm::MCContext::reportError
void reportError(SMLoc L, const Twine &Msg)
Definition: MCContext.cpp:1037
llvm::FK_PCRel_4
@ FK_PCRel_4
A four-byte pc relative fixup.
Definition: MCFixup.h:30
llvm::AArch64::fixup_aarch64_ldst_imm12_scale1
@ fixup_aarch64_ldst_imm12_scale1
Definition: AArch64FixupKinds.h:29
Fixup
PowerPC TLS Dynamic Call Fixup
Definition: PPCTLSDynamicCall.cpp:233
MCFixup.h
llvm::MCWinCOFFObjectTargetWriter
Definition: MCWinCOFFObjectWriter.h:23
llvm::COFF::IMAGE_REL_ARM64_PAGEOFFSET_12A
@ IMAGE_REL_ARM64_PAGEOFFSET_12A
Definition: COFF.h:391
llvm::COFF::IMAGE_FILE_MACHINE_ARM64
@ IMAGE_FILE_MACHINE_ARM64
Definition: COFF.h:100
llvm::AArch64::fixup_aarch64_pcrel_branch14
@ fixup_aarch64_pcrel_branch14
Definition: AArch64FixupKinds.h:44
llvm::COFF::IMAGE_REL_ARM64_REL32
@ IMAGE_REL_ARM64_REL32
Definition: COFF.h:402
MCObjectWriter.h
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:83
llvm::AArch64::fixup_aarch64_ldst_imm12_scale16
@ fixup_aarch64_ldst_imm12_scale16
Definition: AArch64FixupKinds.h:33
llvm::COFF::IMAGE_REL_ARM64_BRANCH14
@ IMAGE_REL_ARM64_BRANCH14
Definition: COFF.h:401
Casting.h
llvm::AArch64MCExpr
Definition: AArch64MCExpr.h:22
llvm::MCSymbolRefExpr::VK_COFF_IMGREL32
@ VK_COFF_IMGREL32
Definition: MCExpr.h:316
AArch64MCTargetDesc.h
MCValue.h
llvm::FK_Data_8
@ FK_Data_8
A eight-byte fixup.
Definition: MCFixup.h:26
llvm::AArch64MCExpr::VariantKind
VariantKind
Definition: AArch64MCExpr.h:24
llvm::COFF::IMAGE_REL_ARM64_BRANCH19
@ IMAGE_REL_ARM64_BRANCH19
Definition: COFF.h:400
llvm::AArch64::fixup_aarch64_pcrel_adrp_imm21
@ fixup_aarch64_pcrel_adrp_imm21
Definition: AArch64FixupKinds.h:22
llvm::MCValue
This represents an "assembler immediate".
Definition: MCValue.h:36
llvm::MCSymbolRefExpr::VK_None
@ VK_None
Definition: MCExpr.h:195
MCWinCOFFObjectWriter.h
llvm::AArch64MCExpr::getSymbolLoc
static VariantKind getSymbolLoc(VariantKind Kind)
Definition: AArch64MCExpr.h:143
llvm::COFF::IMAGE_REL_ARM64_ADDR64
@ IMAGE_REL_ARM64_ADDR64
Definition: COFF.h:399
raw_ostream.h
MCExpr.h
llvm::MCFixup
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:71
llvm::AArch64MCExpr::VK_SECREL_HI12
@ VK_SECREL_HI12
Definition: AArch64MCExpr.h:110
llvm::MCExpr
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
llvm::MCSymbolRefExpr::VK_SECREL
@ VK_SECREL
Definition: MCExpr.h:223
llvm::AArch64::fixup_aarch64_pcrel_adr_imm21
@ fixup_aarch64_pcrel_adr_imm21
Definition: AArch64FixupKinds.h:19
llvm::COFF::IMAGE_REL_ARM64_SECTION
@ IMAGE_REL_ARM64_SECTION
Definition: COFF.h:398