15#ifndef LLVM_LIB_TRANSFORMS_AGGRESSIVEINSTCOMBINE_COMBINEINTERNAL_H
16#define LLVM_LIB_TRANSFORMS_AGGRESSIVEINSTCOMBINE_COMBINEINTERNAL_H
67 unsigned ValidBitWidth = 0;
69 unsigned MinBitWidth = 0;
71 Value *NewValue =
nullptr;
82 : AC(AC), TLI(TLI), DL(DL), DT(DT) {}
92 bool buildTruncExpressionGraph();
99 unsigned getMinBitWidth();
107 Type *getBestTruncatedType();
133 void ReduceExpressionGraph(
Type *SclTy);
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file implements a map that provides insertion order iteration.
This file defines the SmallVector class.
static unsigned ComputeNumSignBits(const Value *V, const APInt &DemandedElts, const SimplifyQuery &Q, unsigned Depth)
A cache of @llvm.assume calls within a function.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
This class implements a map that also provides access to all stored values in a deterministic order.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Provides information about what library functions are available for the current target.
TruncInstCombine(AssumptionCache &AC, TargetLibraryInfo &TLI, const DataLayout &DL, const DominatorTree &DT)
bool run(Function &F)
Perform TruncInst pattern optimization on given function.
This class represents a truncation of integer types.
The instances of the Type class are immutable: once they are created, they are never changed.
LLVM Value Representation.
This is an optimization pass for GlobalISel generic memory operations.
FunctionAddr VTableAddr Value
LLVM_ABI void computeKnownBits(const Value *V, KnownBits &Known, const DataLayout &DL, AssumptionCache *AC=nullptr, const Instruction *CxtI=nullptr, const DominatorTree *DT=nullptr, bool UseInstrInfo=true, unsigned Depth=0)
Determine which bits of V are known to be either zero or one and return them in the KnownZero/KnownOn...
LLVM_ABI unsigned ComputeNumSignBits(const Value *Op, const DataLayout &DL, AssumptionCache *AC=nullptr, const Instruction *CxtI=nullptr, const DominatorTree *DT=nullptr, bool UseInstrInfo=true, unsigned Depth=0)
Return the number of times the sign bit of the register is replicated into the other bits.
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.