LLVM 20.0.0git
InstructionTables.h
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1//===--------------------- InstructionTables.h ------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file
9///
10/// This file implements a custom stage to generate instruction tables.
11/// See the description of command-line flag -instruction-tables in
12/// docs/CommandGuide/lvm-mca.rst
13///
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_MCA_STAGES_INSTRUCTIONTABLES_H
17#define LLVM_MCA_STAGES_INSTRUCTIONTABLES_H
18
20#include "llvm/MC/MCSchedule.h"
23#include "llvm/MCA/Support.h"
24
25namespace llvm {
26namespace mca {
27
28class InstructionTables final : public Stage {
29 const MCSchedModel &SM;
30 SmallVector<ResourceUse, 4> UsedResources;
32
33public:
35 : SM(Model), Masks(Model.getNumProcResourceKinds()) {
36 computeProcResourceMasks(Model, Masks);
37 }
38
39 bool hasWorkToComplete() const override { return false; }
40 Error execute(InstRef &IR) override;
41};
42} // namespace mca
43} // namespace llvm
44
45#endif // LLVM_MCA_STAGES_INSTRUCTIONTABLES_H
Legalize the Machine IR a function s Machine IR
Definition: Legalizer.cpp:80
A scheduler for Processor Resource Units and Processor Resource Groups.
This file defines the SmallVector class.
This file defines a stage.
Lightweight error class with error context and mandatory checking.
Definition: Error.h:160
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1196
An InstRef contains both a SourceMgr index and Instruction pair.
Definition: Instruction.h:720
Error execute(InstRef &IR) override
The primary action that this stage performs on instruction IR.
bool hasWorkToComplete() const override
Returns true if some instructions are still executing this stage.
InstructionTables(const MCSchedModel &Model)
Helper functions used by various pipeline components.
void computeProcResourceMasks(const MCSchedModel &SM, MutableArrayRef< uint64_t > Masks)
Populates vector Masks with processor resource masks.
Definition: Support.cpp:40
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
Machine model for scheduling, bundling, and heuristics.
Definition: MCSchedule.h:256