LLVM  13.0.0git
MSP430AsmBackend.cpp
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1 //===-- MSP430AsmBackend.cpp - MSP430 Assembler Backend -------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
11 #include "llvm/ADT/APInt.h"
12 #include "llvm/MC/MCAsmBackend.h"
13 #include "llvm/MC/MCAssembler.h"
14 #include "llvm/MC/MCContext.h"
15 #include "llvm/MC/MCDirectives.h"
17 #include "llvm/MC/MCExpr.h"
19 #include "llvm/MC/MCObjectWriter.h"
21 #include "llvm/MC/MCSymbol.h"
25 
26 using namespace llvm;
27 
28 namespace {
29 class MSP430AsmBackend : public MCAsmBackend {
30  uint8_t OSABI;
31 
32  uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
33  MCContext &Ctx) const;
34 
35 public:
36  MSP430AsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI)
37  : MCAsmBackend(support::little), OSABI(OSABI) {}
38  ~MSP430AsmBackend() override {}
39 
40  void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
42  uint64_t Value, bool IsResolved,
43  const MCSubtargetInfo *STI) const override;
44 
45  std::unique_ptr<MCObjectTargetWriter>
46  createObjectTargetWriter() const override {
47  return createMSP430ELFObjectWriter(OSABI);
48  }
49 
50  bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
51  const MCRelaxableFragment *DF,
52  const MCAsmLayout &Layout) const override {
53  return false;
54  }
55 
56  bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved,
57  uint64_t Value,
58  const MCRelaxableFragment *DF,
59  const MCAsmLayout &Layout,
60  const bool WasForced) const override {
61  return false;
62  }
63 
64  unsigned getNumFixupKinds() const override {
66  }
67 
68  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
69  const static MCFixupKindInfo Infos[MSP430::NumTargetFixupKinds] = {
70  // This table must be in the same order of enum in MSP430FixupKinds.h.
71  //
72  // name offset bits flags
73  {"fixup_32", 0, 32, 0},
74  {"fixup_10_pcrel", 0, 10, MCFixupKindInfo::FKF_IsPCRel},
75  {"fixup_16", 0, 16, 0},
76  {"fixup_16_pcrel", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
77  {"fixup_16_byte", 0, 16, 0},
78  {"fixup_16_pcrel_byte", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
79  {"fixup_2x_pcrel", 0, 10, MCFixupKindInfo::FKF_IsPCRel},
80  {"fixup_rl_pcrel", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
81  {"fixup_8", 0, 8, 0},
82  {"fixup_sym_diff", 0, 32, 0},
83  };
84  static_assert((array_lengthof(Infos)) == MSP430::NumTargetFixupKinds,
85  "Not all fixup kinds added to Infos array");
86 
89 
90  return Infos[Kind - FirstTargetFixupKind];
91  }
92 
93  bool writeNopData(raw_ostream &OS, uint64_t Count) const override;
94 };
95 
96 uint64_t MSP430AsmBackend::adjustFixupValue(const MCFixup &Fixup,
97  uint64_t Value,
98  MCContext &Ctx) const {
99  unsigned Kind = Fixup.getKind();
100  switch (Kind) {
101  case MSP430::fixup_10_pcrel: {
102  if (Value & 0x1)
103  Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned");
104 
105  // Offset is signed
106  int16_t Offset = Value;
107  // Jumps are in words
108  Offset >>= 1;
109  // PC points to the next instruction so decrement by one
110  --Offset;
111 
112  if (Offset < -512 || Offset > 511)
113  Ctx.reportError(Fixup.getLoc(), "fixup value out of range");
114 
115  // Mask 10 bits
116  Offset &= 0x3ff;
117 
118  return Offset;
119  }
120  default:
121  return Value;
122  }
123 }
124 
125 void MSP430AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
126  const MCValue &Target,
128  uint64_t Value, bool IsResolved,
129  const MCSubtargetInfo *STI) const {
130  Value = adjustFixupValue(Fixup, Value, Asm.getContext());
131  MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
132  if (!Value)
133  return; // Doesn't change encoding.
134 
135  // Shift the value into position.
136  Value <<= Info.TargetOffset;
137 
138  unsigned Offset = Fixup.getOffset();
139  unsigned NumBytes = alignTo(Info.TargetSize + Info.TargetOffset, 8) / 8;
140 
141  assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!");
142 
143  // For each byte of the fragment that the fixup touches, mask in the
144  // bits from the fixup value.
145  for (unsigned i = 0; i != NumBytes; ++i) {
146  Data[Offset + i] |= uint8_t((Value >> (i * 8)) & 0xff);
147  }
148 }
149 
150 bool MSP430AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count) const {
151  if ((Count % 2) != 0)
152  return false;
153 
154  // The canonical nop on MSP430 is mov #0, r3
155  uint64_t NopCount = Count / 2;
156  while (NopCount--)
157  OS.write("\x03\x43", 2);
158 
159  return true;
160 }
161 
162 } // end anonymous namespace
163 
165  const MCSubtargetInfo &STI,
166  const MCRegisterInfo &MRI,
167  const MCTargetOptions &Options) {
168  return new MSP430AsmBackend(STI, ELF::ELFOSABI_STANDALONE);
169 }
i
i
Definition: README.txt:29
llvm::EngineKind::Kind
Kind
Definition: ExecutionEngine.h:524
llvm::alignTo
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:158
llvm
This class represents lattice values for constants.
Definition: AllocatorList.h:23
llvm::MCRelaxableFragment
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Definition: MCFragment.h:271
llvm::MCAsmBackend::getFixupKindInfo
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
Definition: MCAsmBackend.cpp:74
MCTargetOptions.h
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:71
MCDirectives.h
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:124
llvm::FirstTargetFixupKind
@ FirstTargetFixupKind
Definition: MCFixup.h:55
ErrorHandling.h
MCAssembler.h
APInt.h
MCFixupKindInfo.h
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
llvm::createMSP430MCAsmBackend
MCAsmBackend * createMSP430MCAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Definition: MSP430AsmBackend.cpp:164
llvm::Data
@ Data
Definition: SIMachineScheduler.h:56
llvm::MCAsmBackend
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:36
MCAsmBackend.h
llvm::MutableArrayRef
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:305
llvm::support::little
@ little
Definition: Endian.h:27
llvm::ELF::ELFOSABI_STANDALONE
@ ELFOSABI_STANDALONE
Definition: ELF.h:363
MCContext.h
MCSymbol.h
MCSubtargetInfo.h
llvm::raw_ostream::write
raw_ostream & write(unsigned char C)
Definition: raw_ostream.cpp:220
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:50
llvm::MSP430::fixup_10_pcrel
@ fixup_10_pcrel
Definition: MSP430FixupKinds.h:27
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:26
llvm::array_lengthof
constexpr size_t array_lengthof(T(&)[N])
Find the length of an array.
Definition: STLExtras.h:1341
DF
static RegisterPass< DebugifyFunctionPass > DF("debugify-function", "Attach debug info to a function")
llvm::createMSP430ELFObjectWriter
std::unique_ptr< MCObjectTargetWriter > createMSP430ELFObjectWriter(uint8_t OSABI)
Definition: MSP430ELFObjectWriter.cpp:56
MSP430MCTargetDesc.h
llvm::MCAssembler
Definition: MCAssembler.h:60
MCELFObjectWriter.h
llvm::MCFixupKindInfo::FKF_IsPCRel
@ FKF_IsPCRel
Is this fixup kind PCrelative? This is used by the assembler backend to evaluate fixup values in a ta...
Definition: MCFixupKindInfo.h:19
adjustFixupValue
static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, uint64_t Value, MCContext &Ctx, const Triple &TheTriple, bool IsResolved)
Definition: AArch64AsmBackend.cpp:157
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MCFixupKindInfo
Target independent information on a fixup kind.
Definition: MCFixupKindInfo.h:15
llvm::MCContext::reportError
void reportError(SMLoc L, const Twine &Msg)
Definition: MCContext.cpp:917
llvm::MCTargetOptions
Definition: MCTargetOptions.h:36
Fixup
PowerPC TLS Dynamic Call Fixup
Definition: PPCTLSDynamicCall.cpp:212
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition: MCRegisterInfo.h:128
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
MCObjectWriter.h
llvm::MCAsmLayout
Encapsulates the layout of an assembly file at a particular point in time.
Definition: MCAsmLayout.h:28
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::MCFixupKind
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
llvm::MSP430::NumTargetFixupKinds
@ NumTargetFixupKinds
Definition: MSP430FixupKinds.h:47
support
Reimplement select in terms of SEL *We would really like to support but we need to prove that the add doesn t need to overflow between the two bit chunks *Implement pre post increment support(e.g. PR935) *Implement smarter const ant generation for binops with large immediates. A few ARMv6T2 ops should be pattern matched
Definition: README.txt:10
llvm::HexStyle::Asm
@ Asm
0ffh
Definition: MCInstPrinter.h:34
llvm::MCValue
This represents an "assembler immediate".
Definition: MCValue.h:37
MSP430FixupKinds.h
raw_ostream.h
MCExpr.h
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75
llvm::MCFixup
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:81
llvm::Value
LLVM Value Representation.
Definition: Value.h:75